8 TRANSISTORS FIELD-E (FET FFECT S · PDF fileThe two main types of FETs are the junction...

8 FIELD-EFFECT

TRANSISTORS (FETS)

CHAPTER OUTLINE

8–1 The JFET8–2 JFET Characteristics and Parameters8–3 JFET Biasing8–4 The Ohmic Region8–5 The MOSFET8–6 MOSFET Characteristics and Parameters8–7 MOSFET Biasing8–8 The IGBT8–9 Troubleshooting

Application Activity

CHAPTER OBJECTIVES

◆ Discuss the JFET and how it differs from the BJT

◆ Discuss, define, and apply JFET characteristics andparameters

◆ Discuss and analyze JFET biasing

◆ Discuss the ohmic region on a JFET characteristic curve

◆ Explain the operation of MOSFETs

◆ Discuss and apply MOSFET parameters

◆ Describe and analyze MOSFET bias circuits

◆ Discuss the IGBT

◆ Troubleshoot FET circuits

KEY TERMS

APPLICATION ACTIVITY PREVIEW

The Application Activity involves the electronic controlcircuits for a waste water treatment system. In particular,you will focus on the application of field-effect transistors inthe sensing circuits for chemical measurements.

VISIT THE COMPANION WEBSITE

Study aids and Multisim files for this chapter are available athttp://www.pearsonhighered.com/electronics

INTRODUCTION

BJTs (bipolar junction transistors) were covered in previouschapters. Now we will discuss the second major type oftransistor, the FET (field-effect transistor). FETs are unipolardevices because, unlike BJTs that use both electron and holecurrent, they operate only with one type of charge carrier.The two main types of FETs are the junction field-effect tran-sistor (JFET) and the metal oxide semiconductor field-effecttransistor (MOSFET). The term field-effect relates to thedepletion region formed in the channel of a FET as a resultof a voltage applied on one of its terminals (gate).

Recall that a BJT is a current-controlled device; that is,the base current controls the amount of collector current. AFET is different. It is a voltage-controlled device, where thevoltage between two of the terminals (gate and source)controls the current through the device. A major advantageof FETs is their very high input resistance. Because of theirnonlinear characteristics, they are generally not as widelyused in amplifiers as BJTs except where very high inputimpedances are required. However, FETs are the preferreddevice in low-voltage switching applications because they aregenerally faster than BJTs when turned on and off. The IGBTis generally used in high-voltage switching applications.

◆ JFET

◆ Drain

◆ Source

◆ Gate

◆ Pinch-off voltage

◆ Transconductance

◆ Ohmic region

◆ MOSFET

◆ Depletion

◆ Enhancement

◆ IGBT

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THE JFET ◆ 385

Basic Structure

Figure 8–1(a) shows the basic structure of an n-channel JFET (junction field-effect transis-tor). Wire leads are connected to each end of the n-channel; the drain is at the upper end,and the source is at the lower end. Two p-type regions are diffused in the n-type materialto form a channel, and both p-type regions are connected to the gate lead. For simplicity,the gate lead is shown connected to only one of the p regions. A p-channel JFET is shownin Figure 8–1(b).

8–1 THE JFETThe JFET ( junction field-effect transistor) is a type of FET that operates with areverse-biased pn junction to control current in a channel. Depending on theirstructure, JFETs fall into either of two categories, n channel or p channel.

After completing this section, you should be able to

❏ Discuss the JFET and how it differs from the BJT❏ Describe the basic structure of n-channel and p-channel JFETs

◆ Name the terminals ◆ Explain a channel❏ Explain the basic operation of a JFET❏ Identify JFET schematic symbols

In 1952, Ian Ross and GeorgeDacey succeeded in making aunipolar device with a structuresimilar to today’s JFET.

H I S T O R Y N O T E

Gate

Drain

Source

(a) n channel

Gate

nch

anne

l

p p

Drain

Source

(b) p channel

pch

anne

l

n n

� FIGURE 8–1

A representation of the basic struc-ture of the two types of JFET.

Basic Operation

To illustrate the operation of a JFET, Figure 8–2 shows dc bias voltages applied to ann-channel device. VDD provides a drain-to-source voltage and supplies current from

n

p p

+

–

–

+

RD

D

S

GVDD

VGG

n

� FIGURE 8–2

A biased n-channel JFET.

386 ◆ FIELD-EFFECT TRANSISTORS (FETS)

drain to source. VGG sets the reverse-bias voltage between the gate and the source, asshown.

The JFET is always operated with the gate-source pn junction reverse-biased. Reverse-biasing of the gate-source junction with a negative gate voltage produces a depletion re-gion along the pn junction, which extends into the n channel and thus increases its resist-ance by restricting the channel width.

The channel width and thus the channel resistance can be controlled by varying the gatevoltage, thereby controlling the amount of drain current, ID. Figure 8–3 illustrates this con-cept. The white areas represent the depletion region created by the reverse bias. It is widertoward the drain end of the channel because the reverse-bias voltage between the gate andthe drain is greater than that between the gate and the source. We will discuss JFET char-acteristic curves and some parameters in Section 8–2.

IDVGS– +

+

––

+

RD

VDDVGG

(c)

+

––

+

RD

VDDVGG

(a) JFET biased for conduction

+

––

+

RD

VDDVGG

(b)

p p p p

p p

Less VGG widens the channel (between the white areas) whichdecreases the resistance of the channel and increases ID.

Greater VGG narrows the channel (between the whiteareas) which increases the resistance of the channeland decreases ID.

– + – +– +

– + – +

IDVGS

IDVGS

� FIGURE 8–3

Effects of VGS on channel width, resistance, and drain current (VGG � VGS).

JFET Symbols

The schematic symbols for both n-channel and p-channel JFETs are shown in Figure 8–4.Notice that the arrow on the gate points “in” for n channel and “out” for p channel.

JFET CHARACTERISTICS AND PARAMETERS ◆ 387

Drain Characteristic Curve

Consider the case when the gate-to-source voltage is zero (VGS 0 V). This is producedby shorting the gate to the source, as in Figure 8–5(a) where both are grounded. As VDD(and thus VDS) is increased from 0 V, ID will increase proportionally, as shown in the graphof Figure 8–5(b) between points A and B. In this area, the channel resistance is essentiallyconstant because the depletion region is not large enough to have significant effect. This iscalled the ohmic region because VDS and ID are related by Ohm’s law. (Ohmic region isdiscussed further in Section 8–4.)

At point B in Figure 8–5(b), the curve levels off and enters the active region where IDbecomes essentially constant. As VDS increases from point B to point C, the reverse-bias

=

1. Name the three terminals of a JFET.

2. Does an n-channel JFET require a positive or negative value for VGS?

3. How is the drain current controlled in a JFET?

SECTION 8–1 CHECKUPAnswers can be found at www.pearsonhighered.com/floyd.

Source (S)

Drain (D)

Gate (G)

n channel

Source (S)

Drain (D)

Gate (G)

p channel

� FIGURE 8–4

JFET schematic symbols.

8–2 JFET CHARACTERISTICS AND PARAMETERS

The JFET operates as a voltage-controlled, constant-current device. Cutoff and pinch-off as well as JFET transfer characteristics are covered in this section.

After completing this section, you should be able to

❏ Discuss, define, and apply JFET characteristics and parameters❏ Discuss the drain characteristic curve

◆ Identify the ohmic, active, and breakdown regions of the curve❏ Define pinch-off voltage❏ Discuss breakdown❏ Explain how gate-to-source voltage controls the drain current❏ Discuss the cutoff voltage❏ Compare pinch-off and cutoff❏ Explain the JFET universal transfer characteristic

◆ Calculate the drain current using the transfer characteristic equation◆ Interpret a JFET datasheet

❏ Discuss JFET forward transconductance◆ Define transconductance ◆ Calculate forward transconductance

❏ Discuss JFET input resistance and capacitance❏ Determine the ac drain-to-source resistance

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voltage from gate to drain (VGD) produces a depletion region large enough to offset the in-crease in VDS, thus keeping ID relatively constant.

Pinch-Off Voltage For VGS 0 V, the value of VDS at which ID becomes essentiallyconstant (point B on the curve in Figure 8–5(b)) is the pinch-off voltage, VP. For a givenJFET, VP has a fixed value. As you can see, a continued increase in VDS above the pinch-off voltage produces an almost constant drain current. This value of drain current is IDSS(Drain to Source current with gate Shorted) and is always specified on JFET datasheets.IDSS is the maximum drain current that a specific JFET can produce regardless of the exter-nal circuit, and it is always specified for the condition, VGS 0 V.

Breakdown As shown in the graph in Figure 8–5(b), breakdown occurs at point Cwhen ID begins to increase very rapidly with any further increase in VDS. Breakdown canresult in irreversible damage to the device, so JFETs are always operated below breakdownand within the active region (constant current) (between points B and C on the graph). TheJFET action that produces the drain characteristic curve to the point of breakdown forVGS 0 V is illustrated in Figure 8–6.

VGS Controls ID

Let’s connect a bias voltage, VGG, from gate to source as shown in Figure 8–7(a). As VGSis set to increasingly more negative values by adjusting VGG, a family of drain characteristiccurves is produced, as shown in Figure 8–7(b). Notice that ID decreases as the magnitudeof VGS is increased to larger negative values because of the narrowing of the channel.Also notice that, for each increase in VGS, the JFET reaches pinch-off (where constantcurrent begins) at values of VDS less than VP. The term pinch-off is not the same as pinch-off voltage, Vp. Therefore, the amount of drain current is controlled by VGS, as illustratedin Figure 8–8.

Cutoff Voltage

The value of VGS that makes ID approximately zero is the cutoff voltage, VGS(off), as shownin Figure 8–8(d). The JFET must be operated between VGS 0 V and VGS(off). For thisrange of gate-to-source voltages, ID will vary from a maximum of IDSS to a minimum ofalmost zero.

=

=

=

=

(b) Drain characteristic

Ohmic region

VGS = 0

VP (pinch-off voltage)

Active region(constant current)

0A

B C

ID

IDSS

VDS

Breakdown

(a) JFET with VGS = 0 V and a variable VDS (VDD)

RD

VGD

VDS

ID

VGS = 0

VDD

+

–

� FIGURE 8–5

The drain characteristic curve of a JFET for VGS 0 showing pinch-off voltage.�


VDS

ID

(a) When VDS = 0, ID = 0.

RD

VDD = 0 V

0 V

+

–

0 A

(b)

(c) (d)

ID increases proportionally with VDS inthe ohmic region.

As VDS increases further, ID remains atIDSS until breakdown occurs.

VDS

IDRD

VDD

+

–

VDS

IDRD

VDD

+

–

VDS

IDRD

VDD

+

–

IDSS

VP

IDSS

– +

– +

– +

– +

– +

– +

– +

– +

When VDS = VP, ID is constant and equalto IDSS.

� FIGURE 8–6

JFET action that produces the characteristic curve for VGS 0 V.�

(a) JFET biased at VGS = –1 V

RD

VDD

VGG = 1 V

+

–

+

–

(b) Family of drain characteristic curves

VGS = 0

Pinch-off when VGS = –1 V

ID

IDSS

VDS

VGS = –1 V

VGS = –2 V

VGS = –4 VVGS = VGS(off) = –5 V

VGS = –3 V

VP = +5 V

� FIGURE 8–7

Pinch-off occurs at a lower VDS as VGS is increased to more negative values.


As you have seen, for an n-channel JFET, the more negative VGS is, the smaller ID be-comes in the active region. When VGS has a sufficiently large negative value, ID is reducedto zero. This cutoff effect is caused by the widening of the depletion region to a pointwhere it completely closes the channel, as shown in Figure 8–9.

ID– +

VGS– +

(a) VGS = 0 V, VDS ≥ VP, ID = IDSS

RD

VDD

0 V

+

–

VGG = 0 V–

+

(b)

RD

VDD

+

–

VGG

–

+

(c) As VGS is made more negative, ID continues to decreasebut is constant above pinch-off, which has also decreased.

RD

VDD

+

–

VGG

–

+

(d) Until VGS = –VGS(off), ID continues to decrease.When VGS ≥ –VGS(off), ID

~ 0.

RD

VDD

+

–

VGG

–

+

0 A

=

VGS– +

ID– +

VGS– +

ID– +

VGS– +

ID– +

IDSS

VGS(off)

When VGS is negative, ID decreases and is constantabove pinch-off, which is less than VP .

� FIGURE 8–8

VGS controls ID.

VGS– +

ID– +

VGS(off) 0 A

+

––

+

RD

VDDVGG

p p

� FIGURE 8–9

JFET at cutoff.

The basic operation of a p-channel JFET is the same as for an n-channel device ex-cept that a p-channel JFET requires a negative VDD and a positive VGS, as illustrated inFigure 8–10.

Comparison of Pinch-Off Voltage and Cutoff Voltage

As you have seen, there is a difference between pinch-off and cutoff voltages. There isalso a connection. The pinch-off voltage VP is the value of VDS at which the drain currentbecomes constant and equal to IDSS and is always measured at VGS 0 V. However,=


pinch-off occurs for VDS values less than VP when VGS is nonzero. So, although VP is aconstant, the minimum value of VDS at which ID becomes constant varies with VGS.

VGS(off) and VP are always equal in magnitude but opposite in sign. A datasheet usuallywill give either VGS(off) or VP, but not both. However, when you know one, you have theother. For example, if then VP 5 V, as shown in Figure 8–7(b).+=VGS(off) = -5 V,

RD

VDD

–

+VGG

+

–

� FIGURE 8–10

A biased p-channel JFET.

For the JFET in Figure 8–11, Determine theminimum value of VDD required to put the device in the constant-current region of op-eration when VGS 0 V.=

VGS(off) = -4 V and IDSS = 12 mA.EXAMPLE 8–1

RD560 �

VDD

+

–

� FIGURE 8–11

Solution Since The minimum value of VDS for the JFET to be in itsconstant-current region is

In the constant-current region with VGS � 0 V,

The drop across the drain resistor is

Apply Kirchhoff’s law around the drain circuit.

This is the value of VDD to make VDS VP and put the device in the constant-currentregion.

Related Problem* If VDD is increased to 15 V, what is the drain current?

=

VDD = VDS + VRD= 4 V + 6.72 V = 10.7 V

VRD= IDRD = (12 mA)(560 Æ) = 6.72 V

ID = IDSS = 12 mA

VDS = VP = 4 V

VGS(off) = -4 V, VP = 4 V.

*Answers can be found at www.pearsonhighered.com/floyd.



JFET Universal Transfer Characteristic

You have learned that a range of VGS values from zero to VGS(off) controls the amount of draincurrent. For an n-channel JFET, VGS(off) is negative, and for a p-channel JFET, VGS(off) is pos-itive. Because VGS does control ID, the relationship between these two quantities is veryimportant. Figure 8–12 is a general transfer characteristic curve that illustrates graphicallythe relationship between VGS and ID. This curve is also known as a transconductance curve.

ID

IDSS

0.3VGS(off)0.5VGS(off)VGS(off) 0–VGS

IDSS

2

IDSS

4

� FIGURE 8–12

JFET universal transfer characteristiccurve (n-channel).

A particular p-channel JFET has a VGS(off) 4 V. What is ID when VGS 6 V?

Solution The p-channel JFET requires a positive gate-to-source voltage. The more positive thevoltage, the less the drain current. When VGS 4 V, ID 0. Any further increase inVGS keeps the JFET cut off, so ID remains 0.

Related Problem What is VP for the JFET described in this example?

==

+=+=EXAMPLE 8–2

Notice that the bottom end of the curve is at a point on the VGS axis equal to VGS(off),and the top end of the curve is at a point on the ID axis equal to IDSS. This curve shows that

and

The transfer characteristic curve can also be developed from the drain characteristiccurves by plotting values of ID for the values of VGS taken from the family of drain curvesat pinch-off, as illustrated in Figure 8–13 for a specific set of curves. Each point on thetransfer characteristic curve corresponds to specific values of VGS and ID on the draincurves. For example, when Also, for this specific JFET,

and IDSS = 12 mA.VGS(off) = -5 VVGS = -2 V, ID = 4.32 mA.

ID = IDSS when VGS = 0

ID =IDSS

2when VGS = 0.3VGS(off)

ID =IDSS

4when VGS = 0.5VGS(off)

ID = 0 when VGS = VGS(off)


A JFET transfer characteristic curve is expressed approximately as

15

VGS = 0

VGS = –1 V

VGS = –2 V

VGS = –3 V

VGS = –4 VVDS (V)

105–1 0 0–2–3–4

0.48 mA0 mA

–VGS (V)–5

1.92 mA

4.32 mA

7.68 mA

12

IDSS

ID (mA)

8

6

4

2

VGS(off)

� FIGURE 8–13

Example of the development of an n-channel JFET transfer characteristic curve (blue) from the JFETdrain characteristic curves (green).

Equation 8–1

With Equation 8–1, ID can be determined for any VGS if VGS(off) and IDSS are known. Thesequantities are usually available from the datasheet for a given JFET. Notice the squaredterm in the equation. Because of its form, a parabolic relationship is known as a squarelaw, and therefore, JFETs and MOSFETs are often referred to as square-law devices.

The datasheet for a typical JFET series is shown in Figure 8–14.

ID � IDSSa1 �VGS

VGS(off )b2

The partial datasheet in Figure 8–14 for a 2N5459 JFET indicates that typically IDSS � 9 mA and (maximum). Using these values, determine thedrain current for

Solution For VGS � 0 V,

For use Equation 8–1.

For

Related Problem Determine ID for for the 2N5459 JFET.VGS = -3 V

ID � (9 mA)a1 --4 V

-8 Vb2

= (9 mA)(1 - 0.5)2 = (9 mA)(0.25) = 2.25 mA

VGS = -4 V,

= (9 mA)(1 - 0.125)2 = (9 mA)(0.766) = 6.89 mA

ID � IDSSa1 -VGS

VGS(off)b2

= (9 mA) a1 --1 V

-8 Vb2

VGS = -1 V,

ID = IDSS = 9 mA

VGS = 0 V, -1 V, and -4 V.VGS(off) = -8 V

EXAMPLE 8–3


G

D

S

2N54572N54582N5459

MMBF5457MMBF5458MMBF5459

N-Channel General Purpose AmplifierThis device is a low level audio amplifier and switching transistors,and can be used for analog switching applications. Sourced fromProcess 55.

Absolute Maximum Ratings* TA = 25�C unless otherwise noted

Symbol Parameter Value UnitsVDG Drain-Gate Voltage 25 V

VGS Gate-Source Voltage - 25 V

IGF Forward Gate Current 10 mA

TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 �C

*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.

NOTES:1) These ratings are based on a maximum junction temperature of 150 degrees C.2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.

GS D

TO-92SOT-23

Mark: 6D / 61S / 6LNOTE: Source & Drain

are interchangeable

Thermal Characteristics TA = 25�C unless otherwise noted

*Device mounted on FR-4 PCB 1.6" X 1.6" X 0.06."

Symbol Characteristic Max Units2N5457-5459 *MMBF5457-5459

PD Total Device DissipationDerate above 25�C

6255.0

3502.8

mWmW/

RθJC Thermal Resistance, Junction to Case 125 W

RθJA Thermal Resistance, Junction to Ambient 357 556 �C/

�C/�C

W

Symbol Parameter Test Conditions Min Typ Max Units

ON CHARACTERISTICS

OFF CHARACTERISTICS

Electrical Characteristics

SMALL SIGNAL CHARACTERISTICS

V(BR)GSS Gate-Source Breakdown Voltage IG = 10 �A, VDS = 0 - 25 V

IGSS Gate Reverse Current VGS = -15 V, VDS = 0VGS = -15 V, VDS = 0, TA = 100�C

- 1.0- 200

nAnA

VGS(off) Gate-Source Cutoff Voltage VDS = 15 V, ID = 10 nA 545754585459

- 0.5- 1.0- 2.0

- 6.0- 7.0- 8.0

VVV

VGS Gate-Source Voltage VDS = 15 V, ID = 100 A 5457VDS = 15 V, ID = 200 A 5458VDS = 15 V, ID = 400 A 5459

- 2.5- 3.5- 4.5

VVV

IDSS Zero-Gate Voltage Drain Current* VDS = 15 V, VGS = 0 545754585459

1.02.04.0

3.06.09.0

5.09.016

mAmAmA

gfs Forward Transfer Conductance* VDS = 15 V, VGS = 0, f = 1.0 kHz545754585459

100015002000

500055006000

mhosmhosmhos

gos Output Conductance* VDS = 15 V, VGS = 0, f = 1.0 kHz 10 50 mhos

Ciss Input Capacitance VDS = 15 V, VGS = 0, f = 1.0 MHz 4.5 7.0 pF

Crss Reverse Transfer Capacitance VDS = 15 V, VGS = 0, f = 1.0 MHz 1.5 3.0 pF

NF Noise Figure VDS = 15 V, VGS = 0, f = 1.0 kHz,RG = 1.0 megohm, BW = 1.0 Hz

3.0 dB

*Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%

�

�

�

�

��

�

TA = 25�C unless otherwise noted

� FIGURE 8–14

JFET partial datasheet. CopyrightFairchild SemiconductorCorporation. Used by permission.


JFET Forward Transconductance

The forward transconductance (transfer conductance), gm, is the change in drain currentfor a given change in gate-to-source voltage with the drain-to-source voltage

constant. It is expressed as a ratio and has the unit of siemens (S).

Other common designations for this parameter are gfs and yfs (forward transfer admit-tance). As you will see in Chapter 9, gm is an important factor in determining the voltagegain of a FET amplifier.

Because the transfer characteristic curve for a JFET is nonlinear, gm varies in value depend-ing on the location on the curve as set by VGS. The value for gm is greater near the top of thecurve (near VGS � 0) than it is near the bottom (near VGS(off)), as illustrated in Figure 8–15.

gm =¢ID

¢VGS

(¢VGS)(¢ID)

–VGS

VGS(off) �VGS �VGS

1

VGS = 0

0

�ID1

�ID2

IDSS

ID

gm2 =�ID2

�VGS

gm2 > gm1

gm1 =�ID1

�VGS

2

� FIGURE 8–15

gm varies depending on the biaspoint (VGS).

A datasheet normally gives the value of gm measured at VGS � 0 V (gm0). For example,the datasheet for the 2N5457 JFET specifies a minimum gm0 (gfs) of (the mhois the same unit as the siemens (S)) with VDS � 15 V.

Given gm0, you can calculate an approximate value for gm at any point on the transfercharacteristic curve using the following formula:

1000 mmhos

Equation 8–2

When a value of gm0 is not available, you can calculate it using values of IDSS andVGS(off). The vertical lines indicate an absolute value (no sign).

gm � gm0a1 �VGS

VGS(off )b

Equation 8–3gm0 �2IDSS

�VGS(off ) �

The following information is included on the datasheet in Figure 8–14 for a 2N5457JFET: typically, IDSS � 3.0 mA, maximum, and Using these values, determine the forward transconductance for andfind ID at this point.

VGS = -4 V,gfs(max) = 5000 mS.VGS(off) = -6 V

EXAMPLE 8–4


Input Resistance and Capacitance

As you know, a JFET operates with its gate-source junction reverse-biased, which makesthe input resistance at the gate very high. This high input resistance is one advantage of theJFET over the BJT. (Recall that a bipolar junction transistor operates with a forward-biasedbase-emitter junction.) JFET datasheets often specify the input resistance by giving a valuefor the gate reverse current, IGSS, at a certain gate-to-source voltage. The input resistancecan then be determined using the following equation, where the vertical lines indicate anabsolute value (no sign):

For example, the 2N5457 datasheet in Figure 8–14 lists a maximum IGSS of forat IGSS increases with temperature, so the input resistance decreases.

The input capacitance, Ciss, is a result of the JFET operating with a reverse-biased pnjunction. Recall that a reverse-biased pn junction acts as a capacitor whose capacitance de-pends on the amount of reverse voltage. For example, the 2N5457 has a maximum Ciss of7 pF for VGS � 0.

25°C.VGS = -15 V-1.0 nA

RIN = ` VGS

IGSS`

A certain JFET has an IGSS of for Determine the input resistance.

Solution

Related Problem Determine the input resistance for the 2N5458 from the datasheet in Figure 8–14.

RIN = ` VGS

IGSS` = 20 V

2 nA= 10,000 Mæ

VGS = -20 V.-2 nAEXAMPLE 8–5

Solution Use Equation 8–2 to calculate gm.

Next, use Equation 8–1 to calculate ID at

Related Problem A given JFET has the following characteristics: IDSS 12 mA, Find gm and ID when VGS = -2 V.gm0 = gfs = 3000 mS.

VGS(off) = -5 V, and=

ID � IDSSa1 -VGS

VGS(off)b2

= (3.0 mA)a1 --4 V

-6 Vb2

= 333 MA

VGS = -4 V.

gm = gm0a1 -VGS

VGS(off)b = (5000 mS)a1 -

-4 V

-6 Vb = 1667 MS

gm0 = gfs = 5000 mS.

AC Drain-to-Source Resistance

You learned from the drain characteristic curve that, above pinch-off, the drain current isrelatively constant over a range of drain-to-source voltages. Therefore, a large change inVDS produces only a very small change in ID. The ratio of these changes is the ac drain-to-source resistance of the device,

Datasheets often specify this parameter in terms of the output conductance, gos, or outputadmittance, yos, for VGS � 0 V.

r¿ds =¢VDS

¢ID

r¿ds.

8 TRANSISTORS FIELD-E (FET FFECT S · PDF fileThe two main types of FETs are the junction...

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