Stress and Characterization Strategies to Assess Oxide ... slides.pdf• GaN Field-Effect...
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Stress and Characterization Strategies to Assess Oxide Breakdown in High-Voltage GaN Field-Effect Transistors Shireen Warnock and Jesús A. del Alamo Microsystems Technology Laboratories (MTL) Massachusetts Institute of Technology (MIT)
Transcript of Stress and Characterization Strategies to Assess Oxide ... slides.pdf• GaN Field-Effect...
Stress and Characterization Strategies to Assess Oxide Breakdown
in High-Voltage GaN Field-Effect TransistorsShireen Warnock and Jesús A. del Alamo
Microsystems Technology Laboratories (MTL)Massachusetts Institute of Technology (MIT)
Outline
• Motivation & Challenges• Time-Dependent Dielectric Breakdown (TDDB)
Experiments:‒ Current-Voltage‒ Capacitance-Voltage
• Conclusions
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Motivation• GaN Field-Effect Transistors (FETs) promising for high-voltage
power applications• Many challenges before transistors ready for deployment:
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Motivation
Inverse piezoelectric effectJ. A. del Alamo, MR 2009
• GaN Field-Effect Transistors (FETs) promising for high-voltage power applications
• Many challenges before transistors ready for deployment:
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Motivation• GaN Field-Effect Transistors (FETs) promising for high-voltage
power applications• Many challenges before transistors ready for deployment:
Inverse piezoelectric effectJ. A. del Alamo, MR 2009
Current collapseD. Jin, IEDM 2013
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Motivation
Inverse piezoelectric effectJ. A. del Alamo, MR 2009
Current collapseD. Jin, IEDM 2013
VT instabilityD. Johnson, TED 2013
• GaN Field-Effect Transistors (FETs) promising for high-voltage power applications
• Many challenges before transistors ready for deployment:
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Motivation
Inverse piezoelectric effectJ. A. del Alamo, MR 2009
Current collapseD. Jin, IEDM 2013
Oxide reliabilityVT instabilityD. Johnson, TED 2013
• GaN Field-Effect Transistors (FETs) promising for high-voltage power applications
• Many challenges before transistors ready for deployment:
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Time-Dependent Dielectric Breakdown• High gate bias → defect generation → catastrophic oxide
breakdown• Often dictates lifetime of chip
D. R. Wolters, Philips J. Res. 1985T. Kauerauf, EDL 2005
Typical TDDB experiments:Si high-k MOSFETs
Gate material melted after breakdown
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Challenges to study TDDB in GaN FETs• AlGaN/GaN metal-insulator-
semiconductor high electron mobility transistors (MIS-HEMTs)
• Gate stack has multiple layers & interfaces
→ Uncertain electric field distribution
→ Many trapping sites
• Complex dynamics involved→ Unstable and fast changing VT
P. Lagger, TED 2014
stress time ↑
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TDDB Experiments:Current-Voltage
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GaN MIS-HEMTs for TDDB study
GaN MIS-HEMTs from industry collaboration: depletion-mode
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Classic TDDB ExperimentConstant gate voltage stress experiment:
• Experiment gives time to breakdown and shows generation of stress-induced leakage current (SILC)
• Little other insight gained from measurement
trapping
SILC
Hard breakdown
tBD
IG
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Visualizing TDDB StatisticsTDDB uniqueness: Weibull distribution of time to breakdown
• As VGstress ↑, tBD ↓• Parallel distributions for different VGstress
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TDDB with Periodic Characterization Pause TDDB stress and sweep transfer characteristics at VDS=0.1 V
• Large VT shift → trapping in oxide or AlGaN• Immediate S degradation → interface state generation early in
experiment14
Validity of Characterization ApproachCompare statistics for standard and interrupted schemes
Same statistics for both schemes → characterization is benign15
Step-Stress TDDB• Step-stress to examine early stages of degradation• Step VGstress in 0.5 V increments until breakdown
• Low VGstress: IG ↓ ⇒ trapping• High VGstress: IG ↑ ⇒ SILC
VDS=0 V
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Step-Stress TDDBTransfer characteristics during Step-Stress TDDB
• S and VT degradation is progressive• At VGstress ~12.5 V, ΔVT < 0 (red lines)
‒ Sudden increase in S, appearance of SILC→ interface state generation
VDS=0.1 V
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TDDB Experiments:Capacitance-Voltage
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C-V Characterization
• At VGS>1 V, conduction band of GaN cap starts being populated
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C-V Characterization
TDDB characterization takes place here
• TDDB characterized in regime where GaN cap is populated with electrons
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Constant VGstress TDDB
• As stress time ↑→ CGG ↑→ Frequency dispersion ↑
• Consistent with trap creation and trapping ‒ In oxide and/or at MOS interface
CGG vs. stress time in 5 devices at 5 different frequencies:
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Step-Stress TDDB
• Moderate VGstress → CGG ↓ ⇒ trapping in AlGaN
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Step-Stress TDDB
• Moderate VGstress → CGG ↓ ⇒ trapping in AlGaN• High VGstress → CGG ↑ ⇒ trap generation in oxide
CGG changes shape
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Conclusions• Developed methodology to study TDDB in GaN MIS-
HEMTs• TDDB behavior consistent with Si MOSFETs:
‒ Weibull distribution‒ SILC before breakdown
• For moderate gate voltage stress:‒ ΔVT > 0‒ IG ↓
• Beyond critical value of VGstress:‒ ΔVT < 0‒ Sudden ΔS ↑‒ Capacitance frequency dispersion ↑
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Conclusions• Developed methodology to study TDDB in GaN MIS-
HEMTs• TDDB behavior consistent with Si MOSFETs:
‒ Weibull distribution‒ SILC before breakdown
• For moderate gate voltage stress:‒ ΔVT > 0‒ IG ↓
• Beyond critical value of VGstress:‒ ΔVT < 0‒ Sudden ΔS ↑‒ Capacitance frequency dispersion ↑
Consistent with electron trapping
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Conclusions• Developed methodology to study TDDB in GaN MIS-
HEMTs• TDDB behavior consistent with Si MOSFETs:
‒ Weibull distribution‒ SILC before breakdown
• For moderate gate voltage stress:‒ ΔVT > 0‒ IG ↓
• Beyond critical value of VGstress:‒ ΔVT < 0‒ Sudden ΔS ↑‒ Capacitance frequency dispersion ↑
Consistent with electron trapping
Onset of trap generation in oxide/at MOS interface
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Acknowledgements
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Questions?
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