Chapter 2 Field-Effect Transistors(FETs)

97
SJTU Zhou Lingling 1 Chapter 2 Field-Effect Transistors(FE Ts)

description

Chapter 2 Field-Effect Transistors(FETs). Outline. Introduction Device Structure and Physical Operation Current-Voltage Characteristics MOSFET Circuit at DC The MOSFET as an amplifier Biasing in MOS Amplifier Circuits Small-signal Operation and Models Single-Stage MOS amplifier - PowerPoint PPT Presentation

Transcript of Chapter 2 Field-Effect Transistors(FETs)

Page 1: Chapter 2 Field-Effect  Transistors(FETs)

SJTU Zhou Lingling 1

Chapter 2

Field-Effect Transistors(FETs)

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Outline

• Introduction

• Device Structure and Physical Operation

• Current-Voltage Characteristics

• MOSFET Circuit at DC

• The MOSFET as an amplifier

• Biasing in MOS Amplifier Circuits

• Small-signal Operation and Models

• Single-Stage MOS amplifier

• The MOSFET Internal Capacitance and High-Frequency Model

• The depletion-type MOSFET

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Introduction

• CharacteristicsFar more useful than two-terminal deviceVoltage between two terminals can control the current

flows in third terminalQuite smallLow powerSimple manufacturing process

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Introduction

• Classification of MOSFET MOSFET

P channel Enhancement type Depletion type

N channel Enhancement type Depletion type

JFET P channel N channel

• Widely used in IC circuits

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Device Structure and Physical Operation

• Device structure of the enhancement NMOS

• Physical operation

• p channel device

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Device Structure of the  Enhancement-Type NMOS

Perspective view

Four terminals

Channel length and width

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Device Structure of the  Enhancement-Type NMOS

Cross-section view.

L = 0.1 to 3 m

W = 0.2 to 100 m

Tox= 2 to 50 nm

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Physical Operation

• Creating an n channel

• Drain current controlled by vDS

• Drain current controlled by vGS

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Creating a Channel for Current Flow

The enhancement-type NMOS transistor with a positive voltage applied to the gate.

An n channel is induced at the top of the substrate beneath the gate.

Inversion layer

Threshold voltage

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Drain Current Controlled by Small Voltage vDS

An NMOS transistor with vGS > Vt and with a small vDS applied.

The channel depth is uniform.

The device acts as a resistance.

The channel conductance is proportional to effective voltage.

Drain current is proportional to (vGS – Vt) vDS.

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vDS Increased

Operation of the enhancement NMOS transistor as vDS is increased.

The induced channel acquires a tapered shape.

Channel resistance increases as vDS is increased.

Drain current is controlled by both of the two voltages.

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Channel Pinched Off

• Channel is pinched offInversion layer disappeared at the drain pointDrain current isn’t disappeared

• Drain current is saturated and only controlled by the vGS

• Triode region and saturation region

• Channel length modulation

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Drain Current Controlled by vGS

• vGS creates the channel.

• Increasing vGS will increase the conductance of the channel.

• At saturation region only the vGS controls the drain current.

• At subthreshold region, drain current has the exponential relationship with vGS

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p Channel Device

• Two reasons for readers to be familiar with p channel device Existence in discrete-circuit. More important is the utilization of CMOS circuits.

• Structure of p channel device The substrate is n type and the inversion layer is p type. Carrier is hole. Threshold voltage is negative. All the voltages and currents are opposite to the ones of n channel

device. Physical operation is similar to that of n channel device.

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Complementary MOS or CMOS

The PMOS transistor is formed in n well.

Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well.

CMOS is the most widely used of all the analog and digital IC circuits.

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Current-Voltage Characteristics

• Circuit symbol

• Output characteristic curves

• Channel length modulation

• Characteristics of p channel device

• Body effect

• Temperature effects and Breakdown Region

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Circuit Symbol

(a) Circuit symbol for the n-channel enhancement-type MOSFET.

(b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel).

(c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

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Output Characteristic Curves

(a) An n-channel enhancement-type MOSFET with vGS and vDS applied and with the normal directions of current flow indicated.

(b) The iD–vDS characteristics for a device with k’n (W/L) = 1.0 mA/V2.

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Output Characteristic Curves

• Three distinct region

Cutoff region

Triode region

Saturation region

• Characteristic equations

• Circuit model

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Cutoff Region

• Biased voltage

• The transistor is turned off.

• Operating in cutoff region as a switch.

tGS Vv

0Di

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Triode Region

• Biased voltage

• The channel depth from uniform to tapered shape.

• Drain current is controlled not only by vDS but also by vGS

tGSDS

tGS

Vvv

Vv

DStGSn

DSDStGSnD

vVvL

Wk

vvVvL

Wki

)('

2

1)(' 2

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Triode Region

• Assuming that the drain-t-source voltage is sufficiently small.

• The MOS operates as a linear resistance

OVn

tGSnVvD

DSDS

VL

Wk

VVL

Wki

vr

GSGS

'

1

)('1

OVDS Vv 2

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Saturation Region

• Biased voltage

• The channel is pinched off.

• Drain current is controlled only by vGS

• Drain current is independent of vDS and behaves as an ideal current source.

tGSDS

tGS

Vvv

Vv

221 )' tGSnD Vv

L

Wki (

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Saturation Region

The iD–vGS characteristic for an enhancement-type NMOS transistor in saturation

Vt = 1 V, k’n W/L = 1.0 mA/V2

Square law of iD–vGS characteristic curve.

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Relative Levels of the Terminal Voltages

The relative levels of the terminal voltages of the enhancement NMOS transistor for operation in the triode region and in the saturation region.

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Channel Length Modulation

• Explanation for channel length modulation

Pinched point moves to source terminal with the voltage vDS increased.

Effective channel length reduced

Channel resistance decreased

Drain current increases with the voltage vDS increased.

• Current drain is modified by the channel length modulation

)1)' 221

DStGSnD vVvL

Wki +((

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Channel Length Modulation

The MOSFET parameter VA depends on the process technology and, for a given process, is proportional to the channel length L.

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Channel Length Modulation

• MOS transistors don’t behave an ideal current source due to channel length modulation.

• The output resistance is finite.

• The output resistance is inversely proportional to the drain current.

D

A

Dconstv

DS

Do I

V

Iv

ir

GS

1

.

1

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Large-Signal Equivalent Circuit Model

Large-signal equivalent circuit model of the n-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS

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Characteristics of p Channel Device

(a) Circuit symbol for the p-channel enhancement-type MOSFET.

(b) Modified symbol with an arrowhead on the source lead.

(c) Simplified circuit symbol for the case where the source is connected to the body.

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Characteristics of p Channel Device

The MOSFET with voltages applied and the directions of current flow indicated.

The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region.

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Characteristics of p Channel Device

Large-signal equivalent circuit model of the p-channel MOSFET in saturation, incorporating the output resistance ro. The output resistance models the linear dependence of iD on vDS

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The Body Effect

• In discrete circuit usually there is no body effect due to the connection between body and source terminal.

• In IC circuit the substrate is connected to the most negative power supply for NMOS circuit in order to maintain the pn junction reversed biased.

• The body effect---the body voltage can control iD

Widen the depletion layer Reduce the channel depth Threshold voltage is increased Drain current is reduced

• The body effect can cause the performance degradation.

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Temperature Effects and Breakdown Region

• Drain current will decrease when the temperature increase.

• BreakdownAvalanche breakdownPunched-throughGate oxide breakdown

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MOSFET Circuit at DC

a. Assuming device operates in saturation thus iD satisfies with iD~vGS equation.

b. According to biasing method, write voltage loop equation.

c. Combining above two equations and solve these equations.

d. Usually we can get two value of vGS, only the one of two has physical meaning.

e. Checking the value of vDS

i. if vDS≥vGS-Vt, the assuming is correct.

ii. if vDS≤vGS-Vt, the assuming is not correct. We shall use triode

region equation to solve the problem again.

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MOSFET Circuit at DC

The NMOS transistor is operating in the saturation region due to

tGD VV

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MOSFET Circuit at DC

Assuming the MOSFET operate in the saturation region

Checking the validity of the assumption

If not to be valid, solve the problem again for triode region

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The MOSFET As an Amplifier

Basic structure of the common-source amplifier.

Graphical construction to determine the transfer characteristic of the amplifier in (a).

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The MOSFET As an Amplifier and as a Switch

Transfer characteristic showing operation as an amplifier biased at point Q.

Three segments:

XA---the cutoff region segment

AQB---the saturation region segment

BC---the triode region segment

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Biasing in MOS Amplifier Circuits

• Voltage biasing scheme Biasing by fixing voltage

Biasing with feedback resistor

• Current-source biasing scheme

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Biasing in MOS Amplifier Circuits

The use of fixed bias (constant VGS) can result in a large variability in the value of ID.

Devices 1 and 2 represent extremes among units of the same type.

Current becomes temperature dependent

Unsuitable biasing method

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Biasing in MOS Amplifier Circuits

Biasing using a fixed voltage at the gate, and a resistance in the source lead

(a) basic arrangement;

(b) reduced variability in ID;

(c) practical implementation using a single supply;

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Biasing in MOS Amplifier Circuits

(d) coupling of a signal source to the gate using a capacitor CC1;

(e) practical implementation using two supplies.

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Biasing in MOS Amplifier Circuits

Biasing the MOSFET using a large drain-to-gate feedback resistance, RG.

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Biasing in MOS Amplifier Circuits

(a) Biasing the MOSFET using a constant-current source I.

(b) Implementation of the constant-current source I using a current mirror.

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Small-Signal Operation and Models

• The ac characteristic Definition of transconductance

Definition of output resistance

Definition of voltage gain

• Small-signal model Hybrid π model

T model

Modeling the body effect

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The ac Characteristic

Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

Small signal condition

OVgs Vv 2

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The ac Characteristics

• The definition of transconductance

• The definition of output resistance

• The definition of voltage gain

OVn

VvGS

Dm V

L

Wk

v

ig

GSGS

'

D

A

IiD

DSo I

V

i

vr

DD

Dmi

ov Rg

v

vA

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The Small-Signal Models

(a) neglecting the the channel-length modulation effect

(b) including the effect of channel-length modulation, modeled by output resistance ro = |VA| /ID.

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The Small-Signal Models

(a) The T model of the MOSFET augmented with the drain-to-source resistance ro.

(b) An alternative representation of the T model.

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Modeling the Body Effect

Small-signal equivalent-circuit model of a MOSFET in which the source is not connected to the body.

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Single-Stage MOS Amplifier

• Characteristic parameters

• Basic structure

• Three configurations

Common-source configuration

Common-drain configuration

Common-gate configuration

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Characteristic Parameters of Amplifier

This is the two-port network of amplifier.

Voltage signal source.

Output signal is obtained from the load resistor.

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Definitions

• Input resistance with no load

• Input resistance

• Open-circuit voltage gain

• Voltage gain

LRi

ii i

vR

i

iin i

vR

LRi

ovo v

vA

i

ov v

vA

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Definitions(cont’d)

• Short-circuit current gain

• Current gain

• Short-circuit transconductance gain

0

LRi

ois i

iA

i

oi i

iA

0

LRi

om v

iG

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Definitions(cont’d)

• Open-circuit overall voltage gain

• Overall voltage gain

LRsig

vo v

vG 0

sigv v

vG 0

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Definitions(cont’d)

Output resistance of amplifier proper

0

ivx

xo i

vR

Output resistance

0

sigvx

xout i

vR

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Definitions(cont’d)

Voltage amplifier

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Definitions(cont’d)

Voltage amplifier

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Definitions(cont’d)

Transconductance amplifier

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Relationships

• Voltage divided coefficient

sigin

in

sig

i

RR

R

v

v

oL

Lvov RR

RAA

omvo RGA

oL

Lvo

sigin

inv RR

RA

RR

RG

vosigi

ivo A

RR

RG

outL

Lvov RR

RGG

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Basic Structure of the Circuit

Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations.

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The Common-Source Amplifier

Common-source amplifier based on the circuit of basic structure.

Biasing with constant-current source.

CC1 And CC2 are coupling capacitors.

CS is the bypass capacitor.

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Equivalent Circuit of the CS Amplifier

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Equivalent Circuit of the CS Amplifier

Small-signal analysis performed directly on the amplifier circuit with the MOSFET model implicitly utilized.

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Characteristics of CS Amplifier

• Input resistance

• Voltage gain

• Overall voltage gain

• Output resistance

Gin RR

)////( LDomv RRrgA

)////( oLDmsigG

Gv rRRg

RR

RG

Doout RrR //

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Summary of CS Amplifier

• Very high input resistance

• Moderately high voltage gain

• Relatively high output resistance

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The Common-Source Amplifier with a Source Resistance

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Small-signal Equivalent Circuit with ro Neglected

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Characteristics of CS Amplifier with a Source Resistance

• Input resistance

• Voltage gain

• Overall voltage gain

• Output resistance

Gin RR

Sm

LDmv Rg

RRgA

1

)//(

Sm

LDm

sigG

Gv Rg

RRg

RR

RG

1

)//(

Dout RR

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Summary of CS Amplifier with a Source Resistance

• Including RS results in a gain reduction by the factor (1+gmRS)

• RS takes the effect of negative feedback.

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The Common-Gate Amplifier

Biasing with constant current source I

Input signal vsig is applied to the source

Output is taken at the drain

Gate is signal grounded

CC1 and CC2 are coupling capacitors

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The Common-Gate Amplifier

A small-signal equivalent circuit of the amplifier in fig. (a).

T model is used in preference to the π model

Neglecting ro

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The Common-Gate Amplifier Fed with a Current-Signal Input

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Characteristics of CG Amplifier

• Input resistance

• Voltage gain

• Overall voltage gain

• Output resistance

min gR 1

)//( LDmv RRgA

sigm

LDmv Rg

RRgG

1

)//(

Dout RR

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Summary of CG Amplifier

• Noninverting amplifier• Low input resistance• Has nearly identical voltage gain of CS

amplifier, but the overall voltage gain is smaller by the factor (1+gmRsig )

• Relatively high output resistance• Current follower• Superior high-frequency performance

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The Common-Drain or Source-Follower Amplifier

Biasing with current source

Input signal is applied to gate, output signal is taken at the source.

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The Common-Drain or Source-Follower Amplifier

Small-signal equivalent-circuit model

T model makes analysis simpler

Drain is signal grounded

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Small-Signal Analysis Performed Directly on the Circuit

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Circuit for Determining the Output Resistance of CD Amplifier

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Characteristics of CD Amplifier

• Input resistance

• Voltage gain

• Overall voltage gain

• Output resistance

Gin RR

mLo

Lov

gRr

RrA

1//

//

11

//

//

mLo

Lo

sigG

Gv

gRr

Rr

RR

RG

mo

mout g

rg

R1

//1

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Summary of CD or Source-Follow Amplifier

• Very high input resistance

• Voltage gain is less than but close to unity

• Relatively low output resistance

• Voltage buffer amplifier

• Power amplifier

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Summary and Comparisons

• The CS amplifier is the best suited for obtaining the bulk of gain required in an amplifier.

• Including resistance RS in the source lead of CS amplifier provides a number of improvements in its performance.

• The low input resistance of CG amplifier makes it useful only in specific application. It has excellent high-frequency response. Can be used as a current buffer.

• Source follower finds application as a voltage buffer and as the output stage in a multistage amplifier.

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The MOSFET Internal Capacitance and High-Frequency Model

• Internal capacitancesThe gate capacitive effect

Triode region Saturation region Cutoff region Overlap capacitance

The junction capacitances Source-body depletion-layer capacitance drain-body depletion-layer capacitance

• High-frequency model

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The Gate Capacitive Effect

• MOSFET operates at triode region

• MOSFET operates at saturation region

• MOSFET operates at cutoff region

oxgdgs WLCCC 21

032

gd

oxgs

C

WLCC

oxgb

gdgs

WLCC

CC 0

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Overlap Capacitance

• Overlap capacitance results from the fact that the source and drain diffusions extend slightly under the gate oxide.

• The expression for overlap capacitance

• Typical value

• This additional component should be added to Cgs and Cgd in all preceding formulas.

oxovov CWLC

LLov 1.005.0

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The Junction Capacitances

• Source-body depletion-layer capacitance

• drain-body depletion-layer capacitance

o

SB

sbsb

VV

CC

+1

0

o

DB

dbdb

VV

CC

+1

0

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High-Frequency Model

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High-Frequency Model

(b) The equivalent circuit for the case in which the source is connected to the substrate (body).

(c) The equivalent circuit model of (b) with Cdb neglected (to simplify analysis).

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The MOSFET Unity-Gain Frequency

• Current gain

• Unity-gain frequency

)( gdgs

m

i

o

CCs

g

I

I

)(2 gdgs

mT CC

gf

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The Depletion-Type MOSFET

• Circuits symbol

• Structure

• Characteristic curves

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Circuit Symbol for the n-Channel Depletion-Type MOSFET

(a) Circuit symbol for the n-channel depletion-type MOSFET.

(b) Simplified circuit symbol applicable for the case the substrate (B) is connected to the source (S).

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Physical Structure

• The structure of depletion-type MOSFET is similar to that of enhancement-type MOSFET with one important difference: the depletion-type MOSFET has a physically implanted channel.

• There is no need to induce a channel.• The depletion MOSFET can be operated at both

enhancement mode and depletion mode.

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Characteristic Curves

Transistor with current and voltage polarities indicated.

Typical value for discrete transistor: Vt = –4 V and k

n(W/L) = 2 mA/V2

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The Output Characteristic Curves

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The iD–vGS Characteristic in Saturation

the iD–vGS characteristic in saturation.

Expression of characteristic equation

Drain current with

221 )' tGSnD Vv

L

Wki (

0GSv

2

21 ' tnDSS V

L

WkI

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The iD–vGS Characteristic in Saturation

Sketches of the iD–vGS characteristics for MOSFETs of enhancement and depletion types

The characteristic curves intersect the vGS axis at Vt.