Field Effect Transistors (npn) - Amazon S3s3.amazonaws.com/cramster-resource/827_n_8744.pdf · 2...

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6.071 Field Effect Transistors, Spring 2002 1

Field Effect Transistors (npn)

gate

drain

source

base

collector

emitter

channel e- current fromsource to drain controlledby the electric fieldgenerated by the gate

FET3 terminal device

extremely high inputimpedance for base

BJT3 terminal device

emitter to collector e-current controlled bythe current injected intothe base

There are many types of transistors in addition to the bipolar junctiontransistor (BJT) that we have discussed so far. An important class of 3terminal transistors is the field effect devices. For these the control parameteris the electric field over the junction, as opposed to the current of the BJT.Since an electric field is associated with a voltage, the important advantage ofthe field effect devices is that there does not need to be a current into thecontrol element (the gate). This results in a very high input impedance and avery low leakage current.The easiest to understand are the junction field effect transistors (JFETs)which we will discuss first and in some detail. The metal oxide semiconductorFET (MOSFETs) are very important for digital logic implementations.

2


Types of FETs

• In addition to carrier type (N or P channel), there are differences in how the control element is constructed (Junction vs Insulated) and those devices must be used differently

Depletion mode junction FETs (JFET)npn

pnp

npn

pnpMetal oxide semi-conductor FET (MOSFET)

– depletion/enhancement mode– enhancement mode

(insulated gate FETs, IGFETs, are the same as MOSFETs)

As with the BJTs there are always two flavors of transistors, npn and pnp. Thedifference is the majority carrier (electrons or holes).

Since FETs are controlled by variations of the electric field over the jmction, itis possible to build a capacitor into the control element and thus to furtherreduce the leakage current. The metal oxide of a MOSFET forms thecapacitor at the input of the control element (the gate).

3


Basic FET Operation #1

The simplest example of a JFET starts with N-doped Si.

Nsource drain

source - terminal into which the carrier current is injected (n-type \ e- carriers)

At this level, the device is simply a resistor. Therefore, currentflows through the channel in proportion to the drain/source voltage.

We will start by describing the operation and control of a JFET. The basicaction of a JFET may be understood by considering a conducting channel.Start with n-doped silicon and add two terminals on either end. The device isnow a resistor whose resistance is given by the doping level.The three terminals of the JFET are labeled source, drain and gate. The sourceis analogous to the emitter of the BJT. The source is the source of the majoritycarrier. So in an n-type material, the carriers are electrons and the source isthus the source of electrons.The drain is analogous to the collector of the BJT, and so the majority carriercurrent flows from the source to the drain. Again in n-type material thecarriers are electrons and the conventional current flows in the oppositedirection.

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Add a gate structure to form a channel.

N

P

gate

source drain

gate

The two gate regions are actually connected together to define achannel for the carrier current.

The control of the FET current (resistance) is gained by changingthe size of the depletion zones surrounding the gates.

The gates are two regions of p-type material that are arranged to create achannel for conduction from the source to the drain. The two gate regions arealmost always connected together so that the user sees only one gateconnection.Notice, the above device is an npn JFET since the source is n-type, the gate isp-type and the drain is n-type. Do not look down from the gate, channel, gateand call this a pnp junction.

5


Basic FET Operation #3Surrounding each gate is a depletion zone, as there is for any PNjunction.

N

P

gate

source drain

gate

depletion zone

depletion zone

The depletion zone reduces the effective size of the N-doped channel and thus increases the apparent resistance of the channel.By modulating the drain to gate potential, the electric field in thedepletion zone between the gate and drain varies and thus the sizeof the depletion zone.

As with every pn junction there is a depletion zone surrounding the gate. Thisdepletion zone of course reduces the cross-sectional area of the n-type channelthat is available for electron conduction.The action of the JFET is governed by varying the gate to drain potential andthus by modifying the size of the depletion zone.

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N

Pdepletion zone

VDS

Here the drain to source voltage, VDS, is equal to the drain to gatevoltage. As VDS increases, the depletion zones move together; andthe source resistance increases.

A simple example is to ground the gate voltage to the source so that the drainto gate voltage is equal to the drain to source voltage. As the drain to gatevoltage is increased, the depletion zone increases and thus the conduction ofthe channel decreases.For small voltages the resistance increases with voltage and this is describedas the ohmic region.Above the pinch-off voltage the channel is saturated and the resistancebecomes constant. The pinch-off voltage may be pictured as the voltage wherethe depletion zones from the two gates meet.

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Define an apparent resistance across the FET, the channelresistance RC.

N

P

P

VDS

ID

ID

VDS

RC =VI

We will characterize the device by the junction’s effective resistance. Now ofcourse the typical measurement to characterize a transistor is to measure thedrain current as a function of the drain-source voltage for a set of currents (orvoltages) applied to the gate. Recall that this is exactly how we ran the testson the BJT.Once we have measured the drain current as a function of the drain-sourcevoltage we have the information to calculate an effective DC resistance for thisoperating point.

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Channel Resistance of FET

• As VDS increases, the depletion zone grows and the effective resistance slowly increases.• As VDS = VP (the pinch-off voltage) the two depletion zones meet, no additional current can flow and the resistance increases rapidly with VDS.• At VBR there is a “drain-to-gate avalanche”, which we will describe later.

VDS VDS

RCID

IP

VP VP VBRVBR

At left is the drain current vs the drain to source voltage for a grounded gate.The region from zero to the pinch-off voltage is the ohmic region, the flatregion is the saturation area and at higher voltages there is a breakdown regionwhere the conduction of the channel increases quickly. Many devices will bedestroyed if operated in this breakdown region, though (just like zener diodes)there are devices that are designed to function in this avalanche region.The plot at right shows the corresponding resistance. In the ohmic region theresistance increases only slowly, and then in the saturation region theresistance increases more quickly.It is important to notice that the drain current of the JFET is independent of thedrain-source voltage in the saturation region. As we will see shortly, in thisregion the drain current remains very sensitive to the drain-gate potential.So, if we want to obtain control via the gate then typically we will design thedevice to operate in the saturation region. If however we are looking forcontrol based on the drain voltage, then the device will be positioned in theohmic region.

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Gate Control of FET

• The size of the depletion zone can be increased by reverse biasing the PN junction at the gate, therefore the gate bias controls ID, and since the gate is reverse biased there is essentially no gate current.

VGS=0-1V

-2V

VDS

ID

VP

VDS

-VGS

IB

N

P

NPVGS VGS≡

Here we show the variation of the IV curve as a function of the gate voltage.Recall that at pinch-off the depletion zones of the two gates have met, and soas the gate voltage is changed this operating point is moved. It is mostcommon to reverse bias the gate (as shown in the circuit) thus increasing thefield over the PN junction and correspondingly increasing the size of thedepletion zone for a constant drain-source voltage.Notice that as the gate is reverse biased the pin

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JFET Specification

VGS = 0

VDS

ID

VGS = -1VVGS = -2V

IDSS

saturationregionohmic

region breakdown

ohmic region - JFET acts as a variable resistor.

saturation region - JFET is independent of the drain source voltage, but stronglydependent on gate voltage.

VOFF,GS ≡ cut-off voltage, gate-to-source voltage where theJFET acts as an open circuit.

BVDS ≡ drain-to-source voltage thatleads to current break through of the JFET channel.

IDS ≡ drain current for zero gate bias.

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†

ID = IDSS -2 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

VDS

VGS,OFF

-VDS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2È

Î Í Í

˘

˚ ˙ ˙ ;

JFET Performance

ohmicregion

= IDSS 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2

; saturation region

Some typical values:IDSS ~ 1mA Æ 1AVGS,OFF ~ -0.5V Æ -10VBVDS ~ 6V Æ 50V

The design of FET circuits is usually performed with relatively simpleequations for the drain current in terms of device parameters and the operatingconditions. These of course depend on if the operating point is in the ohmic orsaturation region.

Since the device performance should not depend critically on the circuitparameters, a few simplifying shortcuts are often taken and at the end thecircuit is evaluated with a simulation package (like spice). It helps greatly tobe able to break a design down into its functional parts and then to roughly seehow each should operate. This of course takes practice and here we will leadyou through the process.

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Transconductance

gm =∂ID

∂VGS VDS

: the rate of change of the drain current with a change of the gate bias

The transconductance is useful for the mode of a JFET as a voltage controlled resistor, and has units of (1/resistance), mhos.

gm =1

RDS VDS

= gm0

IDIDSS VDS

gm0= -

2IDSSVGS,OFF

≡ transconductance of ashorted gate.

An important, but not easy to understand, characteristic of a three parameterdevice is the transconductance, gm. Recall the we are modeling the FET as avoltage controlled resistor, therefore, the drain current is a function of the gateto source voltage. This of course is seen in the IV plots of the FET for thesaturation region. The transconductance is the rate of change of the draincurrent with a change in the voltage at constant drain-source voltage.The units of transconductance are inverse ohms (mhos).Generally the data sheets report both the transconductance for a shorted gate.Often in the analysis of FET circuits the circuit properties can be reduced to afunction of the transconductance.

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JFET Example18V

1kW

ID Find IDIDSS = 8mA, VGS,OFF = -4V

Since VDS appears to be greater than a few voltsand less than the breakthrough voltage,we will assume that the JFET is in the saturation region.

†

\ ID = IDSS 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2

= 8mA 1-VGS

-4VÊ

Ë Á

ˆ

¯ ˜

2

Note that the gate voltage is zero, and therefore the gate to sourceVoltage is minus the source voltage.

VGS = VG - VS = -VS = -ID 1kW\ ID = -VGS/1kW

Here we explore a simple example of a JFET derived current source. The gateis shorted to ground (note it is not shorted to the source). The source resistorintroduces a source voltage and thus there is a negative gate-source voltage.Let’s find the drain current as a function of the source resistor.The drain voltage is large enough that we can assume that the device isworking in the saturation region. Therefore we can immediately write downthe drain current as a function of the gate-source voltage.The gate source voltage is just minus the source voltage, and the sourcevoltage is the voltage drop of the drain current through the source resistor.

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JFET Example (continued)

So substituting into the above equation:

†

\ ID =-VGS

1kW= 8mA 1-

VGS

-4VÊ

Ë Á

ˆ

¯ ˜

2

This has solutions of VGS = -2V and -8V.Note VGS,OFF = -4V \ the only valid range of VGS is 0 Æ -4V

If VGS = -2V, then ID = 2mAVS = 2V, RJFET = 16V/2mA = 8kWVDS = 16V

We set the two equations equal to each other and end up with a quadraticequation for the drain current.Since the FET turns off at -4V the -8V solution is not physical and we choosethe -2V solution giving a drain current of 2 mA.From this we can also calculate the drain-source resistance of the device andthe voltage drop across the FET.

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Light DimmerVDD

VGS,OFF = -4V, IDSS = 12mA

†

\ ID = IDSS 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2

=12mA 1-VGS

-4VÊ

Ë Á

ˆ

¯ ˜

2

0-1-2-3-4VGS

ID

lamp off

dimmer lamp on12mA

A second example of a FET application is as a voltage controlled resistor.Here we look at the variation of the voltage drop across the FET to control thebrightness of the lamp (the brightness is a non-linear function of the currentthrough the lamp). When the gate is shorted to the source the drain current ishigh and the lamp is on. As the gate is negatively biased, then the draincurrent is reduced and the lamp dims. This continues until it is essentially off.You could combine this circuit with the pervious one to make a lamp dimmerthat functions via a variable resistor, but it is often convenient to have a devicethat is voltage controlled.

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Source Follower

VDD

Vout

Vin

RS

Analogous to the bipolar emitter followeramplifier. Provides no voltage gain, but does give a change in impedance, thereforeprovides a current gain.

Where RS < Rload, then VS ª RSIDID = gMVGS = gM(Vin - VS)

†

\VS

RS

= gM Vin -VS( ) or

†

VS =gM RSVin

1+ gM RS( )

Note Vout = VS, the gain is

†

gM RS

1+ gM RS( )

The JFET source follower is functionally similar to the BJT emitter follower.It also provides no voltage gain but does provide a change in impedance andthus a current (and power) gain.Now we still use good design practices, so thinking of the source follower as avoltage source, we arrange that the source resistor is much smaller than theload resistor and thus we can ignore the load in our analysis.The voltage drop over the source resistor is thus the source resistance times thedrain current. We can relate the drain current to the gate-source voltage viathe transconductance. And we see that the source voltage is also the outputvoltage.Notice, that the typically the transconductance corresponds to a smallerresistor (about 200 ohms) than the source resistor and thus the gain is about 1.

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Source Follower Amplifier

VDD

Vout

Vin

RSRB Rload

†

gain =Vout

Vin

=RS

RS + 1gM

; RB sets the bias of theJFET

The capacitors are for filtering.

A common amplifier configuration of the source follower. If we strip it downto the essentials, the capacitors are for removing DC, the gate resistor is forbiasing, and the load resistor can be ignored given the source resistance.Therefore, we see the same gain.

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Common Source Amplifier

VDD

VoutVin

RSRB

Rload

RD

†

gain =Vout

Vin

= -gMRDRB

RD + RB

An amplifier with gain is the common source configuration, here the voltage issplit over a drain resistor, the FET and a source resistor. The source resistoronly sets the DC operating point, notice that it is bypassed by a capacitor andso for high frequencies the source resistor is not in the circuit.

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When to use JFETs

• JFET have much higher input impedances and much lower input currents than BJTs.

• BJTs are more linear than JFETs. • The gain of a BJT is much higher than that of a JFET.

In general JFETs are only used when a BJT would not conveniently work,such as when the leakage current into the base of a BJT is too high.

For digital logic applications it has been important to use FETs, since they canbe much faster and they can dissipate less power. Most of these applicationshowever use MOSFETs which have even higher input impedances than JFETs.

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JFET, Voltage Controlled Resistor

VDD

Vout

Vcontrol

R1

Operate in the linear ohmic region

ID

VDS

†

ID = IDSS -2 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

VDS

VGS,OFF

-VDS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2È

Î Í Í

˘

˚ ˙ ˙

†

ID = IDSS -2 1-Vcontrol

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

VDD - R1ID( )VGS,OFF

-VDD - R1ID( )

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2È

Î Í Í

˘

˚ ˙ ˙

VDS = VDD - R1ID; VGS = Vcontrol

Occasionally it is more convenient to operate in the ohmic region than in thesaturation region. The analysis does not in any way change, but the equationsare bit messier. Here we calculate the behavior of a JFET used as a voltagecontrolled resistor. As expected you end up with a quadratic function again.

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ID (mA)

Vcontrol (V)

JFET, Voltage Controlled Resistor (continued)

†

\R1

2IDSS

VGS,OFF2

Ê

Ë Á

ˆ

¯ ˜ ID

2 + 1-2R1IDSS

VGS,OFF

1-Vcontrol -VDD( )

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

È

Î Í

˘

˚ ˙ ID

= -IDSS2VDD

VGS,OFF

1-Vcontrol

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜ +

VDD2

VGS,OFF2

È

Î Í

˘

˚ ˙

For IDSS = 12mA, VGS,OFF = -5V, VDD = 10V, R1 = 2kW:

The curve was drawn with Mathematica to show the variation in the draincurrent with the input voltage. This can be a useful means of providing aprecise and controllable offset.

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The Effective Resistance of the JFET

†

RJFET =VDS

ID

=VDD

ID

- R1

RJFET (W)

Vcontrol (V)

Given the variation in current it is a simple enough process to report it as aresistance, again via mathematica. Notice that in the ohmic region we canpermit the gate - source voltage to be positive.It usually is wise in any application to also calculate the power dissipated inthe FET, which of course will be a function of the control voltage. Here ofcourse the maximum power is dissipated when the FET resistance is equal tothe drain resistor.

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Electronic Gain Control

RC

Vin

RF

Vout

Vcontrol

Vin

RF

Vout

†

gain =RC + RF

RC

\We can achieve an electronic control by replacing the control resistor by a JFET:

We will see next lecture that op-amps provide convenient differentialamplifiers and that their gain is controlled by the feedback resistors. A JFETmakes a very convenient voltage controlled resistor and thus a voltagecontrolled gain.

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Frequency Dependence of yfs

Vout ≡ AC part of VDS = yfs·Vin · RL

VDS = VDD - Id · RL; VDS = VDD - yfs·Vin · RL

Vin = VGS ; Id = yfs·Vin

recall yfs =DI

DVGS VDS

Vin1MW

VDS

Vout

VDD

RL

bypass

Here is a test circuit for measuring the frequency dependence of thetransconductance (here yfs as it is often reported for high frequencies). Thelarge gate resistor is only for stability.

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JFET Symbols

gate gate

draindrain

source sourceNPN PNP

• Often the gate areas are doped to different extents leading to the specifications of drain/source.• For some devices the drain and source are interchangeable.• Occasionally, the two gates are not interconnected leading to a four-terminal device.

As with BJTs there are both npn and pnp type JFETs, the NPN are often calledn-channel to avoid any confusion with the gate configuration.

The drain and source may be interchangeable, or not depending on theirrelative dopant levels.

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JFET data sheet

27


JFET data sheet

28


JFET data sheet

29


MOSFET #1

Metal-oxide-semiconductor-field-effect-transistors are quitedifferent than JFETs and come in a potentially confusing set of varieties.

The defining feature is that the gate is capacitively coupled.

enhancement-mode, npn MOSFETabsence of gate field ≡ source drain

\ very low leakage current

source draingate

metalinsulator

P

N N

MOSFETs are today more common than JFETs, but there are also a confusingarray of them and it is too much to cover in detail. The basic clever step wasto realize that if you only cared about the electric field from the gate to drain,then there was no need for a galvanic connection and a capacitive connectionwould work as well. So in the MOSFET there is a layer of insulator (glass)between the gate connector and the p-doped semiconductor.Notice that in the absence of a gate voltage the semiconductor is arranged suchthat there is a NPN junction between the drain and source, and so this lookslike two back to back diodes and thus there is a very low drain to sourcecurrent. Contrast this with the BJT (where the gate region is small), and theJFET (where the drain and source form a conducting channel).

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Enhancement Mode MOSFET

P

NN

substrate connector

A positive gate substratevoltage induces negativecharge between thesource and the drain andcreates a n-type channel.Current can now flow.

VG

In exploring the action of a MOSFET we start by looking at the capacitivejunction of the gate and ask what the charge distribution in the semiconductorwill be for various gate potentials. Notice that we are now interested in apotential difference between the gate electrode and the substrate (at thismoment we have not invoked the source or drain).If the gate to substrate is positively charged, then we will concentrate electronsbetween the n-type channels of the source and drain and current can flow.This is of course majority carriers in the source and drain regions and minoritycarriers in the gate region (but we have concentrated them).This is the normal conduction mechanism for so called enhancement modeMOSFETs.

31


MOSFET Symbols

drain

sourcesubstrate

gate

drain

sourcesubstrate

gate

drain

sourcesubstrate

gate

drain

sourcesubstrate

gate

N-channel

N-channel P-channel

P-channel

Depletion Mode

Enhancement Mode

In addition to enhancement mode MOSFETs there are also depletion modedevices. The various symbols are shown above. In using these devices it isimportant to pay attention to the substrate connection since this forms thesecond terminal of the gate capacitor.

32


Depletion Mode MOSFET

source draingate

insulator

PN+ N+N

The source and drain regions are more heavily doped than thechannel, but at zero gate bias there is a current.

In depletion mode devices the second side of the gate capacitor is a smallregion of n-type material. Now with no gate bias there is an n-type channelfrom the drain to the gate and current flows. This gate region is lightly dopedand the electric field in the gate capacitor is used to manipulate the carrierconcentrations in this region and obtain control of the drain-source current.

33


Depletion Mode MOSFET #2

N N

P

N

A negative voltage between the gate andsubstrate induces a p-type channel into then-doped gate region andturns off the source-draincurrent.

A negative bias across the gate substrate capacitor pulls holes from the p-typematerial into the conduction channel and reduces the drain source current. Inthis operation the device looks like a JFET, where a negative gate potentialretards the drain current.

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N-channel Depletion-mode MOSFET

Cutoff voltage, VGS,OFF - gate/sourcevoltage where IDª0.

Breakdown voltage, BVDS - drain/sourcevoltage for current break-throughof the channel.

Drain current for zero bias, IDSS -Transconductance, gm - rate of change of

drain current with with the changeof the gate/source voltage at a particular drain/source voltage.

The IV plot for a depletion mode MOSFET data sheet, the other parametersare always given somewhere in the data sheet.

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Formulas: Depletion-Mode MOSFET

†

ID = IDSS -2 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

VDS

VGS,OFF

-VDS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2È

Î Í Í

˘

˚ ˙ ˙

†

ID = IDSS 1-VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜

2In ohmic

In active

†

gm = gmo

ID

IDSS

;gmo=

2IDSS

VGS,OFF†

RDS =1

gm

; Drain-source resistance

As with the JFET there are a series of formula relating the drain current to thedevice and circuit parameters. These are used just like those of the JFET.

36


Formulas: Enhancement-Mode MOSFET

VGS,th - Threshold voltage for startof conduction.

k - construction paramater.

†

=ID,ON

VGS,ON -VGS,th( )2

†

ID = k 2 VGS -VGS,th( )VDS - 12VDS

2[ ]

†

ID = k VGS -VGS,th( )2

Ohmic:

Active:

†

gm = gmo

ID

ID,ON

;RDS =1gm

VGS = 14V

VGS = 12V

VGS = 10V

VGS = 8V

VGS = 6VVGS = 4V

The formulas for enhancement mode are quite similar, but include the so-called construction parameter that describes the channel capacity. This isoften explicitly listed on the data sheet, so it is not necessary to calculate.

37


Transfer Characteristics of Three FET Types

Here we show the transfer characteristics of the three types of MOSFETs, (1)depletion, (2) enhancement, and (3) both. The IV plots at right show the draincurrent vs drain source voltage for various gate potentials. This is what isnormally found in the data sheets. The curves at left show how the draincurrent varies as a function of the gate potential in the active region. This isnot often shown, but it is a good way of viewing the differences between thethree types of devices. It also helps to see where the operating points shouldbe set.

38


Example: N-channel , depletion-mode MOSFETAmplifier

MOSFET characteristics:IDSS = 10mAVGS,OFF = -4VVDD = 4VRD = 200W

1MW

VDD

RD

Vin

Vout

The problem is to find the gain.

The action of the MOSFET is to be a voltage divider and to shareVDD over RD and RDS. Vin will control the value of RDS. The 1MW resistor is only included for stability and to correct for leakCurrents into the gates; so, let’s ignore it.

As an example we look at the operating point of a depletion-mode MOSFETamplifier. The FET and drain resistor share the voltage and as the gate isreverse biased the the FET shuts down and the voltage grows across the FET(the output voltage increases).

39


Calculate the gain in the neighborhood of Vin=0, then

ID = IDSS = 10mAand Vout = VDD - IDRD = 4V - (10mA)(200W) = 2V

To see how this changes with Vin, let’s calculate theTransconductance at Vin = 0.

†

gmo=

2IDSS

VGS,OFF

=20mA-4V

= 5 ¥10-3 1W

Recall that the transconductance gm=1/RDS.

and

†

Vout =RDS

RDS + RD

Ê

Ë Á

ˆ

¯ ˜ VDD

Example (continued)

Since we are looking for a change in current (resistance) with the controlvoltage, we nee to think about the transconductance, but first we need todecide about which point to calculate the gain. Let’s look in the neighborhoodof zero input voltage. Now the drain current can be taken from the data sheetand the output voltage is found to be 2 V (conveniently in the middle). Wecan also directly calculate the transcoductance which is 200 mohs. Since thisgives us the drain source resistance we can calculate the gain.

40


†

gm = gm01-

VGS

VGS,OFF

Ê

Ë Á

ˆ

¯ ˜ =

5 ¥10-3

W1+

Vin

4VÊ

Ë Á

ˆ

¯ ˜

Example (continued)

From our formulas,

This gives the change in RDS with a change in Vin.Now assume that RDS varies slowly so that DRDS << RDS ª RD. Under this case,

†

Vout ª 2V +DRDS

400W

Ê

Ë Á

ˆ

¯ ˜ ⋅ 4V

and the change in Vout with DRDS is

†

DVout ªDRDS

100From gm = 1/RDS, we find RDS = 200W(1+Vin/4)-1

In this case lets assume a small signal and look for a linear solution aroundzero input voltage. We will make a few assumptions and throw away a fewterms to keep from have a quadratic problem. Either way works and of coursewill give essentially the same answer. Recall that all of the circuit parametersvary.We rewrite the output voltage for small changes in the drain source resistance,and find that the output voltage varies slowly with this.

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†

DRDS = 200W -200W

1+ Vin4

=200W ⋅Vin

4 + Vin

Example (continued)

Again we look around Vin ª 0, so Vin << 4 and DRDS ª 50W⋅Vin.Pulling this together then,

†

DVout ª50W100

Vin =12

Ê

Ë Á

ˆ

¯ ˜ Vin

So the gian is -1/2.

Expand the drain-source resistance in terms of the input voltage and then usethe fact that the input voltage is small to simplify this. The result is that thedevice is an attenuator (has a gain of one half) rather than an amplifier. Youshould recognize that if we increased the voltage (or reduce the drain resistor)we could increase the gain.

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MOSFET

One of the most important uses of MOSFETs is to build logic circuits thatdissipate very little power. If we build the above MOSFET configuration wesee that in one configuration there is a current into the load, and not in theother.Notice that the substrate is grounded to the source.

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MOSFET

In a p-channel device the current is associated with the on state.

Here notice that the substrate is still grounded to the source (which is now at apositive voltage).

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MOSFET inverter

In complementary MOSFET logic (CMOS) the same gate is built from acombination of p and n channel devices in such a fashion that there is nocurrent flow in either logical state. Of course no current means no power isdissipated.

Field Effect Transistors (npn) - Amazon S3s3.amazonaws.com/cramster-resource/827_n_8744.pdf · 2...

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Transcript of Field Effect Transistors (npn) - Amazon S3s3.amazonaws.com/cramster-resource/827_n_8744.pdf · 2...