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Introduction

Inverter is fundamental logic gate uses single input.

Basic principles employing in design and analysis of

inverter can be directly applied on complex gates.

Therefore inverter design forms basis for digital circuits.

First we start with DC Characteristics.

What do you understand by DC response of the

circuit?

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Introduction (contd.)

The DC response is Ultra Low Frequency response of theCircuit.

When you are at a logic low or high before switching it

is a DC condition.

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Actual Inverter CharacteristicsGeneral Model of inverter

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Noise Immunity and Noise Margins

Output signal is transmitted through interconnect to next inverter.

Interconnects are prone to noise. Suppose output of 1st inverter is

perturbed, and its level is higher than VIL than it can not be correctly

predicted at output of 2nd

inverter. Thus VIL is max allowable input voltage which is low enough to ensure

1 output.

Similarly VIH is minimum allowable input voltage which is high enough

to ensure 0 output.

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Noise Immunity and Noise Margins Noise tolerance also called Noise Margins and denoted by NM. Two

noise margins will be defined : for low signal level as NML and highsignal level as NMH as

Justification for VIL and VIH

noise

in

outinout

noiseinoutinout

VdV

dVvfV

VVfVVfV

(!

(!!

)(

)();(

'

'

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CMOS INVERTER

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Region of operation:

TOPINTOPIN

TOPGSPTOPGSPDDTOPIN

DDTOPINDDTOPIN

TOPGSPTOPGSPTOPGSP

-VVV-VVV

-VVV-VVVVVV

VVVVVV

VVVVVV

"

""

"

TOUTOU

DSPDSP

PMOS

SATURATEDLINEARCUTOFF

TOnINTOnINOUT

TOnGSnTOnGSnTOnIN

TOnINTOnIN

TOnGSnTOnGSnTOnGSn

-VVV-VVV

-VVV-VVVVV

VVVV

VVVVVV

"

"

""

""

TOU

DSnDSn

NMOS

SATURATEDLINEARCUTOFF

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If KR = 1 Then

Ideal Logic threshold

value.

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Next Topic

MOS Inverter : Dynamic Characteristics