Module 3: Part 1 The Field-Effect Transistor (FET)

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Module 3: Part 1 The Field-Effect Transistor (FET)
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Transcript of Module 3: Part 1 The Field-Effect Transistor (FET)

Page 1: Module 3: Part 1 The Field-Effect Transistor (FET)

Module 3: Part 1

The Field-Effect Transistor

(FET)

Page 2: Module 3: Part 1 The Field-Effect Transistor (FET)

Learning ObjectivesAfter studying this module, the reader should have the ability to: Understand and describe the general operation of n-channel and p-

channel enhancement-mode and depletion-mode MOSFETs. Understand the meaning of the various transistor parameters,

including threshold voltage, width-to-length ratio, and drain-to-source saturation voltage.

Apply the ideal current-voltage relations in the dc analysis and design of various MOSFET circuits using any of the four basic MOSFETs.

Understand how MOSFETs can be used in place of resistor load devices to create all-MOSFET circuits.

Qualitatively understand how MOSFETs can be used to switch currents and voltages to perform digital logic functions, and to amplify time-varying signals.

Understand the general operation and characteristics of junction FETs.

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Page 4: Module 3: Part 1 The Field-Effect Transistor (FET)

(a) An NMOS common-source circuit and (b) the NMOS circuit for Example 5.3

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(a) A PMOS common-source circuit, (b) results when saturation-region bias assumption is incorrect, and (c) results when non-saturation-region bias assumption is correct

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Transistor characteristics, vDS (sat) curve, load line, and Q-point for the NMOS common-course circuit in Figure 5.24 (b)

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NMOS common-source circuit with source resistor

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Circuit with enhancement load devices and NMOS driver

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Voltage transfer characteristics of NMOS inverter with enhancement load device

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(a) Depletion-mode NMOS device with the gate connected to the source and (b) current-voltage characteristics

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Circuit with depletion load device and NMOS driver

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Voltage transfer characteristics of NMOS inverter with depletion load device

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(a) An NMOS common-source circuit with a time-varying signal coupled to the gate and (b) transistor characteristics, load line, and superimposed sinusoidal signals