Chapter 3Manufacturing Wafers

半導體製程材料科學與工程研究所張翼 教授

Figure 3.1 Hydrogen reduction of trichlorosilane.

Figure 3.2 Unit cell of silicon.

Figure 3.3 GaAs crystal structure.

Figure 3.4 Poly- and single-crystal structures.

Figure 3.5 Crystal planes.

<111> are most widely used planes for Si.

Figure 3.6 Wafer orientation indicators.

Si<100> MOS devices<111> Bipolar devices GaAs<100>

EPD: Etch Pit Density

Figure 3.7 Czochralski crystal-growing system.

Seed and crucible are rotated in the opposite direction.

Crucible (silica) CZ, LEC, FC: Three popular m

ethods for growing wafers CZ is the most widely used m

ethod for Si Can also be N or P-type dope

d

Figure 3.8 Crystal growth from a seed.

Heated to 1415℃ → Take 3 days to grow a crystal (12 inches are available now)

Figure 3.8

→ surface tension

Figure 3.9 LEC system of crystal growth.

Widely used for GaAs wafer Need B2O3 to prevent As evap

oration

Figure 3.10 Float-zone crystal-growing system.

Low oxygen content Smaller diameter Higher dislocation density Used for Thyristors and Recti

fiers

Figure 3.11 Comparison of CZ and float crystal-growing methods.

Figure 3.12 Vacancy crystal defect.

Point defect Dislocations Growth defects: slip line

twin

Figure 3.13 Crystal slip.

Figure 3.14 Crystal diameter grinding.

Wafer were grown a few degrees off orientation for ion implantation or epi-growth

Figure 3.15 Crystal orientation determination.

ORIENTATION DETERMINATION

: X-ray diffraction Light reflection

Figure 3.16 Crystal flat grinding.

Figure 3.17 Wafer flat locations.

Four point probe determine resistivity→doping conc.

Hot point probe with polarity meter to detective polarity

Figure 3.18 Inside-diameter saw wafer slicing.

Figure 3.19 Laser dot coding (Reprinted from the Jan. 1998 edition of Solid State Technology, Copyright 1998 by PennWell Publishing Company.)

Coding

Figure 3.20 Cross section of MOS transistor.

Figure 3.21 Abrasive and chemical-mechanical surface polishing.

abrasion slurry lapping: remove surface damage from dicing

CMP: slurry of silica with mild etchant

(potassium/ammonium hydroxide)

Alkaline slurry grow oxides and then mechanically removed.

Figure 3.21

rough polishing

Figure 3.21

CMP polishing

Figure 3.22 Trapping.

Formed by sand blasting Backside damage → dislocat

ion → trap of mobile ionic contamination (Gettering)

Figure 3.23 Wafer edge grinding.

Figure 3.24 Typical 200-mm wafer specification.