Post on 15-Apr-2018
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor
Field Effect Transistors
Metal Oxide Semiconductor FETs
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
• MOSFET device can be characterized in a large variety of ways
IDS versus VDS
IDS1/2 versus VGS with gate to drain shorted to drain power supply
Channel conductance gDS in linear region versus VGS
Channel resistance rd in saturation region versus VDS at different VGS
Transconductance gm in linear and saturation regions versus VGS at different VDS
Metal Oxide Semiconductor FETs
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
IDS versus VDS for an n-channel MOSFET (left) and IDS1/2 versus VGS and its
corresponding slope with VGS = VDS causing transistor to go into saturation (right).
Metal Oxide Semiconductor FETs
Yields linear relation between IDS1/2 and VGS – VT
Slope =
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Channel conductance gDS versus VGS in linear region for VDS = 0.050 V (left) and
channel resistance rd versus VDS in saturation region for several values of VGS (right).
Metal Oxide Semiconductor FETs
Channel resistance rd equals slope of IDS versus
VDS in saturation region
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Transconductance gm versus VGS at various VDS in linear and saturation
regions (left) and low-frequency small-signal model of the MOSFET (right).
Metal Oxide Semiconductor FETs
Linear region
Saturation region
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView program used to generate IDS versus VDS for VGS
ranging from 0 to 5V in 0.5 V steps
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView data generated for IDS versus VDS for VGS ranging from 0 to
5V in 0.5 V steps; determine the pinch-off locus from the acquired data
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView program used to generate gDS versus VGS for
VDS = 100 mV in linear region
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView data generated for gDS versus VGS for VDS = 100 mV in linear
region; determine both VT and µnZCi/2L from the acquired data
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView program used to generate rD versus VDS at
VGS = 2.5, 3.0, 3.5, 4.0, 4.5, and 5.0 V
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView data generated for rD versus VDS at VGS = 2.5, 3.0, 3.5, 4.0, 4.5,
and 5.0 V (left) and calculated values from IDS-VDS characteristics (right)
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView program used to generate gm versus VGS
at VDS = 1.0 V, 3.0 V, and 5.0 V
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
Labview data generated for gm versus VGS at VDS = 1.0 V, 3.0 V, and 5.0 V
and used to determine both VT and µnZCi/2L from the acquired data (left)
and calculated values from IDS-VDS characteristics (right)
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView program used to generate ID(sat) versus VDS when VDS = VGS
causing transistor to go into saturation
Electronic Devices Laboratory mtinker@utdallas.edu CE/EE 3110
Metal Oxide Semiconductor FETs
LabView data generated for ID(sat) (left) and ID(sat)1/2 (right) versus VGS
when VDS = VGS causing transistor to go into saturation used to
determine both VT and µnZCi/2L from the acquired data