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Rob GrayFreelance EmbeddedElectronics Designer

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TABLE OF C ONTENTS

Rob Gray 4Freelance Embedded Electronics Designer

BUSnet/MAXX 9BY ROB GRAY

Featured Products 15

Using Hall Effect Measurements toCharacterize MaterialsBY MARY ANNE TUPTA AND ROBERT GREEN WITH KEITHLEY

Buffered Communication Between 19Real-Time Software ProcessesBY DAVE LACEY WITH XMOS

RTZ - Return to Zero Comic 24

Learn about Rob Grays current projectan RS-485-based async network for thecommercial to light-industrial monitoring and control market.

Interview with Rob Gray

Characterize the properties of graphene or graphene-based material structures usingHall effect measurements.

Allow software processes to communicate using various programming languages.

16



INTERVIEW

Freelance EmbeddedElectronics DesignerHow did you get intoelectronics/engineering andwhen did you start?

I was living in London for a yearbetween 1978 and 1979. At the time I

was a photographer but Ive alwayshad an interest in electronics sinceI was a lad; I remember wantingto control the direction of a motor

when I was about 10 years old, so

I made what I now recognize as anH-bridge from switches and wiresnailed to a square of chip board.

Ive also always had an interest inmodel railways, so moving on 15

years and several continents, I foundmyself sitting in my London flat

wondering how I would control theboom gates on a model train layoutsuch that when a train approacheda crossing the gates would lower

and cars would stop.

I started drawing circuits using thetechnology that I was familiar with,namely magnets and reed switches,and while the results werent veryclever the seed was sown.

I then bought some books, mostnotably one called The CMOS

Cookbook, and was amazed at thepossibilities these little black multi-legged devices offered.

On my return to Australia I starteddoor knocking at all the engineeringfirms I could find in the phone book.I had nothing but my enthusiasmand some rolled up circuit diagramsunder my arm and while Im suremy circuits didnt impress anyone,my enthusiasm obviously did, and

I found myself changing vocationsafter talking to the owner of the firstfirm I approached.

What are your favoritehardware tools that you use?

Without a doubt my logic analyser.How anyone can design micropro-cessor/controller systems withoutone I have no idea, and Ive used

them since the 80s although the re-

Rob Gray



INTERVIEW

quirements have changed over theyears. In those days most peripher-als were external to the processorand we were dealing with both dataflow and timing issues so a wideand fast (read: expensive) analyser

was needed.

These days most high speedperipherals are internal to thecontroller. The hard stuff has beendone by the IC manufacturer, so

while there are still some timingissues, its more a case of lookingat data flow on serial links of variouspersuasions. For this you can get

a really good analyser with serialdecoders for $150 and a fantasticone for about twice that.

What are your favoritesoftware tools that you use?

My PC-based logic analyser clientapplication.

What is the hardest/trickiestbug you have ever xed?

I dont remember the details butit was with some code running ona 2900 series bit-slice processor.The processor had a very limitedstack depth, maybe only four or fivelevels, and the program was largeand had been around a long timeso it was impossible to analyse thestack depth at any particular part ofthe code. So when a code patch wasdecided upon I was never game toinsert a call to a function. The result

was a program that was all butimpossible to follow where half thecode consisted of jumps to patches

within jumps to patches, and thecustom 64-bit wide instruction setdidnt help.

One bug took days to track downand this was in a core part of

the network co-processor on amainframe, so the pressure was on.

As is often the case, it was a simpleerrorsomething like code that fell

through to a return, or performed apush when it shouldnt haveit wasfinding it that was the hard part. Notthe stuff of legends but it was prettydifficult at the time.

I find that everything

is moving too fast.

We all joke abouta product being

obsolete by the time

it gets to the shops,

but that forces

reduced time spent in

R&D and therefore

reduced quality.

What is on your bookshelf?

One book on VB.NET, one onSwing, two about PHP and a single

Java tome. There are also threebird-watching guides, and a hot

air soldering station. The usual mixreally. Thats a total of eight books,of which none are applicable toembedded processor design.

These days I find that there is noneed to have multiple shelvesgroaning under the weight of booksas I did in the past. Most information

can be found on the Web in PDF orother formats, for example IC databooks. I used to have maybe 20Natsemi data books, each one twoinches thick, then maybe another15 from TI, a few Zilog publicationsand a dozen from Motorola just toname a few. Now if I want data onan IC I let my fingers do the walkingand Google do the searching.

Do you have any tricks upyour sleeve?

With modern SMD components itsno longer practical or even possibleto connect test equipment directly

to the component for debuggingprototypes. And trying to hold aprobe on a TQFP leg is an accident

waiting to happen. This means amethod of connecting test gearshould be implemented on the PCBand the most obvious method is toadd a header.

However, these same SMDs alsomean smaller and tighter boards;

even a 6-way standard-pitch headerconsumes a huge amount of boardreal estate.

My solution is distributed test points.

I identify the signals that will beneeded for debugging and ensurethat there is an access pointsomewhere on the board for thosesignals.

This can be as simple as not having

solder mask tenting on a via, butnormally I place an over-sized viaon the signal, either replacing anexisting via or just dropped on thesignal trace in a convenient location.

This test via is hexagonal in shapeto help identify it and I often addan overlay label as well. It also has



INTERVIEW

a larger hole to make it easier tosecurely hold a probe on the testpoint or even solder in a flying wire.

What has been your favoriteproject?

Probably a wireless remote cattletrough monitor I designed in thelate 80s. This had two halves, theremote was a 6805-based solar-powered unit that slept for most ofthe time but woke occasionally totest the water level in the trough andtransmit a short burst of data to abase station.

The base station used a popular Z80-based personal computer of the day.The computer provided keyboardand screen IO but used audio tapesto load programs. I considered thisto be a major stumbling block for

what was essentially a consumerproduct. So I designed a mezzanineboard that had EPROMs to hold theapplication code, a real time clockand a serial port to interface with

the RF receiver.Then I had the problem of turn-around time for program iterations

when developing, as that requiredEPROMs to be burnt, so I designedan EPROM emulator that featureda 20V10 programmable logic arrayand a Z8 microcontroller.

The Romulator as it becameknown earned me the Inventor of

the year award for my home stateand went on to be a product in itsown right. In fact, it was much moresuccessful than the system it wasdesigned to help build.

C cross-compilers were expensivethen and they werent very efficient atgenerating code for these resource-challenged processors, so all the

above was written with thousands oflines of Z80, Z8 and 6805 assemblycode.

Those were the days.

Do you have any note-worthyengineering experiences?

While working in the R&D sectionof a large multi-national computerfirm I was asked to cycle the poweron one of the mainframes. Thecomputer in question had beenshut down with all apps terminated,disks spun down and databasesclosed. All I had to do was press the

power button.

...one challenge will

be to get reliable

products out in less

time than we used to.

Fortunately, the toolsare much better these

days and that helps,

but I hate the fact that

something I design

may have the life

span of a house fly.

The button in question was a typethat did nothing electrically whenpressed but went open circuit

when released which was fortunatebecause the instant I pressed it I

realised I was about to pull the rugfrom under the wrong mainframe.Now killing the power of a mainframein mid stride is a very bad thing butI had not released the button so noharm was done, but like a soldierstanding on a landmine I couldntmove and therefore couldnt tellanyone of my predicament.

Eventually someone came into theroom, they informed all concernedparties and an orderly mainframeshutdown was started. But I hadto stand there for some timeproviding the chief source of office

entertainment until I could releasethe button.

On a more serious note, I waselectrocuted once (well severaltimes really but once of particularnote). With digital clocks in everyhome appliance from TVs totoothbrushes it can be a real painto reset them all after disconnectingpower from a house. So given thatIm a lazy fellow I tend to work on

simple jobs with the wiring hot.Normally the first time I touch abare wire I use the back of my handso if its live my muscles will pull thehand away, but on this occasion I

was not concentrating and grabbedthe bare wires between my thumband first finger.

The experience is not something I would recommend and my handwould not let go of the wires. It allhappened very fast but I think whatsaved me was the fact that my bicepalso contracted and pulled my armaway from the wire, as the wire wasshort and mechanically fixed atthe other end so my arm musclesoverrode my finger muscles andpulled my hand off the wire.



INTERVIEW

For some time I had burn holes inmy skin, and I no longer have anymains-driven digital clocks.

And in the famous last words

category, I remember looking ata microprocessor data sheet forthe first time in the early 80s andthinking, These things are useless.

What are you currentlyworking on?

I have two major fields of interest:serial monitoring and controlnetworks and embedded processordebugging tools. Im currently

spending a large part of my timedesigning two specific projects inthese domains.

The networking project is calledBUSnet and it has an associatedproject called MAXX that is amonitoring and control system.

On the debugging tool front Im working on a tool that will help with the debugging and testing

of embedded microprocessordesigns. Its working title isQUADD which stands for QuiteUseful All-purpose DebuggingDevice and it sports a LPC1768 asthe control processor. This project

will also let me work with some PC-based GUI programming, anotherfield I enjoy.

What direction do you see

your business heading in thenext few years?

After what I consider to be areasonably successful career inIT and embedded design, I semi-retired in 1999 at the age of 45. Ihave no real need to work, andin fact I have not done so since.I do miss the embedded design

world though and have recentlythrown my hat back in the ring as afreelance designer under the nameGRAYnomad Designs. If youveseen my website youll understand

where the nomad part comesfrom.

So I guess my direction is towork with projects that I find reallyinteresting.

What challenges do youforesee in our industry?

I dont have my finger on the pulse asmuch as I used to, but that actually

may have allowed me to see somethings clearer. I think I may seechanges more than someone whosbeen in the job all that time, in thesame way that you can keep buyinglarger jackets over the years andnot notice that you are getting fat,and then you try on your old schoolblazer and find that youd need asecond one to make the ends meet.

In light of that rather tenuous

analogy, one thing I am noticing afteran absence from the game is theshort lifespan of some components.There was a time when you coulddesign a circuit using a few 74xx00-series ICs and be reasonablycertain that your grand kids woulduse the same components shouldthey become engineers. That isdefinitely no longer the case. Forexample, I spent some time recently

selecting a particular IC; I foundone that had just the right featuresand started working it into a design.Then I thought I should check itsprice as there is no point includinga $10 chip in a project with a $20retail price point.

Blow me down if the chip was

already listed as end of life, and itwasnt that old.

In general I find that everything ismoving too fast. We all joke about a

product being obsolete by the timeit gets to the shops, and that forcesreduced time spent in R&D andtherefore reduced quality.

So I suppose one challenge will beto get reliable products out in lesstime than we used to. Fortunately,the tools are much better these daysand that helps, but I hate the factthat something I design may havethe life span of a house fly.

Images taken by: Paul Hoelen


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PROJECT

BUSnet/MAXX

By Rob Gray

My current project is a RS-485-based async network aimed atthe commercial to light-industrialmonitoring and control market. Theprotocol is called BUSnet and thehardware goes by the name MAXX

(a homophone for an acronym forMonitoring And Control System).

BUSnet is a low-speed (up toabout 115,200 bps, but maybefaster) network designed tomake connecting embeddedmicroprocessors both easy androbust. It is essentially a network ofpoint-to-point links.

BUSnet has three layers that are

rather imaginatively named: layer1, layer 2 and layer 3. These areroughly analogous to layers 1, 2 and7 in the ISO model. Layer 1 is thephysical layer, that being point-to-point full-duplex RS-485 links (SeeFigure 1). Layer 2 is concerned withgetting a payload of data from anapplication onto the network without

errors and with receiving data fromthe network without undetectederrors. And layer 3 handles security,safety, end-to-end feedback andinterlocks.

So does the world need anotherasync network? Well probablynot, but on the other hand Iveresearched about 50 existingnetworks and I cannot find a singleone that is cheap, simple and robust

while allowing relatively large

payloads and long distances.

Following is some of the criteria Ilooked for:

Open: Many existing networks areclosed; you have to buy everything

from the network vendor. Others areopen but you have to pay thousandsof dollars to join the consortium orbuy the specifications. Thats notopen to a hobbyist or even a smallbusiness.

Robust: BUSnet uses RS-485line drivers, a genuine industrystandard that provides a high levelof protection for the signal. Payloads

are protected by a sequencenumber, payload length field and a16-bit CRC. Also with BUSnet, eachnode is a mini system in its ownrightthe IO on a node can operateeven if the network is down. And ina further step to making the networkrobust, each node can detect arogue neighbor or damaged cableand isolate it.Figure 1



PROJECT

Small: Some existing networksrequire a huge amount of hardwareeven for a small node. Ive seenone that needs about 9 square ofPCB for the simplest node, whileanother needs 28 components.

With BUSnet it is possible to builda functional (albeit very simple)node on a PCB less than 1 squareusing three active and a few passivecomponents. With fewer human-friendly SMD components evensmaller should be practical.

Informal: Some networks requirea system to be designed and

implemented, and then tuned.Make changes and the process hasto be repeated even to the point ofre-flashing processors. BUSnet is

very informal; you can start withtwo nodes then add nodes asrequirements or finances dictate.

Cheap and accessible cables

and jacks: BUSnet can use anytelephone 6-way cable with RJ126P6C connectors defined as being

standard. Power is optionallydistributed on the network cable soif more current carrying capacityis required, larger cables can beused.

BUSnet is not designed to compete with companies like Modbus,Profibus and others. Firstly, there isof course no chance of doing so, butalso theres no point. The industrialPLC market is sown up by some

very capable players, but they areexpensive and I feel theres a nichefor smaller and cheaper systems thatare still robustsomething thatsabove the hobbyists requirementsbut below those of, for example, anatural gas plant. Such systemsmay be in a pet shop where all the

reptiles have to have a controlledenvironment, a solar power systemthat needs monitoring, or a cattletrough on an outback station (a.k.a.a ranch or farm to my non-Australianreaders) that can report the waterlevel.

Point-to-point, advantages

and disadvantages

BUSnet does not use the normalmulti-drop topology; it uses point-to-point links between nodes.

The decision to go point-to-pointwas not taken lightly as it does add

expense and indeed the design wasmulti-drop for a long time. However,I think that overall point-to-point ina ring topology (with data flowingin both directions) will make for abetter and more reliable system.

One may argue that the robustnessof a ring system is subject in turn tothe robustness of the code runningon the processors that directlyinterfaces with the PHY level asthese processors must store andforward data to the next node.

Thats true, but its also true of amulti-drop system and indeed anysystem that uses microprocessorsto interface with the bus. With amulti-drop system, a failure in theinterface processor can bring downthe entire network simply by forcingthe data levels to a fixed state or by

transmitting continuous garbage.With point-to-point these faults canonly affect the nodes immediateneighbors; and even then it shouldnot stop them from functioning asthey can still communicate throughtheir neighbors on the other side.

The following sections detail mythinking on the pros and cons of

this topology over a more standardmulti-drop bus.

Pros

Bus clashes: There are no bus clashissues. This makes the softwaresimpler and, in theory, more robust.

Mixed data rates: Slow and fastnodes can coexist. Also, links thatare potentially more error prone(e.g., because the link passesthrough a noisy environment) canrun at a slower rate while the rest ofthe network runs at high speed.

Adaptive links: Nodes candynamically adjust a links data rateaccording to the number of errorsencountered on the link.

Fault isolation: A single cable ornode fault cannot bring down theentire network; it may have no effectat all or may only affect one or twonodes. With multi-drop, a shortcircuit between the data conductorsstops all data flow.

Mixed PHY layers: Links can beimplemented with any physicaltransmission medium. Currentlyonly RS-485 is defined but theresno reason RS232/422, LIN, CANor TTL cant be used for the entirenetwork or at least some individuallinks.

Bus length: As each link betweennodes is an RS-485 connection,

the normal parameters apply toit. Therefore, distances betweennodes can be up to 4,000 feet or1.2 kilometres. As there can be256 nodes, there is a theoreticalmaximum bus length of over 190miles or 300 kilometressomethingI assume will never be tested.



PROJECT

Cons

Expense: Each node requires twoRS-485 transceivers and the buscable needs two more conductors.

Even with multi-drop, I planned touse 6-way cable, so this is essentially

just one extra transceiver and thecost increase is negligible.

Propagation delay: All frames aredelayed by one byte time per nodebecause a node obviously has toreceive a byte before it can transmitit. It also has to check if the frameoriginated with itself.

Branches/stubs: Branches andstubs require two cables. You cannotsimply T off an existing cable; youhave to run cable out and back.

Polarity conscious: With multi-

Hardware

So what hardware is required? Putsimply, the core interface circuitconsists of a protocol handling

processor and two RS-485transceivers. Add your applicationprocessor and whatever logic isrequired for the node IO (seeFigure 3).

The original design goal was tohave nodes as small as possibleand to this end I started with a smallprocessor, namely the ATtiny85.

While this did satisfy the smallcriteria, unfortunately the chip doesnot have the grunt to do the job ofbus interface as well as the nodesapplication. So I moved on to biggerthings.

The next relatively stable designfeatured an ATtiny84 that actedas the low-level bus interfaceand watchdog to a larger chip(the ATmega328 or similar). Withthis model I actually got to the

point of sending PCB designs forfabrication. And then a (potential)technical/sales partner suggestedthe LPC1111 32-bit microprocessor.

My initial reaction was along thelines of 32 bits for a temperaturesensor! I was very surprised,but I followed up the suggestionanyway, all the time looking forexcuses not to use the chip. Onething I have learned over the years

though is that its very easy to betoo close to a problem and to holdonto the existing solution like aman overboard grasping a lengthof driftwood, especially when alot of time has been invested in aparticular solution.

But the more I looked into theLPC idea the more I liked it, and

that is where the design stands atpresent, with one small change.The LPC122x has features abovethe LPC111x, namely better ESDprotection, two UARTS, improvedprovision for non-volatile storage inflash, more high-current pins, and aunique serial number burned intoeach chip. These features make itmore suitable for this application.

And the irony of using a 32-bitprocessor is that rather than makethings more complicated, it has infact simplified the entire design andreduced the cost. More functionality

with less hardware, and hardware isa recurring expense.

Robustness

One of the primary goals of BUSnet/MAXX is robustness. As long as therobustness is practical, it should notbe possible for the entire network tobe brought down by a single fault oreven multiple faults.

The system incorporates manyfeatures that will make it robust,however it is not supposed to bea mil-spec or Triplicated ModularRedundant (TMR) system. Somaybe you would ask, Why botherspending so much effort making itrobust?

I suppose the simple answeris thats the sort of thing I enjoydoing, but also I see little point in

designing something that is notrobust. A system may not have tosurvive a SAM missile hit, but if all

your fish die when the aquariumcontrol system fails simply becausea wire was jammed in a door, you

would be very upset.

So MAXX is not about avertingone-in-a-million disasters. If an out-

drop its practical to make thenodes detect and correct polarityinversions caused by incorrect

wiring. This is not practical with full-duplex point-to-point.

Figure 2



PROJECT

of-control semi trashes an entire workshop, you will probably haveother things on your mind; but itshould be able to handle the eventsthat are reasonably expected tohappen. For example, if a forklifttrashes a cable duct, the safetyinterlocks on nearby machineryshould still work.

That is the level of robustness Iam aiming for using the followingtechniques:

Line interface chips: Each nodetalks to the network through aPhysical Interface and ProtocolEngine (PIPE) chip. The PIPEappears as an I2C slave to thenode processor and handles thefollowing functions:

Frame handling: The PIPEaccepts data payloads from thenode processor, formats theminto a BUSnet level 1 frame andtransmits the frame onto the

network. Conversely, it receivesframes from the network,strips the frame overhead andsends the payload to the nodeprocessor.

Application processor watch-dog: The PIPE will detect vari-ous errors caused by the nodesapplication processor and it hasthe ability to reset the processoreither autonomously or undercontrol from an HMI elsewhereon the system.

Bad line detection: The PIPEwill detect faults on the links ineither direction. When a fault isdetected, that link is logicallydisconnected. Assuming thatthe node on the other side of thefault does the same, the fault isisolated. If the fault fixes itself(the source goes away) or isfixed (by the maintenance man),the PIPE will reinstate the link.

Ring topology: It is preferredthat the nodes on a network areconnected in a ring topology. Thus,if the cable is cut, all nodes are stillconnected to each other. However,this is not a hard requirement assometimes it is not practical, soa bus topology can be used. Thisdoes however remove one level ofrobustness because a bus is really

just a ring thats already been cutonce.

Multiple master: BUSnet uses amultiple master protocol wherebyall nodes can publish data at will.

Thus the loss of a single masternode does not kill the system.

Autonomous nodes: A node isessentially a small system in itsown right with several processorsand possibly dozens of IO points.Functions that operate internally cando so even if the network is down.

Backup nodes: It is easy to havebackup nodes running in warm

standby. Such nodes will readsensors and perform computationsexactly the same as their primarycounterparts. However, they willnot publish the results unless theydetect that the nodes have goneoffline. A non-critical example isthe time of day (ToD) function; anetwork may have an RTC nodeand also a GPS node with bothbeing capable of publishing ToDdata. The GPS will be the primarysource because it is more accurate.So while it has a signal it publishesthe ToD, and the RTC node is simplya subscriber that uses the data tosynchronize its own clock. Shouldthe GPS go offline, say because thesignal is lost, the RTC will take overthe role of ToD publisher. This sameprinciple can of course be appliedFigure 3



PROJECT

to more critical applications.

Galvanic isolation: The hardwareis not isolated by default, howeverthe architecture lends itself to

easy upgrading to a fully or partly-isolated system. As every nodecommunicates to the network viaa PIPE, and the node processorconnects to the PIPE with just two

wires, all you need to do is use a version of the interface PCB thatisolates these wires and the powersupply if thats not local. Thus, anon-isolated system can easilybe upgraded at any time. Also,

a system that in general doesntneed isolation but has one or twonodes that can be accommodatedby using isolated interface PCBson just those nodes. Taking this astep further, the points on a nodecan be made to be isolated, thusthe isolation granularity can beincreased such that individual IOpoints can be isolated even if otherson the same node are not. If isolatedRS-485 transceivers are used thenthe entire node is isolated, includingthe PIPE.

The above mechanisms shouldhandle the following faults.

Rogue node processor: If anode application processor failsto regularly and correctly pollthe PIPE, the PIPE will logicallydisconnect the node from the busand optionally reset the processor.

High error rates on a link: If thePIPE detects a high error rate on alink, it can downgrade the data rate.If the errors persist it can shut downthe link entirely.

Rogue PIPE: Similarly, if a PIPEdetects rogue behavior by one of its

immediate neighbors, it will shut thelink down.

Clean cable cut (single): If aring topology is employed and the

cable is cleanly cut, there shouldbe no effect at all on the network.If the network is organized in a bustopology then some sections will beorphaned. Orphaned nodes can,however, still communicate witheach other if a local power supplyis available.

Clean cable cut (multiple): Inthe case of multiple clean cuts,functionality will be lost. Whether ornot this is critical (or even noticed)depends on the location of the cutsbecause, like an earthworm, theremaining parts can function as ifnothing happened as long as poweris available to the affected nodes.

Dirty cut: By a dirty cut I meanone that causes the conductors tobe permanently shorted together orto other conductive materials. While

BUSnet has power on the bus wires,each node passes power to itsneighbors through resettable fuses.Thus, a short circuit in a section ofcable should be dealt with locally

with no effect on the network.

It is clear that for a system to be very robust, local power suppliesare required for each node or atleast each section of network thatis at risk. If the requirements for an

application dont call for this levelof robustness, then a global powersupply can be used.

So where does MAXX

get involved?

Theres no point in having a protocolwithout a useful application, and for

me that application is a monitoringand control system designed for

what I call commercial to lightindustrial use.

A MAXX system can have up to 256nodes, each with a node supervisingprocessor and up to four plug-in IOnodules (IONs), each with its ownprocessor (see Figure 5). Each IONcan, in turn, have as many IO pointsas required to perform the IONstask. Typically though, an ION willperform only one or two functionsas I aim to keep a fine granularity tothe system.

Thus, a node can be easily taskedfor any application by simplyplugging in the correct combinationof IONs.

Figure 4

Each node then is a smallsubsystem that includes its ownbus that the supervising processoruses to interface with the IONs.Therefore, events that occur on apoint connected to an ION on anode that affect another ION on thesame node can be handled with nonetwork involvement. This of course



PROJECT

has good speed and reliabilityimplications as more critical event/action couplings are not only faster

,but still work if the network is down.

An example is an emergency stopswitch on some machinery; if theinput that reads the button andthe output that actuates a shut-offcontactor are on the same node,the event/action is handled with nonetwork involvement.

While having processors at everylevel does increase the complexity,

it also increases the modularity,which in turn provides fault firewallsat every step. A failure at a givenlevel does not necessarily affectfunctions at lower levels.

Another advantage to havingprocessors on IONs is that thenode supervisor does not have toknow how to interface with every

sensor and actuator known to man.The ION is designed to do whatit does and if that is to interface

to a thermocouple or an LCDdisplay, that is of no concern to thesupervisor.

Therefore, once the supervisorcode is stable it should never haveto be changed. And yet, one moreadvantage is that ION processorscan do much of the heavy lifting

with regard to calculations basedon the data it harvests. Where a hardconnection to the outside world

is known as a point or physicalpoint, an ION can publish virtualpoints, points that have nosingle item of associated hardware.They are entirely based on acalculation or algorithm. Examplesare, the minimum, maximum andaverage values for a voltage input,the aggregate of several physical

points to provide the total batterybank voltage, or the duty cycle of amotor.

All this in turn means that simple

systems can be plug-and-play;once IDs for published data typesare agreed upon, a display nodecan be plugged into an existingsystem and immediately display, forexample, the battery bank voltageor refrigerators compressor dutycycleno setup or configuringrequired.

So where to now?

I guess thats the 64 dollar question.Ive been working on ideas for abouta year, and in that time the systemdesign has evolved many fold froma simple hobbyist connection fora few processors to a reasonablystrong design for commercial use.

A recent major paradigm shift frommulti-drop to point-to-point has setthe design back markedly withmany algorithms I designed beingno longer applicable. On the plusside however, they are no longerneeded. But others are, so in somerespects its back to the drawingboard.

Also, while I spent many yearsworking in this field designing andbuilding systems, I am now semi-retired and no longer have theresources to build a lot of hardware.

Designing is essentially free;building is costly in both benchspace and money, both of which Ihave in limited amounts.

So for the time being, the design willcontinue and I will start producingspecification documents.

Watch this space.

Figure 5



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HVOUT

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PGND1

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and Driver

VD1

VLL

270H

0.1F

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Engineers have been using Hall effect measurementsto characterize materials since Edwin Hall discoveredthe phenomenon in 1879. The Hall effect is the generationof a voltage, called the Hall voltage, across a sample of amaterial when that sample is exposed to a combinationof a magnetic field through the sample and a currentalong the length of the sample (see Figure 1).

In the electronics industry, integrated circuitmanufacturers and crystal manufacturers use Halleffect measurements in materials research, devicedevelopment and device manufacturing. In additionto measuring the Hall voltage, companies use Halleffect measurement systems to determine quite a fewmaterial parameters including carrier mobility, carrierconcentration (n), Hall coefficient (RH), resistivity,magnetoresistance and the conductivity type (N or P).

The recent interest in Hall effect measurements is beingdriven by the search for next-generation semiconductorsthat can overcome the barriers of size and speed posedby silicon-based materials. The goal is to maxamize

carrier mobility with materials that can create smallercomponents and minimize heat dissipation. There isgreat hope that nanomaterials and single atomic layercrystals such as graphene or graphene-based materialstructures will be the solution. To characterize theproperties of these new materials, including analyzingcarrier mobility, Hall effect measurements are essential.

A basic Hall effect measurement system will likelyinclude the following:Figure 1

MAGNETICFLUX

CURRENT

HALL

VOLTA

GE

Use Hall EffectMeasurements to

CharacterizeMaterials

Robert GreenSenior Market Development Manager

Mary Anne TuptaSenior Staff Applications Engineer



TECHNICAL ARTICLE

A constant-current source. For low resistivity materialsamples, the source must be able to output frommilliamps to amps of current. For high resistivitysamples (such as intrinsic semiconductors), theconstant current source may have to be able to go aslow as 1 nanoamp. But in general, a source capableof producing from 10 microamps to 100 milliamps

will suffice.

A high input impedance voltmeter. The voltmeterused must be able to make accurate measurementsanywhere from 1 microvolt to 100V. High resistivitymaterials may require ultra-high input Z or differentialmeasurements.

A permanent magnet or an electromagnet. Theseare typically available with ranges from 500 to 5,000

gauss. A sample holder.

Depending on the application, your test system mightalso include some other equipment. The recommendedtechnique to get the best quality measurements requiresthat multiple measurements be made at multiple edgesof the sample; thus, a switching matrix is recommendedto reliably acquire all measurements. Also, becauseHall mobility is dependent on sample temperature, youmay want a temperature measurement probe capable of

0.1C resolution.Measuring Mobility

To determine carrier mobility (H), first measure theHall voltage (VH) by forcing both a magnetic fieldperpendicular to the sample and a current through thesample. Accurate measurements of both the samplethickness (t) and its resistivity () are required. With just

these five parameters (B, I, VH, t, and ) calculate theHall mobility using the following formula:

H= |VHt| / BI

To obtain results with high confidence, we recommendtaking eight different measurements. Reverse the sourcecurrent polarity, source on additional terminals, andreverse the direction of the magnetic field. If the voltagereadings differ substantially, its advisable to recheck thetest setup to look for potential sources of error.

For more on this topic, see the Keithley application note,Hall Effect Measurements in Materials, downloadablefrom Keithleys website: http://www.keithley.com/data?asset=55773.

About the Authors

Robert Green is a senior market development managerat Keithley Instruments, Cleveland, Ohio, which ispart of the Tektronix test and measurement portfolio.During his career at Keithley, Green has been involvedin the definition and introduction of a wide range ofinstrumentation. He holds a BS in electrical engineeringfrom Cornell University and an MS in electricalengineering from Washington University in St. Louis,Missouri.

Mary Anne Tupta is a Senior Staff Applications Engineerat Keithley Instruments, Inc. in Cleveland, Ohio, whichis part of the Tektronix test and measurement portfolio.Mary Anne holds an M.S. in Physics and a B.S. in Physics/Electronic Engineering from John Carroll University inCleveland, Ohio. She has been an engineer at Keithley

for more than 20 years.

Figure 2: Illustrates the measurement configurations for both the Hall effectvoltage (a) and the resistivity measurement (b). The resistivity measurement is madewithout a magnetic field.

B

SAMPLE

1

24

3

MEAS

V

FORCE

I

noB

SAMPLE

1

24

3

FORCE

I

MEAS

V(a) (b)
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18/25

Single, Low Voltage Digitally Controlled Potentiometer

(XDCP)

ISL23315

The ISL23315 is a volatile, low voltage, low noise, low power, I 2CBus, 256 Taps, single digitally controlled potentiometer (DCP),

which integrates DCP core, wiper switches and control logic on

a monolithic CMOS integrated circuit.

The digitally controlled potentiometer is implemented with a

combination of resistor elements and CMOS switches. The

position of the wipers are controlled by the user through the

I2C bus interface. The potentiometer has an associated

volatile Wiper Register (WR) that can be directly written to and

read by the user. The contents of the WR controls the position

of the wiper. When powered on, the ISL23315s wiper will

always commence at mid-scale (128 tap position).

The low voltage, low power consumption, and small package

of the ISL23315 make it an ideal choice for use in batteryoperated equipment. In addition, the ISL23315 has a VLOGIC

pin allowing down to 1.2V bus operation, independent from the

VCC value. This allows for low logic levels to be connected

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level shifter.

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Features

256 resistor taps

I2C serial interface

- No additional level translator for low bus supply

- Two address pins allow up to four devices per bus

Power supply

- VCC = 1.7V to 5.5V analog power supply

- VLOGIC = 1.2V to 5.5V I2C bus/logic power supply

Wiper resistance: 70 typical @ VCC = 3.3V

Shutdown Mode - forces the DCP into an end-to-end open

circuit and RW is shorted to RL internally

Power-on preset to mid-scale (128 tap position)

Shutdown and standby current



I/O Server Client

Suppose you have two processes: a server and a client.The server process reads some I/O from a hardwareinterface and passes the data on to a client process.

These processes may or may not be running on separateprocessors. In particular, they do not have a commonshared memory area.

Figure 1

In this situation the server and client have tocommunicate over some explicit pipe between them.This communication mechanism may be implementedin different ways depending on the system.

The server part of this system can be run with codesimilar to the following pseudo-code:

Figure 2

and the client part can run with the following codepattern:

In this case, the server initializes the communication andthe client waits for and responds to the communication.So the server is the master and the client is the slave.This is perhaps to be expected since the whole processis driven by the arrival of data on the hardware interface.

So far, so simple. However, things get a bit morecomplicated if timing requirements are taken intoaccount. Depending on the needs of the system, theprotocol between the two processes may have to bemore complicated.

Blocking behavior and buffering

Assuming there is only limited buffering within the

Figure 3

while (1) {

get_data_from_pins();

send_data_to_client();

}

while (1) {wait_for_then_get_data_from_server();

process_data();

}

Buffered

Communication

Between

Real-Time

Software

Processes

Dave LaceyTechnical Director

of Software Tools



TECHNICAL ARTICLE

When the client is busy,the fifo fills up

When the client is ready again,the fifo can empty

Server

data

data

data

data

Client

FIFO

communication pipe itself, the call to send_data_to_client() in the server process will be blocking; it will waituntil the client is ready. This is fine if the client is ready intime and the data can be communicated before the nextitem of data needs to be read from the hardware.

However, if this isnt the case and the client is too slow,then next data from the hardware will be missed.

There are different methods to get around the blockingproblem. If the hardware has some kind of flow controlit may be possible to hold off the interface and push thedelay upstream in the data flow. But sometimes this is notpossible.

The rest of this article looks at situations when there is noflow control, the pull of the client has variable timing and

the push of the hardware has fixed timing. In this casethe common solution is to use a buffer for the data.

With a buffer, the server process reads data from thehardware interface and places the data in a fifo. Theclient process asks the server to provide data from theother end of the fifo. The buffer needs to be big enoughto cope with the amount of data that can arrive during thelongest processing time of the client. (See Figure 4)

The question is how to design a communication protocolbetween the two processes such that the server can read

from the hardware when it needs to and the client canget data when it needs to.

Polling

One solution to the problem is for the server to repeatedlypoll the client for readiness in between each time it

Figure 4

gathers data from the hardware. The code would looksomething like this:

Figure 5

and the corresponding client code would be thefollowing:

Figure 6

The server may send several items of data betweenhardware interactions or none, in which case the buffer

will start to fill up to be emptied later.

while (1) {

get_data_from_pins();add_data_to_fifo();

while (!time_to_get_data))) {

client_ready = poll_client();

if (!fifo_empty() && client_ready) {

get_data_from_fifo();


}

}

}

while (1) {

signal_ready_to_server();

get_data_from_server();

process_data();

}



TECHNICAL ARTICLE

Event-based programming: selects

Writing the communication with a loop that repeatedlypolls for a fixed amount of time is a slightly clumsy wayof writing this kind of code. A better method is to use

a programming style that instructs the processes todirectly react to events that occur in the system.

The key to coding in this style is the use of selects to waitfor an event to happen out of a specified set and thenreact when one of them occurs. The select constructin the XC programming language does this, as doconstructs in other areas (e.g., the select system call inUnix or the wait call in SystemC).

An XC style select statement has a similar form to aswitch statement in C:

Figure 7

The statement waits for one of event1, event2, and soon to occur and then executes the code in the relevantcase body. Given this construct the server code can berewritten in a non-polling style:

Figure 8

Making the client a slave again

The act of adding the buffer causes the client process tobe the master of the communication. It signals the startof the transaction of data between the server and client.

This is a problem if the client wants to react to otherevents in a select statement as well as the incoming data.

You can make the client a slave again by introducingan intermediate process that pulls from the server andpushes to the client:

In this case the pseudo-code for the intermediate

process is

Now the client process can react to the event of theintermediate process pushing data and the server

process can react to the event of the intermediateprocess pulling.

Making it more efficient: exploiting

communication buffers

The introduction of the intermediate process is inefficient.There is a whole process just concerned with shovelingdata to change the master/slave relationship of the otherprocesses. This is not a problem if processes are cheap,but in many cases they are expensive or limited. Luckily,

you can do without the intermediate process if there is a

small amount of buffering in the pipe.

If there is enough buffering to store a byte in the pipeitself, the server can send a notification byte and thencarry on processing. When the server first puts data inits buffer it sends a notification:

Figure 10

Figure 11

select {

case event1:

...

break;

case event2:

...

break;

....

}

while (1) {

select {

case pins_ready();


add_data_to_fifo();

break;

case !fifo_empty() & client_ready():



break;

}

}

I/O Server Inter Client

Figure 9

while (1) {




}

I/O Server N ClientSend Notification



TECHNICAL ARTICLE

The client can then react to the event of this notificationarriving and know there is now data available. It can thensignal to the server that it is ready for data:

The server can respond to this (provided it is not busydealing with hardware) and send the data to the client:

Figure 13

After this transaction is completed, the pipe is clear ofthe notification byte. So the server can send a new one ifthere is more data in its buffer.

Figure 14

Figure 15

If the buffer is empty then the pipe remains clear until

the server receives more data. At any given time, thereis only ever one notification byte in the pipe so the pipebuffer will never overflow and block the server process.

In this case the code for the server shown in Figure 15.

An important thing to note with this code is that thesend_notification_to_client call will not block, the code

will always carry on. On the other hand, the call to send_data_to_client will block until the client is ready. However,in this case the client will be ready since it signals itsreadiness to the server.

The client code for this case is shown in Figure 16.

This version of the communication protocol allows theclient to be a slave and the server buffer to be in the rightplace without the need for an intermediate process.

Doing it in XC

On XMOS platforms using XC, the server and clientprocesses will be XC threads and the communication Figure 16

Figure 12

I/O Server Client

Signal Ready

I/O Server ClientSend Packet

I/O Server N ClientSend Notification

int notified = 0; // this variable tracks

// whether a notification

// is sitting in the pipe

while (1) {

select {

case pins_ready():


add_data_to_fifo();

if (!notified) {

send_notification_to_client();

notified = 1;

}

break;

case !fifo_empty() && client_ready():



if (fifo_empty()) {

notified = 0;

}

else {

send_notification_to_client();

notified = 1;

}

break;}

}

while (1) {

select {

case get_notification_from_server():



process_data();

break;

...

}

}



TECHNICAL ARTICLE

mechanism will be XC channels.

The notification from the server needs to use theasynchronous outct primitive to send a control token

without the normal XC synchronous handshaking on

communication.

This control token should be a XS1_CT_END tokento make sure that any inter-core switches between thethreads are free after the token is delivered into thedestination channel end buffer:

Figure 18

The client can select on this notification in code similarto that in Figure 18.

You can find XC communication examples of this typein the open source repository found at http://github.com/

xcore/sw_thread_comm_examples

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www.eeweb.com/register

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EEWeb

Figure 17

send_notification_to_client(chanend c) {

outct(c, XS1_CT_END);

}

select {

...

case inct_byref(c, tmp): // receive notification

c len; // receive data length

for (int i=0;i data[i];

break;

}

About the Author

Dr. David Lacey works as Technical Director of SoftwareTools at XMOS Ltd. With over ten years of research anddevelopment in programming tools and compilationtechnology, he now works on the development tools for

XMOS devices. As well as tools development, he has worked on application development for parallel andembedded microprocessors including work in areassuch as math libraries, networking, financial simulation,and audio processing.XMOS Website.
http://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://github.com/xcore/sw_thread_comm_exampleshttp://github.com/xcore/sw_thread_comm_exampleshttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://bit.ly/jd6Wcwhttp://www.xmos.com/http://www.xmos.com/http://bit.ly/jd6Wcwhttp://github.com/xcore/sw_thread_comm_exampleshttp://github.com/xcore/sw_thread_comm_examples



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EEWeb Pulse - Issue 26, 2011

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Transcript of EEWeb Pulse - Issue 26, 2011