EEWeb Pulse - Issue 37, 2012

PULSE EEWeb.comIssue 37

March 13, 2012

Ian WalterAltobridge

Electrical Engineering Community

EEWeb

Contact Us For Advertising Opportunities

[email protected]

www.eeweb.com/advertising

Electrical Engineering CommunityEEWeb

http://bit.ly/kDYHm7

EEWeb | Electrical Engineering Community Visit www.eeweb.com 3

TABLE O

F CO

NTEN

TSTABLE OF CONTENTS

Ian Walter 4ALTOBRIDGE

Featured Products 9Comparison of I/Q Sampling with Dual Core ADCs vs. Ping-Pong SingleCore ADCBY ELETTRA VENOSA WITH IQ ANALOG

Writing Code Using a Spreadsheet 19 BY PAUL CLARKE WITH EBM-PAPST

RTZ - Return to Zero Comic 22

Interview with Ian Walter - Vice President of Technology

This article describes different approaches of applying ADCs to complex I/Q components in ping-pong configuration.

Paul Clarke outlines a surprising way to help generate code using basic spreadsheets.

11


INTERVIEWFEA

TURED IN

TERVIEW

Altobridge

How did you get into engineering and when did you start?My background is actually in avionics engineering; I trained as an avionics engineer and worked with British Airways, which had a very good training program back

in the 1970s and 1980s. I was lucky enough to be selected to take part in the training program, where I gained both practical training and theoretical course work. It was a nice mix, and has turned out to be a very solid base for the type of work I do today. Back then I was working

on a broad spectrum of different technologies that were around at that time in the aviation industry, from high frequency (HF) radio systems to flight control systems and navigational instruments.

Where did you go after working for British Airways?I left British Airways in the late 1980s, around the time that the first analog mobile phone networks were being installed. Motorola was looking for field engineers, and as there was no cellular industry to speak of at that time, they were recruiting any one that had RF experience, so if you could draw a block diagram of a radio transceiver, then you got the job. I joined Motorola and stayed there for about eight years until 1996.

After leaving Motorola, I joined a Californian start-up company—in-terWAVE Communications and was based in its U.K. office. interWAVE was one of the first companies that was working on developing a new range of picocell base stations.

anI WalterIan Walter - Vice President of Technology


INTERVIEWFEA

TURED IN

TERVIEW

From there, I went to work for ADC Telecommunications, in the microcellular division, where I worked on connecting the Global System for Mobile Communication (GSM) base station technology with corporate private branch exchanges (PBXs) to provide a private GSM network solution called wireless office for large corporate organizations.

Later on, I was part of the management team that was involved in the buyout of the microcellular division from ADC, and from there I went on to be CTO and board member of the new company, Microcellular Systems.We still continued to maintain our involvement with interWAVE, acting as a distributor of their products until mid 2000, when interWAVE purchased the company. It was interesting, that after two years, I was an interWAVE employee once again. At that time, interWAVE offered me a position as Director of Product Management at the headquarters in California, with responsibility for the GSM and CDMA product lines. In January 2001, I moved to California and have lived in the U.S. ever since.

I worked for interWAVE for a further four years until February 2005 when I quit to join Altobridge as VP of Technology. Altobridge was formed in 2002 and although at that time I was still working for interWAVE, I was one of the angel investors in the new company. I, along with almost all of the management team from Microcellular Systems, are the senior management team at Altobridge today.

What are the goals of Altobridge, and what does it provide?The goal of Altobridge is to cost-effectively connect remote communities of mobile subscribers via satellite to the core network. When the company was set up back in 2002, our initial product focused on providing cost-effective GSM services over narrow bandwidth, high latency satellite connections. The initial target was to use this technology to provide GSM services to passengers on commercial aircraft. We had started working on

The goal of Altobridge is to cost-effectively

connect remote communities of

mobile subscribers via satellite to the

core network.

a similar project at interWAVE in the late 90’s with British Aerospace (BAE) in the U.K. to develop a GSM solution for aircraft. At that time, however, we were just too far ahead of the market. The airlines weren’t really interested due to all the regulatory hurdles; the market just wasn’t ready for the product, so BAE dropped it.

At Altobridge, however, we were convinced that there was still a market for such a product, so we

continued to work on developing and improving the technology so that we would have a more compelling solution for the airlines. I was particularly excited about it because it brought together both of my key skills. It pertained to my avionics background at British Airways as well as cellular telephony from my time at Motorola and interWAVE.

That was where the initial development was focused—on delivering that solution for on-board GSM mobile networks for making calls on aircraft. We were able to secure two major customers for our solution, one was AeroMobile—which was recently purchased by Panasonic Avionics Systems and the other was Honeywell who was interested in installing our solution on business jets.

There are a lot of social issues that come with allowing people to talk on their mobile phones on an aircraft. It can be annoying to the other passengers – when you’re traveling at night, you don’t want a bunch of phones ringing. So we developed technology that would allow the flight crew to be able to block incoming calls—amongst other things—so that other passengers would not become fractious.

Today, the software that we developed is integrated into the Panasonic In-flight Entertainment (IFE) System, which is purchased by airlines around the world to provide in-flight connectivity, movies and other entertainment services to airline passengers.

We were very passionate about this product, but there were a lot of


INTERVIEWFEA

TURED IN

TERVIEW

hurdles we had to overcome before it could be deployed beyond the trial phase, and we knew that we weren’t going to make money from it in the short term. We had to look for other opportunities where our technology could be deployed.

The first thing that we looked at was providing GSM services for maritime applications because

Our goal [for the LiteSite] is to use

[its] prominence in the market to help us grow, so that we can deploy our LiteSiteTM

technology in as many remote communities as possible to help bridge

the digital divide and connect the next billion mobile users.

the maritime industry is a big user of satellite services. As part of our history with ADC Microcellular Systems, we had provided the technology that allowed the Aeronautical and Maritime division of British Telecom to launch the first GSM services for cruise ships with the P&O cruise line, so we had

some experience with maritime applications. Because there were a variety of other companies providing GSM services for cruise ships, we decided to pursue other opportunities in the maritime market. We ended up identifying the merchant maritime market as a potential customer for our technology. It’s a more challenging market because there are a limited number of potential subscribers on the ship, therefore the business case is very challenging. But we were able to build a business model around this market, and using our technology, we deployed a trial service on two merchant ships that allowed us to validate our business model. Based on this scenario, we set up an operating company called Blue Ocean Wireless (BOW) which was jointly owned by a Private Equity company and Altobridge. We then sold about 40 percent of this company to Smart Communications—the largest mobile communications company in the Philippines. One of the biggest reasons for making that deal was that about 40 percent of all sea farers globally are from the Philippines. In all, there are about 600 ships worldwide that have our service installed.

From there, we identified what we refer to as remote communities. These are areas in remote regions in Asia, Africa and Latin America where the villages are at least a three hour drive from where the traditional cellular coverage ends. Because these villages are small, the major mobile network operators haven’t deployed services there, although many of them have license obligations to provide

coverage to these areas. The traditional approach for the mobile network operators is to go back to the regulator and say that it’s not commercially viable to deploy the service unless the regulator subsidizes them.

What we’ve been able to do with our technology is to explain to the operator that that isn’t the case. We can demonstrate a business case where you can deploy Altobridge’s LiteSite™ base station and see an ROI of between 12 and 18 months, which means that there is no requirement for our solution to be subsidized by the regulator. We’ve done a number of deployments now in remote communities that have demonstrated our point. The people in these small villages do have disposable income, and do have mobile phones; they just don’t have the networks to use them on.

The best part for the operator is that there are no subscriber acquisition costs. We go into these villages and install our base stations, and the subscribers just appear. This is very attractive to operators because of the virtually non-existent subscriber acquisition costs, and also, the average revenue per user (ARPU) can be up to twice the operator’s national average.

The great thing about this product is that we are working to connect the unconnected and bridge the digital divide. One of the other challenges that we encounter when deploying our technology is how to power the base station, as these villages are not connected to the power grid. We put a lot of focus into installing and operating our base stations in a way that is very power efficient


INTERVIEWFEA

TURED IN

TERVIEW

and have developed a way to cost-effectively power these base stations with solar technology. One of the challenges that always exists with solar technology is not so much the cost of the solar panel, but the cost of the batteries. But because our LiteSite™ products have such low power consumption, we don’t need that many batteries. Solar power is a viable option because of this, and it helps reduce the total cost of ownership for the operator.

What is the coverage of the LiteSite?Depending on the antenna height and the terrain, we’re looking at about a five mile radius of coverage. We try to balance the coverage range with the cost, because of course we could have a 50-foot tower that would provide a much

larger coverage radius, but that wouldn’t be practical, as the cost of erecting such a tower in these remote communities is very high. Our solution uses small mono pole towers, which require little civil work to install.

How many users can you run on your system simultaneously?It can support—depending on the configuration—between 14 and 28 simultaneous calls. 14 if we’re using full-rate channels and 28 if we use half-rate.

In what direction do you see your company heading in the next few years?At the moment we’re really focusing on being the leading mobile communications technology

provider for these remote communities, and so far we’ve been successful in achieving this goal. We’ve also been fortunate to sign some long-term contracts for our LiteSite™ product with major mobile network operators such as Indosat in Indonesia and Maxis in Malaysia. We are very strong in the market, and that is because we have the best technology with the lowest total cost of ownership.

Our goal is to use this prominence in the market to help us grow, so that we can deploy our LiteSiteTM technology in as many remote communities as possible to help bridge the digital divide and connect the next billion mobile users. ■

Join Today

www.eeweb.com/register


http://bit.ly/jd6Wcw

Tri-color High Brightness SMT LEDs from Avago Technologies

Avago’s PLCC-6 SMT LEDs are high brightness, high reliability, high performance, IPX6 compliant and are water and dust proof. They are designed with a separate heat path for each LED die, enabling it to be driven at higher current. They deliver super wide viewing angle at 120° together with the built in reflector pushing up the intensity of the light output.

Applications

• Indoorandoutdoorfullcolordisplay

• LEDadvertisementpanels

•Decorativelighting

Features

•Water-resistance(IPX6*)perIEC60529:2001

•VerysmallPLCC6packagedimensions–3.4x2.8x1.8mm

• In-lineRGBdiesconfiguration

•AvailableinWhiteSurface,Black-SurfaceandFullBlack-Body

•Wideoperatingtemperaturerange:-40°to+110°

Avago Technologies

Tri-color High Brightness

PLCC6 SMT LEDs

gives you a reliable,

long life product for

ease of design in full

color interior and

exterior signs

www.avagoresponsecenter.com/led

AvagoTechnologiesLEDLightingSolutions

One LED. Infinite colors. World’s first waterproof package.

For more information or to request a sample please go to:

http://bit.ly/jpn9V5


FEATURED

PROD

UCTS

FEATURED PRODUCTS

24-bit ADCs with Built-In PGA & ReferenceThe ADS1291, ADS1292, and ADS1292R are multichannel, simultaneous sampling, 24-bit, delta-sigma (ΔΣ) analog-to-digital converters (ADCs) with a built-in programmable gain amplifier (PGA), internal reference, and an onboard oscillator. The ADS1291, ADS1292, and ADS1292R incorporate all features commonly required in portable, low-power medical electrocardiogram (ECG), sports, and fitness applications. With high levels of integration and exceptional performance, the ADS1291, ADS1292, and ADS1292R enable the creation of scalable medical instrumentation systems at significantly reduced size, power,

and overall cost. The ADS1291, ADS1292, and ADS1292R have a flexible input multiplexer per channel that can be independently connected to the internally-generated signals for test, temperature, and lead-off detection.For more information, please click here.

Control

KLC

Oscillator

SPI

Monitors

IP

S

RLD

Reference

REF

ADC1

ADC2

A1

A2

MUX

ST

UP

NI

RESP

RESPDEMOD

(ADS1292R)

RESPMOD

(ADS1292R)

pH Sensing Analog Front End ICTexas Instruments Incorporated introduced two configurable analog front ends (AFE) that provide an easy-to-use, modular solution for bridging the gap between the microprocessor and sensor. Design engineers can dramatically reduce their development time by using a single AFE across multiple nondispersive infrared (NDIR) gas sensor and pH sensor platforms instead of designing several complex discrete solutions. The AFEs team with TI’s WEBENCH® Sensor AFE Designer software and bench-top development system. These tools allow engineers to select a sensor, design and configure the solution and download configuration data to the sensor AFE for immediate prototyping. For more information, please click here.

analog and digital systems. Using this all-new design approach, engineers can validate field-programmable gate array (FPGA) digital control logic alongside analog circuitry (such as for power applications) before leaving the desktop simulation stage. Multisim Professional Edition is optimized for layout routing and rapid prototyping needs, making seamless integration possible with NI hardware such as the NI reconfigurable I/O (RIO) FPGA platforms and PXI platforms for prototype validation. For more information, please click here.

Optimizing Circuit PerformanceNational Instruments introduces Multisim 12.0 with specialized editions for circuit design and electronics education. Multisim 12.0 Professional Edition is based on industry-standard SPICE simulation and optimized for usability. Engineers can improve design performance to fit their applications by minimizing errors and prototype iterations with Multisim simulation tools that include both customizable analyses developed in NI LabVIEW system design software and standard SPICE analyses and intuitive measurement instruments. Multisim 12.0 also provides unprecedented integration with LabVIEW for closed-loop simulation of

http://www.ti.com/product/ads1292r

http://www.prnewswire.com/news-releases/ti-introduces-worlds-first-configurable-ndir-gas-sensing-and-ph-sensing-afes-141729743.html

http://digital.ni.com/worldwide/bwcontent.nsf/5076c193a6bfa57486256a7000512ca4/531352f15193f4be8625799c00519211?OpenDocument

1.800.574.2791

EEWeb


[email protected]


Electrical Engineering Community

http://bit.ly/l6u6Cx


Positioning analog-to-digital con-verters (ADCs) in a modern digital receiver is an important issue that strongly impacts the design choices and the implementation costs. The signal transmitted over the channel is an analog function of the time to which a desired information content (message) has been applied by means of a process called modu-lation. The wireless channel adds noise to the signal and generates multi-paths, which causes delay and signal attenuation. The receiver has to fight its effects - the channel equalization is usually performed in the digital domain after the received signal has been translated to base-band. The baseband down conver-sion task usually requires more than one step; analog signal is, at first, down converted to an intermedi-ate frequency (IF) and then split

into in-phase and quadrature (I/Q) components which are then base-band shifted. In some applications of telecommunication, IF sampling is a good choice for directly shift-ing the I/Q components to base-band by avoiding the intermediate frequency translation. However, in most of the applications, IF sam-pling cannot be applied, and com-plex heterodynes (analog or digital, depending on the application) have to be used for implementing the fre-quency translations. The place at which the analog-to-digital conver-sion has to be performed is a key issue in the receiver design. The optimum point for inserting digital signal processing (DSP) is deter-mined by matching the desired system performance requirements and costs to bandwidth and signal-to-noise ratio (i.e., speed and preci-

sion) limitation of the signal proces-sor and converters. Two options are currently possible:

• To place the ADC immediately after IF shifting blocks with the baseband down conversion of the I/Q components completely performed in the digital domain.

• To place the ADC after the I/Q components have been translated to baseband (I/Q down conversion is still performed in the analog domain while the decoding, some time recovery tasks, and channel equalization are performed in the digital domain).

The first approach requires a high performance ADC, which implies high power consumption and increased design costs. However, it

Dr. ElettraVenosa

EE PHD

Comparison of I/Q Sampling with Dual Core ADCs vs Ping-

Pong Single Core ADC

Co-Authors:Dr. Mikko Waltari

Dr. fred harrisMike Kappes

IQ Analog


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

has the advantage of digital signal processing being applied earlier in the receiver chain, which is strongly recommended in some new applications (i.e., software defined radio). On the other side, the second approach relaxes the requirements for the ADCs but increases the imbalances of the I/Q components (when two ADCs are used), as well as timing mismatches (when only one ADC is used in ping-pong configuration).

In this article, we describe the approaches in which the analog-to-digital conversion is performed on the complex I/Q components after they have been shifted to baseband by analog heterodynes. In particular, we describe the digital circuitry required for digital I/Q imbalance corrections—which is necessary in that case—and time recovery of the I/Q components which is particularly needed when a single ADC is used in ping-pong configuration.

ANALOG-TO-DIGITAL CONVERSION OF IF SIGNALS

When used for converting intermediate frequency signals, as shown in the digital receiver of Figure 1, the requirements for the ADC become more restrictive. The real IF signal, in fact, has a wider (about two times) bandwidth than its complex I/Q baseband components. According to the Nyquist theorem, the sampling frequency must be selected to be at least twice the single side signal bandwidth, BW, for entirely capturing its information content. Note that for low-pass signals, the single side bandwidth of the

signal is coincident with its highest frequency component. In reality, the lowest sampling rate described by the Nyquist theorem (fs=2BW) is only an ideal limit. It is lower bound and a dream for the uninitiated system designers. It is well known that the sampling frequency has to be selected to ensure some free room, Δf, in the frequency domain for allocating the transition bandwidths of the anti-alias filter (fs=2BW+Δf). High sampling rate and high precision sampling clock are difficult characteristics to obtain in ADCs - they strongly impact the design costs. High resolution, high static linearity and dynamic linearity are other fundamental requirements to be taken care of for converters processing broadband signals.

Pipeline and sigma-delta ADCs are the most frequently used architectures in communication systems. While the pipeline architecture has the advantage of increasing the resolution by increasing the number of conversion stages, the sigma-delta converter, which is inherently a narrow band ADC, can accomplish some tasks required in single-channel applications (when paired with a very high clock rate). Typically, for the noise shaping to be effective, the converter oversampling ratio has to be 16 or higher. In spite of the required high sampling rate, sigma-delta converters have some useful features for communications applications. For instance, it is possible to design a complex band-pas sigma-delta with asymmetric signal transfer function to provide additional image rejection for low IF signals. They also offer the advantage of a smaller hardware

implementation (silicon area) because they relax the analog pre-filter requirements.

In order to use a lower sampling frequency, it is a common practice for some specific telecommunication applications in which the received signal has a sparse, or band-pass nature (e.g., cellular base stations) to sample the intermediate frequency signal with a rate smaller than two times its maximum frequency (IF sampling or low-rate sampling). When applied to IF signals, in low-rate sampling fashion, a single ADC digitizes the real signal, which is then converted to complex components in the digital domain using digital signal processing methods. Advantages of this technique include reduced hardware complexity, workload, power consumption and costs. These advantages are possible because the IF sampling method automatically performs part of the down-conversion task.

Despite the benefits that IF sampling techniques provide, one important drawback is noise aliasing. Such aliasing reduces the equivalent ADC SNR performance if the input signal is not sufficiently band-limited, allowing noise in the alias bands to be digitized and converted to baseband along with the desired signal. Also, when IF sampling is applied, the system needs to be equipped with a band-pass anti-aliasing filter with relatively narrow transition bands. Narrow transition bands imply a high quality factor, Q, as well as high filter order. For this reason, IF sampling can be used only in some applications. For example, when adjacent interfering


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

signals are present in the received spectrum (i.e., the input signal does not have a sparse nature), IF sampling is not a feasible option; rather, oversampling is required in order to avoid aliasing and to relax the implementation requirements of the anti-alias filter.

Rather than discussing the possibility of sampling intermediate frequency signals, which requires high performance ADCs, or exploiting the possibility of using low-rate sampling, we will focus on the choice of performing low-pass sampling (fs=2BW+f) of the complex I/Q signal components after they have been shifted, by means of a pair of analog mixers to baseband. In the following sections, we propose two approaches for performing I/Q sampling, discussing the drawbacks that each of them contains and providing digital compensation circuits for correcting their negative effects on the sample data signal.

ANALOG-TO-DIGITAL CONVERSION OF I/Q COMPONENTS

To digitize the I/Q components after shifting them to baseband is the most frequently adopted solution in today’s communication receivers. This approach has the advantage of relaxing the ADC requirements because the bandwidths of the baseband components are about half of the bandwidth of the corresponding real IF signal.

Sampling of I/Q components can be implemented in two ways:

• with a pair of (almost) matched ADCs.

• with one single ADC in ping-pong configuration.

The solution with two converters, whose block diagram is shown in Figure 2, relaxes the ADC requirements but contributes to increasing the I/Q imbalances ,which are mainly introduced by the couple of analog matched mixers

that shift the signal to baseband.

The solution with one converter in ping-pong configuration, which is shown in Figure 3, does not contribute to an increase in the I/Q imbalances. However, it requires a digital time recovery circuitry for compensating the timing offset caused by the ping-pong between the I and Q components. In this configuration, a “ping-pong” S/H stage is abutted to the general-purpose ADC input. The ping-pong stage operates as two S/H blocks, each sampling the in-phase and quadrature input channels. Sampled data from both channels is then multiplexed into a single analog data stream and quantized by a single ADC working at fs’=2fs, where fs is the frequency at which I and Q inputs are sampled. A demultiplexer then takes the ADC output samples and makes them available at the I and Q digital output buses. The ping-pong S/H stage could be set for single channel operation, in which case the same

Figure 1: High Level Block Diagram of a Communication Receiver with Digital I/Q Down Conversion.

CarrierWaveform

RF Carrier

Decimate

Bits

MatchedFiltersin( 0n)

x

x

xGainControl

LNA VGA

Oscillator

Clock

IF Stage ADCP-S

DDS

Low-PassFilter

Low-PassFilter

Low-PassFilter

Low-PassFilter

TimingPLL

Carrier PLL

DE

TE

CT

OR

cos( 0n)


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

ADC can be used for the digitization of IF signals at a full fs’ sampling rate or for multiple channels operating at an ADC sampling rate fs’=M*fs where M is the number of channels. Since a single ADC is used, this solution is extremely compact.

Note that in the standard configuration, two ADCs are used for simultaneously sampling in-phase and quadrature components. And because the sampling occurs simultaneously on the I/Q paths, there is no time offset between the samples derived from the two components (see Figure 4 for more details). However, when a single ADC is used in ping-pong configuration, I/Q components’ sampling does not occur simultaneously. The I/Q components are, in fact, sampled sequentially. Consequently, the samples representing one of the two components result in a half sampling period shift, which makes the inclusion of a synchronization circuit in the system a necessity. Since the imbalances affecting I/Q components are a source of troubles that affect the signal reconstruction, the next section provides a model for describing their effects and a proposal for a digital compensation architecture.

We also provide, in the last section of this paper, the architectural scheme of a band-pass, 1-to-2, interpolator used for digital time compensation when a single converter is used in ping-pong configuration.

DIGITAL I/Q BALANCING

Gain and Phase mismatch of the analog quadrature mixers in a modem causes undesired coupling of positive and negative frequency components of an up- or down-converted signal. It is well-known that this coupling operates as an interference that affects the performance of the communication path. The largest contributor to the imbalance is the pair of (almost) matched balanced mixers. However, all analog components in the two paths, such as filters and analog-to-digital converters, contribute to the mismatch. In the days of analog single sideband telephone systems, the imbalance-related interference was experienced as an annoying second audio signal in a subscriber’s voice channel. In today’s modulation schemes, the interference limits the constellation density of a communication system. This is quite evident in orthogonal frequency division multiplexing (OFDM) modulation in which the

positive and negative frequency components of the FFT-based demodulator talk to each other through the mismatch terms.

Controlling the mismatches becomes even more important in receivers that process broadband signals. Figure 5 presents the model of the gain and phase imbalance of an I/Q down converter. While it is common practice to split the gain and phase error terms between the two paths, we find this does little to enhance understanding of the problem, so we elect to assign the error to only one of the two arms.

Figure 6 presents the signal model illustrating the effect of the mismatches on the observed time domain signal. The observed quadrature terms I’ and Q’ are related to the desired quadrature terms I and Q by the relationship shown in Equation (1). Equation (2) shows is the approximate inverse of this relationship that computes the desired terms from the observed terms.

Figure 2: High Level Block Diagram of a Communication Receiver with Analog I/Q Down Conversion.

CarrierWaveform cos(f0t)

RF Carrier

Bitsx

x

xGainControl

LNA VGA

Oscillator

IF Stage P-Sπ/2

Analog LPFilter

Digital

Matched Filter

Baseband Demodulation

!/Q Balancing

Carrier Recovery

Timing Recovery

Analog LPFilter

ADC

ADC

''

( )QI I

Q1 0

1 1a f= +; 8 8E B B

''

( )QI I

Q1 0

1 2a f= - -; 8 8E B B


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

Figure 4: Comparison Between Standard Sampling Configuration of I/Q Components and Ping Pong Configuration.

Figure 3: High Level Block Diagram of a Communication Receiver with Analog I/Q Down Conversion and a Single ADC in Ping-Pong Configuration.

Figure 5: I-Q Mismatch in Quadrature Down Converter.

( ) ( ) (3)H Z h n Z n

n

n

0

2

= -

=

/

The approximate inverse in Equation (2) reflects the signal processing tasks performed by the I/Q digital balancing system shown in Figure 7. The estimators can be implemented recursively with 1-tap gradient filter.

DIGITAL TIME RECOVERY

When used in ping-pong configuration, the analog-to-digital conversion stage needs to be followed by a digital timing recovery stage that has to be applied to the sampled data stream, resulting in a shift of half a sampling period. The timing recovery circuit in that case is easy to implement by using low-cost 1-to-2 multirate interpolation architecture based on digital half-band filters. The initial form of the 1-to-2 up sampling process, based on zero insertion to raise the input sample rate, is shown in Figure 8.

The half-band filter H(Z) can be then partitioned into a pair of polyphase filters as shown in Equations (3) and (4) and Figure 9.

( ) ( ) ( ) ( )H Z h n Z Z h n Z2 2 1 4n

n

N

n

Nn2

0

1

0

12= + +-

=

-

-

--/ /

( ) ( ) ( ) ( )H Z h n Z Z h n Z2 2 1 4n

n

N

n

Nn2

0

1

0

12= + +-

=

-

-

--/ /

CarrierWaveform cos(f0t)

RF Carrier

Bitsx

x

xGainControl

LNA VGA

Oscillator

IF Stage π/2

Analog LPFilter

Digital

Matched Filter

Demodulation

Carrier Recovery

Timing Recovery

Analog LPFilter

PPS/H ADC DEMUX

Q(t)

Q[0]

Q[0] I[0] Q[1] I[1]

I[0]

nADCS/H

I(t)

Q(t)

n

n

ADCS/H

ADCS/H

Q[1]

I[1]

Q[2]

I[2]

I(t)

cos(f0t)

-(1+ )cos(f0t+ )

I’(t) I’[n]

Q’(t) Q’[n]

x

x

ADCAnalog LPFilter

ADCAnalog LPFilter


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

Figure 6: Time Domain Model of I/Q Mismatches.

Figure 7: Model of I/Q Digital Balancer.

Figure 8: One-to-Two Up Sampling Process with Half-band Filter.

( )( )N

ff Atten d

2 12

25s

2, D

B

( ) ( )f fs1 2 6aD = -

x

+x

I’

(1+ )Q’

I

Q

x

+x

I’

1– ˆ ˆ

Q’

I

Q

estimation estimation3

y[n]x[m]

2N+11:2

H(Z)

The order of the re-sampling and the filtering can be reversed leading to the form shown in Figure 10. Finally, as shown in Figure 11, the pair of l-to-2 up sampling switches and sample delay can be replaced with a two-tap commutator that performs the equivalent scheduling of path outputs to the output sample stream.

Figure 11 represents the architecture of the 1-to-2 band-pass interpolator selected for the required time recovery task. Note that the prototype filter is designed with 2N+1 taps and then partitioned into two paths with one path containing the zero-valued taps and implemented as a delay-only path with the other path containing the remaining N non-zero taps. The filter requires N arithmetic operations (ops) to generate two output samples in response to each input sample. When we distribute the N ops per input over the two outputs, we find the filter workload is N/2 ops per output. The number of multiplies per output can be reduced by another factor of 2 by taking advantage of the even symmetry of the coefficient set in the lower path filter. For completeness, we report here that the length of the filter shown in Figure 11 can be estimated as:

Where Δf is the transition bandwidth of the filter and its value can be calculated as:

Where α is the transition bandwidth of the filter. Note, from Equations (5) and (6), that as the fractional


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

Figure 9: One-to-Two Up Sampling with Polyphase Half-band Filter.

Figure 10: One-to-Two Up Sampling at Output of Polyphase Half-band Filter.

Figure 11: Half Band 1-to-2 Up Sampler.

bandwidth of the filter increases, which causes a decrease in the transition bandwidth, the filter length increases.

After the 1-to-2 interpolating stage, the only remaining task for completing the time recovery is to down sample the signal, 2-to-1, for discarding the samples, which are located at the wrong time locations. Note that the samples we are going to discard are the ones output by the upper path of the 1-to-2 interpolator of Figure 11. Because there is no point in calculating samples that will be discarded later on in the 2:1 down sampling process, the signal interpolation and the signal decimation can be merged by processing the input signal only through the lower interpolator path composed of non-zero taps of the prototype half-band filter.

REFERENCES

[1] F.J. Harris, “Multirate Signal Processing for Communication systems”, Prentice Hall, Upper Saddle River, New Jersey 07458, 2004.

[2] F.J Harris and W. Lowdermilk, “Software Defined Radio: A Tutorial”, IEEE Instrumentation and Measurement Magazine, February 2010.

[3] C. Dick, B. Eggs and F.J Harris, “Architecture and Simulation of Timing Synchronization

Circuits for the FPGA Implementation of Narrowband Waveforms”, in SDR Forum, 2006, pp. 1-6.

[4] Fredric J. Harris and Michael Rice, “Multirate Digital Filters for

y[n]x[m]

N

N+1

1:2

H0(Z2)

H1(Z2)

+

Z-1

y[n]x[m]

N

N+11:2

1:2

H0(Z2)

H1(Z2)

+

Z-1

y[m]x[n]

N

N+1

H0(Z)

H1(Z)


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

Symbol Timing Synchronization in Software Defined Radios”, IEEE Journal on Selected Areas in Communications, vol. 19, no. 12, pp. 2346-2357, December 2001.

[5] Rice, M., Dick, C., & Harris, F. (2001). “Maximum likelihood carrier phase synchronization in FPGA-based software defined radios”. doi:10.1109/ICASSP.2001.941058.

[6] F. M. Gardner, “Interpolation in digital modems, part I: Fundamentals,” IEEE Transactions on Communications, vol. 41, no. 3, pp. 501-507, March 1993.

About the Author

Elettra Venosa received the “Laurea” (BS/MS) degree (summa cum laude) in electrical

engineering in January 2007 from Seconda Università degli Studi di Napoli, Italy. From January 2007 to November 2007, she was a researcher at the Italian National Inter-University Consortium for Telecommunications. In November 2010, she received her Ph.D. in Telecommunication/DSP from Seconda Università degli Studi di Napoli, Italy. From June 2008 to September 2008, she worked as a project manager for Kiranet s.r.l.- ICT Research Centre – to develop an advanced radio identification system for avionics, in collaboration with the Italian Center for Aerospace Research (CIRA). From April 2009 to September 2009, she worked at Communications and Signal Processing Laboratory (CSPL) in the department of Electrical and

Computer Engineering at Drexel University, Philadelphia, PA, where she focused on sparse sampling techniques for software defined radio receivers. Currently, she is working as a system engineer in IQ-Analog Corp., a semiconductor company located in San Diego, CA. Currently, she is also working as a postdoctoral researcher on multirate signal processing techniques for software defined radio design in the department of Electrical and Computer Engineering at San Diego State University, San Diego, CA. She is author of the book, “Software Radio Sampling Rate Selection, Design and Synchronization”. ■

Join Today




BeStar®

ACOUSTICS & SENSORS

Teamwork • Technology • Invention • Listen • Hear

PRODUCTSSpeakers

Buzzers

Piezo Elements

Back-up Alarms

Horns

Sirens/Bells

Beacons

Microphones

Sensors

INDUSTRIESAutomotive

Durables

Medical

Industrial

Mobile

Fire / Safety

Security

Consumer

Leisure

QS9000 • TS/ ISO16949 • ISO14001 • ISO13485 • ISO9001

bestartech.com | [email protected] | 520.439.9204

Preferred acoustic componentsupplier to OEMs worldwide

http://bit.ly/jebqhL

http://bit.ly/nKLRXo


When it comes to writing code there are a lot of programming environments (IDEs) you may consider. We’ve all used everything from the top-end manufacturers to third-party tools, right down to using a text editor. However, for one project I worked on, I found myself using a spreadsheet to generate the code for it.

Now it isn’t like I used a spreadsheet to do all the programming, but it played an important role and continues to do so long after that first project was completed. The project was to design a fan speed controller that had a simple temperature-to-fan speed relationship. I started out with two set points of minimum speed at 20°C and full speed at 40°C. In most cases, people would just write code to calculate the speed based on a temperature that was between these two set points. I also considered this, but realized that it seemed like a waste to run these calculations every time around the loop. I also noted that the NTC I was going to use was non-linear. So using basic math was going to give me errors over the whole range; I needed more complex math to get around this issue.

Getting the math right seemed really difficult, especially as I was writing in assembly code on an 8-bit micro (which was required due to cost and design factors). I ended up finding the answer in look-up tables, which is the route I ultimately took. So out came a spreadsheet and I used it first to enter all the NTC data and profile it. I then added my own circuit response, so I ended up with a temperature-to-voltage input (for my ADC) table. Then, I added a bit more math and was able to get the number of ADC values for each temperature point on the graph. The next step was to add a column giving me the required output I needed. For example, when it’s below 20°C in the table, I fill in the minimum fan speed, and above 40°C, I fill in the maximum fan speed. Then, I get the spreadsheet to draw a line or fill in all the values in between. This becomes my look-up table allowing me to go from ADC counts to fan speed. It’s nice and easy--something I bet most people would have done--but I took it one step further.

I was using a Microchip PIC16, and because of the odd system it uses, I could not just generate a look-up table the normal way. The process on the PIC16 requires use

A

1

2

3

4

B

WritingCodeUsing aSpreadsheet

PaulClarkeElectronics

DesignEngineer


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

I was also able to generate the code that checks and then adds the value to the program counter. This allowed me to shrink my look-up table to just the area that I was interested in, and I saved space by not having to create a full 255 lines of look-up table. I could select error values to return all sorts of stuff. One spreadsheet, which took about two days to generate and test, allowed me to switch the NTC for one with a different profile and even transport the code into other applications and projects that use voltage input profiles.

There is one other great benefit from having a look-up table. We are no longer restricted to two set-points — we can now have a different fan speed for any temperature, giving us 255 set-points, which allows a customer to generate a profile of almost any shape they want.

Okay, so a spreadsheet is not a real IDE—I still need one to compile the output—but it’s a tool that has allowed fast changes and rapid programming of our products, giving us advantages where others could not match.

of the index value, or in this case, the ADC counts as a value that you add to the program counter. This jumps you into a block of code that returns, line by line, the look-up value you want. This means I have a long list of op codes—each returning a value.

EXAMPLE:

cell = CONCATENATE,” ; “,O15,” adc counts”)

Where O15 = 25 and Q15 = 95

Result, cell value is : retlw .95 ; 25 adc counts

Then the next step came in; I used the concatenation function in the spreadsheet to take my required output value and turn it into a line of code—the op code that would return the value. This then means I end up with a long column of op codes I can just copy and paste into my main code. What it also means is that I am able to generate a 35° to 55°C profile in less than 15 minutes. Since then I have been able to receive a request from a customer, generate a new profile, program, test and ship boards in one working day (assuming I’m not busy with other stuff).

Figure 1


TECHN

ICA

L ARTIC

LETECHNICAL ARTICLE

About the Author

Paul Clarke is a digital electronics engineer with strong software skills in assembly and C for embedded systems. At ebm-papst, he develops embedded electronics for thermal management control solutions for the air movement industry. He is responsible for the entire development cycle, from working with customers on requirement specifications to circuit and PCB design, developing the software, release of drawings, and production support. ■

Join Today



Figure 2



RETURN TO

ZERORETURN TO ZERO


RETURN TO

ZERORETURN TO ZERO


[email protected]



http://bit.ly/l6u6Cx

EEWeb Pulse - Issue 37, 2012

Documents

Transcript of EEWeb Pulse - Issue 37, 2012