Chapter 4 BJT BIASING CIRCUIT - الصفحات...
Transcript of Chapter 4 BJT BIASING CIRCUIT - الصفحات...
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Chapter 4BJT BIASING CIRCUIT
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Introduction – BiasingThe analysis or design of a transistor amplifier requires knowledge of both the dc and ac response of the system. In fact, the amplifier increases the strength of a weak signal by transferring the energy from the applied DC source to the weak input ac signal The analysis or design of any electronic amplifier therefore has two components: •The dc portion and •The ac portion During the design stage, the choice of parameters for the required dc levels will affect the ac response.What is biasing circuit?Biasing: Application of dc voltages to establish a fixed level of current and voltage.
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Purpose of the DC biasing circuit• To turn the device “ON” • To place it in operation in the region of its characteristic where the device operates most linearly .•Proper biasing circuit which it operate in linear region and circuit
have centered Q-point or midpoint biased•Improper biasing cause Improper biasing cause
•�Distortion in the output signal•�Produce limited or clipped at output signal
Important basic relationship
E C BI I I= +C
B
II
β =
( 1)E B CI I Iβ= + ≅
CB CE BEV V V= −
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Operating Point
•Active or Linear Region Operation Base – Emitter junction is forward biased Base – Collector junction is reverse biased Good operating point
•Saturation Region Operation Base – Emitter junction is forward biased Base – Collector junction is forward
biased•Cutoff Region Operation Base – Emitter junction is reverse biased
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BJT Analysis
DC analysis
Calculate the DC Q-point
solving input and output loops
Graphical Method
AC analysis
Calculate gains of the amplifier
DC Biasing Circuits•Fixed-bias circuit•Emitter-stabilized bias circuit•Collector-emitter loop•Voltage divider bias circuit•DC bias with voltage feedback
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FIXED BIAS CIRCUIT
This is common emitter (CE) configuration
1st step: Locate capacitors and replace them with an open circuit
2nd step: Locate 2 main loops which;
BE loop (input loop)CE loop(output loop)
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FIXED BIAS CIRCUIT
1st step: Locate capacitors and replace them with an open circuit
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FIXED BIAS CIRCUIT
2nd step: Locate 2 main loops.
12
1
2
BE Loop CE Loop
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FIXED BIAS CIRCUIT
BE Loop Analysis
1
■ From KVL;
IB
0CC B B B
CC BEB
B
E
V VI
V
R
V I R−−
∴ =
+ + =A
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FIXED BIAS CIRCUIT
CE Loop Analysis
■ From KVL;
■ As we known;
■ Substituting withBC II β=2
IC
0CC C C CE
CE CC C C
V I R VV V I R
− + + =∴ = −
B
A B
−=
B
BECCDCC R
VVI β
Note that does not affect the value of IcCR
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FIXED BIAS CIRCUIT
DISADVANTAGEUnstable – because it is too dependent on β and produce
width change of Q-pointFor improved bias stability , add emitter resistor to dc bias.
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Load line analysis
A fixed bias circuit with given values of VCC,RC and RB can be analyzed ( means, determining the values of IBQ, ICQ and VCEQ) using the concept of load line also.
Here the input loop KVL equation is not used for the purpose of analysis, instead, the output characteristics of the transistor used in the given circuit and output loop KVL equation are made use of.
DC Load Line
Cutoff Region
Saturation Region
Q-Point
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Plot load line equation
IC(sat) occurs when transistor operating in saturation region
VCE(off) occurs when transistor operating in cut-off region
CE CC C CV V I R= −
0=
=CE
sat
VC
CCC R
VI
0)( =−=
Coff ICCCCCE RIVV
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Circuit Values Affect the Q-Point
Decreasing Vcc
Increasing Rc
Varying Ib
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EMITTER-STABILIZED BIAS CIRCUIT
An emitter resistor, RE is added to improve stability
1st step: Locate capacitors and replace them with an open circuit
2nd step: Locate 2 main loops which;BE loopCE loopResistor, RE added
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EMITTER-STABILIZED BIAS CIRCUIT
1st step: Locate capacitors and replace them with an open circuit
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EMITTER-STABILIZED BIAS CIRCUIT
2nd step: Locate 2 main loops.
12
2
BE Loop CE Loop
1
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EMITTER-STABILIZED BIAS CIRCUIT
BE Loop Analysis
■ From kvl;
Recall;
Substitute for IE
0CC B B BE E EV I R V I R− + + + =
( 1) 0
( 1)
CC B B BE B E
CC BEB
B E
V I R V I RV VI
R R
β
β
− + + + + =−
∴ =+ +
BE II )1( += β
1
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EMITTER-STABILIZED BIAS CIRCUIT
CE Loop Analysis
■ From KVL;
■ Assume;
■ Therefore;CE II ≈
0CC C C CE E EV I R V I R− + + + =
2
)( ECCCCCE RRIVV +−=∴
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Improved Bias StabilityThe addition of the emitter resistor to the dc bias of the BJT provides improved stability, that is, the dc bias currents and voltages remain closer to where they were set by the circuit when outside conditions, such as temperature, and transistor beta, change.
( 1)CC BE
cB E
V VIR R
ββ
−= + +
Without Re With Re
CC BEc
B
V VIR
β −
=
Note :it seems that beta in numerator canceled with beta in denominator
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VOLTAGE DIVIDER BIAS CIRCUIT Provides good Q-point stability with a single polarity supply voltage This is the biasing circuit wherein, ICQ and VCEQ are almost independent of
beta. The level of IBQ will change with beta so as to maintain the values of ICQ and
VCEQ almost same, thus maintaining the stability of Q point. Two methods of analyzing a voltage divider bias circuit are: Exact method : can be applied to any voltage divider circuit Approximate method : direct method, saves time and energy, 1st step: Locate capacitors and replace them with an open circuit 2nd step: Simplified circuit using Thevenin Theorem 3rd step: Locate 2 main loops which; BE loop CE loop
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VOLTAGE DIVIDER BIAS CIRCUIT
Simplified Circuit
Thevenin Theorem;
■ 2nd step: : Simplified circuit using Thevenin Theorem
21
2121 //
RRRRRRRTH +
×==
CCTH VRR
RV21
2
+=
From Thevenin Theorem;
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VOLTAGE DIVIDER BIAS CIRCUIT 2nd step: Locate 2 main loops.
1
2
BE Loop CE Loop
1
2
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VOLTAGE DIVIDER BIAS CIRCUIT
BE Loop Analysis
■ From KVL;
Recall;
Substitute for IE
0TH B TH BE E EV I R V I R− + + + =
( 1) 0
( 1)
TH B TH BE B E
TH BEB
RTH E
V I R V I RV VI
R R
β
β
− + + + + =−
∴ =+ +
BE II )1( += β
1
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VOLTAGE DIVIDER BIAS CIRCUIT
CE Loop Analysis
■ From KVL;
■ Assume;
■ Therefore;CE II ≈
0CC C C CE E EV I R V I R− + + + =
)( ECCCCCE RRIVV +−=∴
2
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Approximate analysis:
2
2
2
2( 1) 10i R b
E E
R R I
R R
I
R Rβ β
→
+ ⇒ >
If this condition applied then you can use approximation method .This makes IB to be negligible. Thus I1 through R1 is almost same as the current I2 through R2.Thus R1 and R2 can be considered as in series.Voltage divider can be applied to find the voltage across R2 ( VB)
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Approximate AnalysisThen IB << I2 and I1 ≅ I2 :When βRE > 10R2 ,
From Kirchhoff’s voltage law:
21
CC2B RR
VRV
+=
E
EE R
VI =
BEBE VVV −=
EECCCCCE RI RI V V −−=
)R (RIV VII
ECCCCCE
CE
+−=≅ This is a very stable bias
circuit. The currents and voltages are nearly independent of any variations in β.
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DC Bias with Voltage Feedback
Another way to improve the stability of a bias circuit is to add a feedback path from collector to base.
In this bias circuit the Q-point is only slightly dependent on the transistor beta, β.
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Base-Emitter Loop
)R(RRVV
IECB
BECCB +β+
−=
From Kirchhoff’s voltage law:
CC C C B B BE E E-V + I R +I R +V +I R 0′ =
Where IB << IC:
CIBICICI' ≅+=
Knowing IC = βIB and IE ≅ IC, the loop equation becomes:
0RIVRIRI– V EBBEBBCBCC =β−−−β
Solving for IB:
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Collector-Emitter Loop
Applying Kirchoff’s voltage law:
IE + VCE + I’CRC – VCC = 0
Since I′C ≅ IC and IC = βIB:
IC(RC + RE) + VCE – VCC =0
Solving for VCE:
VCE = VCC – IC(RC + RE)
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