Rec101 unit ii (part 2) bjt biasing and re model

BJT Biasing & re model

Unit II :

Bipolar Junction Transistor: Transistor Construction, Operation, Amplification action.Common Base, Common Emitter, Common Collector Configuration DC Biasing BJTs:Operating Point, Fixed-Bias, Emitter Bias, Voltage-Divider Bias Configuration. CollectorFeedback, Emitter-Follower Configuration. Bias Stabilization. CE, CB, CC amplifiers and ACanalysis of single stage CE amplifier (re Model ). Field Effect Transistor: Construction andCharacteristic of JFETs. AC analysis of CS amplifier, MOSFET (Depletion andEnhancement)Type, Transfer Characteristic

11/10/2017 1REC 101 Unit II by Dr Naim R Kidwai, Professor & Dean, JIT Jahangirabad

BJT: DC Biasing BJTs: Operating Point


Transistor operates in three regions. Junctions biasing in different regions of operation as below

• Active (Linear)-region :

▪ BE junction forward-biased

▪ CB junction reverse-biased

• Cutoff-region : Both BE & CB junction reverse-biased

• Saturation-region : Both BE & CB junction forward-biased

Biasing: dc biasing establish a fixed level of output current and voltage that sets a operating or quiescent point (Q-point) on the characteristics. Quiescent means quiet, still or inactive.

If not properly biased a transistor amplifier may go into cutoff / saturation when ac input is applied



Point B: allows variation of output,but limited by VCE=0 V & IC=0 mA

Point C: allows output variation inresponse to, +ve/-ve swing of input

Point D: D is near maximum powerlevel. Output swing in the +vedirection is limited

Point E & F: device in cut-off region& saturation region respectively

VCE(V)

IB =0 A

10 A

20 A

40 A

50 A

IC (mA) 60 A

Satu

rati

on

regi

on

VCE Saturation

0 5 10 15 20

6

5

4

3

2

1

30 A

Cutoff region

VCE max

Pmax

A

B

C

D

E

F

Operating point is fixed point on output characteristics (by VCE & IC)

Point A: the device is fully off ie. VCE=0 V & IC=0 mA (no bias)

Point C is suitable Q point for amplification


• increase in ac power (amplification) occurs due to transfer of energyfrom dc supplies.

•So analysis/design of a transistor amplifier requires knowing both thedc and the ac response of the system.

•To find Q point, output voltage & output current due to dc biasing hasto be known. (for CE configuration, IC , VCE and IB )

•To do dc bias analysis first remove ac input/output and open circuitblocking/ bypass capacitor.

•Each configuration is analysed by recurring use of following equations


BC

CBE

BE

II

III

V

and

)1(

7.0

BJT: Fixed-Bias


Fixed bias DC equivalent of Fixed bias

B

BECCC

R

VVI

E

C

B

VCC

IC

Q

VBE

RCRB

+-

IB

Input ac signal

Output ac signal

C1

C2VCE

E

C

B

VCC

IC

Q

VBE

RCRB

+-

IB

VCC

VCE

VVII BEBC 7.0 and

CCCCCE RIVV

• VCC bias collector and base through RC and RB respectively while emitter is grounded.

• Fixed bias is common in switching circuits.• Disadvantage is its dependency ( varies

with temperature)

B

BECCB

R

VVI

BJT: Emitter Bias


• Emitter bias provides improved bias stability with respect to ( or temperature).

• It uses a emitter resistance RE. which acts as a feedback

B

EBBECCB

EBEEE

B

EBECCB

R

RIVVI

RIRIVR

VVVI

)1( so

)1( as ,

, as

7.0 and

CE

EECCCCECCCCCE

BEBC

II

RIRIVVRIVV

VVI I

EB

BECCC

)R(βR

VVβI

1

ECCCCCE RRIVV

E

C

B

VCC

IC

Q

VBE

RCRB

+-

IB

Input ac signal

Output ac signal

C1

C2

VCE

IERE

Emitter bias

EB

BECCB

)R(βR

VVI

1

BJT: Voltage-Divider Bias Configuration


get wesolving and V ngsubstituti

1again

where,

B

21

21

121

21

EBBEEEBEB

BCCBBCCB

RIVRIVV

RR

RRR

R

V

R

V

R

V

R

VVIII

ECCCCCE RRIVV

E

BECC

BRR

VR

RV

I1

1

CEEECCCCCE

BEBC

IIRIRIVV

VVII

as ,again

7.0 and

Voltage divider bias

E

C

B

VCC

IC

Q

VBE

RCR1

+-

IBInput ac signal

Output ac signal

C1

C2

VCE

IERE

R2

I1

I2• Voltage divider bias provides excellent bias stability with

respect to or temperature changes• Base bias is provided using a voltage divider circuit while

feedback resistance RE is used

E

BECC

CRR

VR

RV

I1

1

BJT: Collector Feedback


Collector feedback bias

E

C

B

VCC

IC

Q

VBE

RC

RF

+-

IBInput ac signal

Output ac signal

C1

C2

VCE

IERE

VVII

R

RRI

R

VVI

R

RIVRIVI

BEBC

F

ECC

F

BECCB

F

EEBECECCB

7.0 and

ECCCCCE RRIVV

ECF

BECCC

RRR

VVI

CEEECCCCCE IIRIRIVV as ,again

• Maintain relative bias stability with respect to or temperature changes• base resistor RB is connected to the collector rather than to VCC

ECF

BECCB

RRR

VVI

BJT: Emitter-Follower Configuration


E

C

B

-VEE

Q

VBE

RB

+-

IBInput ac signal

Output ac signal

C1

C2

VCE

IERE

B

EBBEEEB

B

EEBEEEB

R

RIVVI

R

RIVVI

1

EEEECE RIVV

EB

BEEEB

RR

VVI

1

• Collector is grounded, base is connected to collector through RB and emitter is baised• Biasing stability similar to emitter bias

EB

BEEEE

RR

VVI

1

1

BJT: Common base Configuration bias


E

BEEEE

R

VVI

CCCCCB RIVV

CE

EEEECCCCECCE

II

VRIRIVVVV

as

RE

E C

B

VEE VCC

IE IC

IB

Q

VBE VCB

Output ac signal

C2

Input ac signal

C1

RC

VCE

ECCEECCCE RRIVVV

E

BEEEC

R

VVI

BJT: Biasing Example


For the circuit in figure, Find out ICQ and VCEQ

E

C

B

20 V

I

C

=90

20 K

IBac i/p

ac o/p

10 F

5 K

2 K

1 K

10 F

20 F

E

C

B

VCC =20 V

IC

=90

20 K

IB

5 K

2 K

1 K

Kx

RR

RRR 4

520

520

21

21

Vx

RRIVV ECCCCCEQ

61.10313.320

mAII BCQ 13.3

mAmAA

xx

x

RR

VR

RxV

IE

BECC

E 0347.095

3.3

101914

7.020

420

1 3

1

BJT: biasing summary


B

BECCB

R

VVI

CCCCCE RIVV

EB

BECCB

)R(βR

VVI

1

ECCCCCE RRIVV ECCCCCE RRIVV

E

BECC

BRR

VR

RV

I1

1

BJT: biasing summary


ECF

BECCB

RRR

VVI

ECCCCCE RRIVV

EB

BEEEB

RR

VVI

1

EEEECE RIVV

E

BEEEE

R

VVI

CCCCCB RIVV

ECCEECCCE RRIVVV

BJT: Bias Stabilization.

Bias stability is a measure of the sensitivity of network to parameter variations. In BJT amplifier circuits, collector current IC is sensitive to each of the following parameters:

• : increases with increase in temperature

• VBE: decreases about 2.5 mV /°C with increase in temperature

• ICO : doubles in value for every 10°C increase in temperature

Any or all factors can cause the designed Q-point to drift

Stability factor S is defined for each parameter affecting bias stability


CO

CCO

I

IIS

)(

BE

CBE

V

IVS

)(

CI

S )(

)()()(current collector in change Total SVVSIISI BEBECOCOC

BJT: bias stability summary


Fixed bias Emitter bias Voltage divider bias Collector feedback bias

)( COIS

E

B

E

B

CO

R

R

R

R

IS

1

)(

E

E

CO

R

R

R

R

IS

1

)(

C

F

C

F

CO

R

R

R

R

IS

1

)(

1

1)(

CIS

E

B

E

BC

R

R

R

RI

S

21

1 1

)(

E

E

C

R

R

R

RI

S

21

1 1

)(

CF

CFC

RR

RRIS

21

1)(

C

FC

BE

R

RR

VS

)(

E

E

BE

R

RR

VS

)(

B

BER

VS

)(

E

BE

BE

R

RR

VS

)(

The ratio RB/RE or R /RE or RF /RC should be small for better bias stability

BJT: Transistor modellingThe key to small-signal analysis is use of equivalent circuits (models)A model is a equivalent circuit, that best approximates ac behaviourof the transistor

There are two models commonly used in small signal AC analysis of atransistor: re model Hybrid equivalent model


SystemZi ZO

IiIO+

Vi

-

+VO

-

To make ac equivalent model• replace dc supplies by zero (short circuit)• Replace Coupling and bypass capacitor

by short circuit• Remove elements bypassed by short

circuit• define the parameters Zi, ZO, Ii, and IO

BJT: re Model for CE


EIE

IC

IB

VBE

C

B

E

IE

IC

IB

IB

+VBE

-

C

B

+

VCE

-

CE configuration CE Equivalent circuit

B

C

i

Oi

e

L

eB

LB

ii

LC

i

OV

O

CQA

CQ

A

C

CEOO

E

BEe

e

E

BE

B

BEi

BCOBi

I

I

I

IA

r

R

rI

RI

ZI

RI

V

VA

r

IV

I

V

I

VrZ

I

Vr

rI

V

I

VZ

IIIII

gain Current

gain Voltage

region activein curveoutput of slope is /1

currentcollector point Q age,Early volt

diode) of resistance (forward as

1

and ,

Ii=IB

IO=IC+Vi

-

+VO

-

B

E

C

E

re rO

re model for CE configuration including rO

IBRL

BJT: re Model for CB


re model for CB configuration

B

IE

ICIE

IE

-VBE

+

CE+

VCB

-

CB configuration CB Equivalent circuit

1gain Current

gain Voltage

highor very


and ,

E

C

i

Oi

e

L

eE

LC

i

OV

O

O

C

CBOO

e

E

BEi

ECOEi

I

I

I

IA

r

R

rI

RI

V

VA

r

r

I

VrZ

rI

VZ

IIIII

EIEIC

VBE

C

B

Ii=-IEIO=IC

+Vi

-

+VO

-

E

B

C

B

re rOIE RL

BJT: re Model for CC


B

E

i

Oi

eL

L

eLB

LE

i

OV

O

CQ

A

C

CE

E

EOO

E

BEe

eL

E

BEE

B

BEE

B

Bi

BEOBi

I

I

I

IA

rR

R

rRI

RI

V

VA

r

I

V

I

V

I

VrZ

I

Vr

rRI

VV

I

VV

I

VZ

IIIII

gain Current

gain Voltage


diode) of resistance (forward as

and ,

CC configuration

C

E

B

IC

IE

IB

VBE

CC configuration

E

C

BIC

IEIB

VBERL

Ii=IB

IO=-IE+Vi

-

+VO

-

B

C

E

(RL+re) rO

re model for CC configuration including rO

IB

RL

RL

BJT: ac modelling Example


For the circuit in figure, Find out re , Zi , ZO , AV , Ai

E

C

B

20 V

IC

=90

20 K

IBac i/p

ac o/p

10 F

5 K

2 K

1 K

10 F

20 F

E

C

B

IC

=90

20 K

IBac i/p

ac o/p

5 K

2 K

re model for voltage divider CE configuration including rO

IB

IO=IC+Vi

-

+VO

-

B

E

C

re rO

IBRCR2R1

Ii

BJT: ac modelling Example


re computation

23.8

16.3

26

16.395

3.300

101914

7.020

420

91

11

4520

520

3

1

21

21

e

E

Te

E

BECC

E

r

mA

mV

I

Vr

mAmA

Axx

x

x

RR

VR

RxV

I

Kx

RR

RRR

Zi computation

6247.7404000

7.7404000xrR

I

VZ e

i

ii

ZO computation (assume ro=)

2 KrRI

VZ OC

O

OO

AV computation

24323.8

2000

e

C

eB

CC

i

OV

r

R

rI

RI

V

VA

Ai computation

82.752000

624243

xZ

ZA

Z

V

Z

V

I

IA

O

iV

i

i

O

O

i

Oi

Rec101 unit ii (part 2) bjt biasing and re model

Engineering

Transcript of Rec101 unit ii (part 2) bjt biasing and re model