Early Effect & BJT Biasing - Penn Engineeringese319/Lecture_Notes/Lec_4...Early Effect & BJT Biasing...

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ESE319 Introduction to Microelectronics 1 2009 Kenneth R. Laker, update 14Sep11 KRL Early Effect & BJT Biasing Early Effect DC BJT Behavior DC Biasing the BJT

Transcript of Early Effect & BJT Biasing - Penn Engineeringese319/Lecture_Notes/Lec_4...Early Effect & BJT Biasing...

  • ESE319 Introduction to Microelectronics

    12009 Kenneth R. Laker, update 14Sep11 KRL

    Early Effect & BJT Biasing● Early Effect● DC BJT Behavior● DC Biasing the BJT

  • ESE319 Introduction to Microelectronics

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    VBE

    VCE

    IC

    IC

    VCE

    Saturation region

    0

    -VA

    VBE1

    VBE2

    VBE3

    VBE4

    Forward-Active region

    Ideal NPN BJT Transfer Characteristic

    Early Effect

  • ESE319 Introduction to Microelectronics

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    Early Effect - ContinuedCollector voltage has some effect on collector current – it increases slightly with increases in voltage. This phenomenonis called the “Early Effect” and is modeled as a linear increasein total current with increases in vCE:

    iC= I S evBEV T 1 vCEV A

    VA is called the Early voltage and ranges from about 50 Vto 100 V.

    NMOS transistorn=

    1V A

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    42009 Kenneth R. Laker, update 14Sep11 KRL

    Early Effect - Continued

    -VAVCE

    VBE = ...

    VBE = ...

    VBE = ...

    VBE = ...IC

    VCEVBE

    IC

    Saturation region

    Fwd-Active region

    15 V ≤ VA ≤ 150 V

    Observed by James Early from BTL

    slope=1/ ro

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    Early Effect - Continued

    iC= I S evBEV T 1 vCEV A Total (bias+signal) quantities:

    iC= I C vBE=V BE vCE=V CE

    I C= I S eV BEV T 1V CEV A = I C' 1V CEV A

    Consider dc (bias) condition (signal = 0):

    Let's call the idealized collector bias current I'C:

    I C' = I S e

    V BEV T

    iC= I Cic vBE=V BEvbe vCE=V CEvce

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    We shall define: ro=V AI C

    '

    I C= I C'

    V CEro

    I C= I C' 1V CEV A = I C' V CEV A

    I C'

    Rearranging slightly:

    Early Effect - Continued

    The dc current due to both emitter and collector voltages is:

    MOS transistor

    ro=V AI DI C

    ' = I S eV BEV T

    I D=12

    k n' W

    LV GS−V t

    2

    => ro = f(V

    BE)

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    Although the bias current including the Early effect is bettermodeled as:

    iC=iC'

    vCEro

    We – almost always – will ignore the second term above in hand calculations and use our ideal expression for the bias current:

    iC≈iC' =I S e

    vBEV T

    Early Effect - Continued

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    The Early term adds ro to the large signal model:

    Early Effect - Continued

    IC

    IC' = I S e

    vBE /V T

    VCEVBE VCEro

    V CE= I C−I C' ro

    I C=I C'

    V CEro

    VBEro

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    For typical operating conditions:V A≈50−100 V.

    I C' ≈1mA.

    ro=V AI C

    ' ≈100 V10−3 A

    =100 k

    We usually can ignore ro since, in practice, ro is in parallel with other resistors, which are much smaller than . For the time being, you will be specifically told if you must include ro in your circuit analyses and designs.

    Early Effect - Continued

    100 k

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    102009 Kenneth R. Laker, update 14Sep11 KRL

    Early Effect Scilab SimulationVA=100;VCE=0.01:0.01:12; //array 0.01 to 12 in .01 V. stepsfor ICprime = 2:2:10 //mA. ICp = ICprime*sign(vCE); //ICp value for each VCE one plot(VCE,ICp); //Current in mA. ro=VA/ICprime;//Add bias Early effect IC=ICp+vCE/ro; plot(VCE,IC)end//Plot load line for 1 KOhm Rc - 12V VccRc=1000;Gc=1/Rc;VCC=12;VCLL = 0:0.01:12;ILoLin=Gc*VCC-Gc*VCLL;plot(VCLL,ILoLin)

    I LoLin=I C

    V CLL=V CE

    I C=1

    RCV CC−V CE

    c

    Dictated by circuit

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    Simulation Results

    I C=1

    RCV CC−V CE

    ro = ∞ro ≠ ∞

    slope = -1/R

    C

    IC (mA)

    VCE

    (V)

    12

    10

    8

    6

    4

    2

    00 2 4 6 8 10 12

    Early Effect

    load-line

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    Active Mode Conditions

    Base-emitter diode forward-biased:

    Base-collector diode reverse-biased:

    V BE≥0.7 V

    V BC=V BE−V CE≤0.5V

    −V CE≤0.5−V BE⇒V CE≥0.2V

    V CE≥0.2V

    Forward-Active (ideal cond.)

    VBE

    > 0V

    BC < 0

    iE = i

    C + i

    B

    vCE

    = vCB

    + vBE

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    Amplifier Biasing GoalsWe wish to set a stable value of IC so that we can apply asignal voltage or signal current to the emitter-base circuit andobtain an amplified (undistorted) version of the signal betweenthe collector and ground.

    The transistor cannot saturate during operation, i.e.

    vCE0.2V.

    And it cannot cut off during operation, i.e.iC0 mA.

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    Amplifier DC Bias Problem

    iC= I CicvBE=V BEvbevCE=V CEvce

    TimevI = v

    BE

    vO = v

    CE

    RC

    VCC

    iC

    vO

    VCE

    VCC

    0

    Time

    vi = v

    be

    VBE

    Timev

    o = v

    ce

    VCEsat

    = 0.2 V

    vI

    0.5 1.51.0

    Q

    cutoff saturation

    fwdactive

    slope = Av

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    Amplifier Action ● Base current source: ● A small ac change in base current

    results in a large ac collector current ( ).

    ● This yields a large change in the ac collector voltage v

    ce.

    ● Base voltage source:● A small ac change in base voltage

    results in a large change in the ac collector current (ic = IS exp(vbe/VT)).

    ● This yields a large change in the ac collector v

    ce voltage.

    ib

    vC

    iC

    iB

    Source vBE

    VCC

    RC

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    Voltage Source Input With Collector Load

    Solution of the simultaneousequations exists where the twocurves: the exponential (iC,vBE) andthe straight line (iC,vCE) intersect:

    iC= I S evBEV T

    iC=V CC−vCE

    RC

    V CC−vCERC

    =I S evBEV T

    Load Line

    BJT

    Circuit

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    Scilab Plot of NPN Characteristic //Calculate and plot npn BJT collector//characteristic using active mode modelVT=0.025;VTinv=1/VsubT;IsubS=1E-14;vCE=0:0.01:10;for vBE=0.58:0.01:0.63 iC=IsubS*exp(VTinv*vBE); plot(vCE,1000*iC); //Current in mA.endVCC=10;Rc=10000;vLoad=0:0.01:10;iLoad=(VCC-vLoad)/Rc;plot(vLoad,1000*iLoad);

  • ESE319 Introduction to Microelectronics

    182009 Kenneth R. Laker, update 14Sep11 KRL

    NPN Transistor Load Line

    Vce (V.)

    Ic (mA.)

    0 1 2 3 4 5 6 7 8 9 100.0

    0.1

    0.2

    0.3

    0.4

    0.5

    0.6

    0.7

    0.8

    0.9

    1.0

    Plot Outputv BE=0.63V.

    v BE=0.62V.

    v BE=0.60V.

    Load Line

    iC=V CC−vCE

    RCV CC=10VRC=10k

    vBE=0.04V

    vCE≈7V

    iC (mA)

    vCE

    (V)

  • ESE319 Introduction to Microelectronics

    192009 Kenneth R. Laker, update 14Sep11 KRL

    Amplifier ActionNote that as vBE varies from about 0.59 V to 0.63 V, vC varies from about 1 V to 8 V! A 0.04 V peak-to-peak swing of vBE results in an 7 V peak-to-peak swing in vCE - a voltage-gain ratio of 7/0.04, or about 175. The output magnitude is about 175 times the input mag-nitude, for a gain of 175.The input signal has two components: a dc one called the bias voltage, and an ac one called the (small) signal voltage. For proper operation, let:

    V BIAS=V BE MAX V BE MIN /2=0.61VvSIGNAL=V BE MAX −V BE MIN /2=0.02V peak

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    Candidate Bias Configurations

    Base voltagesource

    Base currentsource

    Emitter currentsource

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    Drive Base With a Base Current Source

    Assume: =100

    I C= I B=100⋅5⋅10−6

    I C=0.5 mA.

    For this collector current:

    V CE=V CC−RC I C

    V CE=10−104⋅0.5⋅10−3=5 V

    The transistor is almost right in thecenter of the desired operatingregion!

    VCE

    IC R

    c = 10 kΩ

    VCC

    = 10 VI

    B

    I = 5 µAQ1

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    Current Bias Beta DependenceUnfortunately, β is often poorly controlled and may easilyvary from 100 to 200. And beta is also temperature dependent!

    I C=100⋅5⋅10−6=0.5 mA.

    For β = 100:

    The BJT with a VCE = 5 V

    For β = 200:I C=200⋅10⋅5

    −6=1.0 mA.

    The BJT is saturated!

    Base current source biasing → BIAS POINT IS UNSTABLE.

    V CE=10−104⋅0.5⋅10−3=5V V CE=10−10

    4⋅1⋅10−3=0 VV CE=V CC−RC I C

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    232009 Kenneth R. Laker, update 14Sep11 KRL

    Drive Base with a Base Voltage Source

    For an IC of 0.5 mA:

    V BE=V T ln I CI S

    Given: I S=10−14 A

    I C=0.5⋅10−3 Aand:

    V BE=0.025 ln 0.5⋅1011

    V BE=0.025⋅24.635=0.616 V

    OK. Apply 0.616 volts to thebase and we have the desired collector current!

    Since VCE

    = 5 V the transistor is nearly at the center of the desired operating region!I C= I S e

    V BEV T

    VCC

    = 10 V

    Rc = 10 kΩ

    VBE

    = 0.616 V

    Q1

  • ESE319 Introduction to Microelectronics

    242009 Kenneth R. Laker, update 14Sep11 KRL

    Voltage Bias IS and VCE DependenceUnfortunately, IS is highly temperature-dependent, doublingfor a 5oC increase in temperature. If the base-emitter voltage is chosen to give 0.5 mA collector current at 20oC (68oF), it will double at 25oC and halve at 15oC.IC is also highly sensitive to VBE. Consider two values of collector current, IC and 10IC:

    10 I CI C

    =I S e

    V BE10V T

    I S eV BE1V T

    V BE10−V BE1=V T ln 10

    V BE10−V BE1=0.025⋅2.3025=0.058V.

    Less than a 60 mV change in VBE voltage increases IC by anorder of magnitude (10X). BIAS POINT IS UNSTABLE.

  • ESE319 Introduction to Microelectronics

    252009 Kenneth R. Laker, update 14Sep11 KRL

    Emitter Current SourceThis holds collector current close to its desired value since:

    I C= I EChanges in I

    C for α in the range determined by the extremes

    of β are negligible

    100200⇒ 100101

    200201

    There is considerable variation in base current, however, but this is usually of no consequence.

    I B=I E

    1⇒

    I E51

    I BI E

    201

    =

    1

  • ESE319 Introduction to Microelectronics

    262009 Kenneth R. Laker, update 14Sep11 KRL

    ConclusionBiasing a BJT poses potential large bias stability prob-lems, since its characteristics are highly sensitive to temperature and since its electrical properties (princip-ally β) can vary widely from one device to another!

    The next lecture sequence will cover some techniques for stabilizing the BJT bias.

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