Electrical Power and Energy Systems 58 (2014) 319–328

Contents lists available at ScienceDirect

Electrical Power and Energy Systems

journal homepage: www.elsevier .com/locate / i jepes

Enhanced PLL based SRF control method for UPQC with fault protectionunder unbalanced load conditions

http://dx.doi.org/10.1016/j.ijepes.2014.01.0390142-0615/� 2014 Elsevier Ltd. All rights reserved.

⇑ Corresponding author. Tel.: +91 9443677164.E-mail addresses: jeraldrovan@gmail.com, jerald_robin@yahoo.co.in (A. Jeraldine

Viji), t.aruldoss@gmail.com (T. Aruldoss Albert Victoire).1 Tel.: +91 9944350279.

A. Jeraldine Viji a,⇑, T. Aruldoss Albert Victoire b,1

a Mailam Engg College, Research Scholar, Jntuk, Indiab Anna University Regional Centre, Coimbatore, India

a r t i c l e i n f o a b s t r a c t

Article history:Received 27 September 2012Received in revised form 30 November 2013Accepted 2 January 2014

Keywords:UPQCEPLLModulated hysteresis current controllerPower quality

This paper presents novel control strategy of a three-phase four-wire unified power quality conditioner(UPQC). It is used to improve power quality in distribution system. The UPQC is realized by the integra-tion of series and parallel active power filter (SAPF and PAPF) sharing a common dc bus capacitor. Therealization of parallel APF and series APF are carried out using a three-phase, three legs voltage sourceinverter (VSI) with split capacitor. In both APFs the fundamental source voltages and currents areextracted by synchronous reference frame technique. SAPF connected with the supply by series trans-former. The secondary of series transformer is affected by load side short circuits. This paper also explainsthe control circuit for protection of series transformer against over voltage and over current. PAPF con-nected with the system by series inductance. The performance of the applied control algorithm of shuntactive filter with series active filter is evaluated in terms of power-factor correction, load balancing, andmitigation of voltage and current harmonics in a three-phase four-wire distribution system for non-linearload, unbalanced supply and load conditions . Sinusoidal PWM current controller, modulated hysteresiscurrent controller are used for generation of switching pulses to series and parallel APFs. The two controlalgorithm is simulated by use of MATLAB/Simulink-based environment and the obtained results vali-dated through experimental study with the UPQC hardware prototype.

� 2014 Elsevier Ltd. All rights reserved.

1. Introduction

The modern power distribution system is becoming highly vul-nerable to the different power quality problems [1,2]. The exten-sive use of non-linear loads is further contributing to increasedcurrent and voltage harmonics issues. Unified power qualitycontrol was widely studied by many researchers as an eventualmethod to improve power quality of electrical distribution system[1,3].

The function of unified power quality conditioner is to compen-sate supply voltage flicker/imbalance, reactive power, negative-sequence current, and harmonics. In other words, the UPQC hasthe capability of improving power quality at the point of installa-tion (PCC) on power distribution systems or industrial powersystems. Therefore, the UPQC is expected to be one of the mostpowerful solutions to large capacity loads sensitive to supply

voltage flicker/imbalance [4]. The UPQC consisting of the combina-tion of a series (APF) and parallel APF shared by common dc volt-age. UPQC can also compensate the voltage interruption if it hassome energy storage or battery in the dc link [4]. The parallelAPF is usually connected across the loads to compensate for allcurrent-related problems such as the reactive power compensa-tion, power factor improvement, current harmonic compensation,and load unbalance compensation [5] whereas the series APF isconnected in a series with the line through series transformers. Itacts as controlled voltage source and can compensate all voltagerelated problems, such as voltage harmonics, voltage sag, voltageswell, and flicker. Several papers studied and compared the perfor-mances of filter with different reference current generation tech-nique. Generally the reference signal generation technique isclassified in to two major classifications that are frequency domainmethod and time domain method. In this frequency domain meth-od, Fourier transform, DFT, FFT, RDFT are used for extractingharmonic component from polluted voltage and current signals.There are many types available in time domain method such asP-q theory, Instantaneous reactive power theory, Synchronousreference frame theory, P-q-r theory, Instantaneous active and

320 A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328

reactive current component theory, Adaptive notch filter, Im-proved active and reactive current component theory [5–8]. Com-pare to Instantaneous active reactive compensation methodenhanced PLL with SRF method the transformation angle is not dis-torted under unbalanced source condition. Therefore, EnhancedPLL SRF technique is used for both voltage and current referencegenerations. Sinusoidal PWM current controller used in series ac-tive filter and hysteresis current controller is used in parallel activefilter for gate pulse generations. When a load side short circuit oc-curs, the voltage across on the load is nearer to zero, and all thesupply voltage being distributed between the series couplingtransformer and the impedance of the supply system. Compareto impedance introduced by the series compensator, the supplysystem impedance is small, so it introduces higher supply voltagedrops across the primary of the series transformer. The rated volt-age of the series transformer primary winding would not be great-er than 50% of the supply nominal voltage. Therefore a protectioncircuit is the way to protect the series transformer under over volt-age and over current. A protection circuit is connected across thesecondary of series transformer which consists of two anti parallelTraics and zener diode. It protects secondary of series transformerunder short circuit condition at the load side. The proposed controltechniques have been evaluated and tested under non linear andunbalanced load conditions using MATLAB/Simulink software andalso experiment.

2. Derivation of reference signals

The UPQC consists of two voltage source inverters connectedback to back with each other sharing a common dc link. The mainaim of the series APF is harmonic isolation between load and sup-ply; it has the capability of voltage flicker/imbalance compensationas well as voltage regulation and harmonic compensation at theutility-consumer point of common coupling (PCC) [9]. The parallelAPF is used to absorb current harmonics, compensate for reactivepower and negative-sequence current, and regulate the dc linkvoltage between both APFs. The general UPQC block diagram isshown in Fig. 2.1.

2.1. Reference voltage signal generation for series APF

The function of the series APF is to compensate the voltage dis-turbance in the source side, which is due to the fault in the distri-bution line at the PCC. The series APF control algorithm calculatesthe reference value to be injected by the series transformers, com-paring the positive-sequence component of source voltage withthe load side line voltages [10–14] If there is any sag or swell pres-ent in the source voltage, the detection block generates the refer-ence peak amplitude by root mean square method, the errorvector obtained is used for finding symmetry of sag with their

Fig. 2.1. UPQC block diagram.

phase difference. The supply voltage is used to find the voltagesag, and load voltage is used to feedback the output voltage inorder to minimize steady state error in the fundamental compo-nent [20–22,26]. The injected voltage generated by the series APFaccording to the difference between reference load voltage andsupply voltage and it is applied to PI controller but this voltagehas some harmonics because of unbalanced load connected inthe load side. The harmonics are eliminated by applying compo-nent into LPF and q components make into zero. In Eqs. (1) and(2) supply and load voltages vsa and vla are transformed to rotatingreference frame co-ordinates (d-q-l).

Vs0

Vsd

Vsq

264

375¼ ffiffiffiffiffiffiffiffi

2=3p 1ffiffi

2p 1ffiffi

2p 1ffiffi

2p

sinðxtÞ sinðxt�2p3Þ sinðxtþ2p

3ÞcosðxtÞ cosðxt�2p

3Þ cosðxtþ2p3Þ

264

375

Vsa

Vsb

Vsc

264

375 ð1Þ

Vl0

Vld

Vlq

264

375¼ ffiffiffiffiffiffiffiffi

2=3p 1ffiffi

2p 1ffiffi

2p 1ffiffi

2p

sinðxtÞ sinðxt�2p3Þ sinðxtþ2p

3ÞcosðxtÞ cosðxt�2p

3Þ cosðxtþ2p3Þ

264

375

Vla

Vlb

Vlc

264

375 ð2Þ

h ¼ h0 �Z t

0xtdt ð3Þ

jVsdj ¼ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiv2

d þ v2q

qð4Þ

The voltage in d axes (vsd) given in (5) consists of average and

oscillating components of source voltages Vsd;gVsd. The averagevoltage vsd is calculated by using second order LPF (low pass filter).

vsd ¼ VsdþgVsd ð5Þ

vsq ¼ VsqþgVsq ð6Þ

The oscillating components of vsd, vsq having harmonics andnegative sequence components under unbalanced load condition.The load side reference voltages v�labc are calculated as given inEq. (7). The switching signals are assessed by comparing referencevoltages v�labc and the load voltages vlabc via PWM controller.

V�La

V�Lb

VLc

264

375 ¼ ffiffiffiffiffiffiffiffi

2=3p 1ffiffi

2p sinðxtÞ cosðxtÞ1ffiffi2p sinðxt � 2 p

3Þ cosðxt � 2 p3Þ

1ffiffi2p sinðxt þ 2 p

3Þ cosðxt þ 2 p3Þ

2664

3775

V0

Vsd

0

264

375 ð7Þ

The three-phase load reference voltages are compared with loadline voltages and the errors are then processed by PWM controllerto generate the required switching signals for series APF IGBTswitches.

2.2. Control circuit for protection of series transformer

A protection scheme against the load side short circuits hasbeen derived and implemented in the UPQC proto type. The majorprotection complication for this series inverter is that currentflows in the primary side of the injection transformer as long asthe system load or fault current exists. If the secondary of seriesinjection transformer is open to compensate over current, it cre-ates unbalanced magneto motive force (MMF), which will overmagnetize the transformer core and generate substantial second-ary-side voltages. Even if the VSI is disabled, VSI acts as a dioderectifier and the dc-bus voltage will quickly charge up beyondthe voltage rating of the power stage. This will happen within amillisecond that is it can occur within one fundamental cycle evenunder normal load current conditions. Hence, an effective protec-tion scheme must at all times provide a continuous secondarycurrent path, and divert this current to appropriately rated

A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328 321

elements depending on the level and duration of current tobe passed [10]. In order to protect the series inverter fromovervoltage and over current, it is proposed to accomplish thisshort circuiting by using a pair of anti parallel connected thyris-tors with a pair of zener diode. The proposed protection schemeis shown in Fig. 2.2.

During load side fault current, the short-circuit current follow-ing from the supply side is diverted to the thyristors of the protec-tion scheme. However, since the series VSI remains in operation, alarge current will flow through it, which comes from the DC side. Inorder to interrupt the path for this current, the series VSI switchesmust be disabled [23,24]. Thus, as soon as the secondary of the ser-ies transformer is short-circuited by the protection scheme, thegate signals of the series VSI have to be disabled in a reasonablyshort time and also in order to prevent the short circuit of loadbeing fed from dc side the parallel APF gate signal must be dis-abled. An over current indicator is placed in the phase of the seriesAPF [10], it works when current flow in the series APF greater thanthreshold value of indicator, it disable the gating control of twoAPFs, and enable the protection schemes. A primary bypass breakeris placed in the primary side to give protection to primary wind-ings [25]. The reference voltage and current generation is ex-plained in diagram Fig. 2.4.

2.3. Reference current signal generation for parallel APF

2.3.1. Enhanced PLLControl schemes for parallel APF usually use the instantaneous

reactive power theory (pq theory) for reference signals determi-nation. Although this theory presents a very powerful tool, butit requires more number of analog multiplier and dividers etc.For hardware setup, minimization of component is required.The synchronous reference frame (SRF) is best solution for mak-ing hardware [16]. In SRF three phase quantities are convertedinto two phase quantity of dq domain .Advantages of dq controlis easy filtration, since the 50 Hz components are transferred intodc quantities and all harmonic components are ac quantities. Butconventional SRF method transformation angle is oscillated underdistorted supply voltage condition. For this problem enhanced PLLtechnique is used. In this compensation strategy, the distortedcurrents are first transferred into two quantity synchronous rotat-ing frames using cosine and sinus functions from the phase-locked loop (PLL). This PLL helps to maintain the synchronizationwith supply voltage and current. Similar to the p-q theory, usingfilters, the harmonics and fundamental components are separatedeasily and transferred back to the a-b-c frame as reference signalsfor the filter. In nonlinear load conditions, harmonics and reactive

Fig. 2.2. Protection circuit for series transformer.

currents of the load are determined by PLL algorithms. Theangular position of the supply voltage vector shown by xt ofthe PLL. In 3P4W nonlinear power systems, the id and iq compo-nents of the current decompose into oscillating components andaverage components. The oscillating component indicatingharmonic and average component indicates active and reactivecurrents. Conventional PLL circuit has low performance for highlydistorted and unbalanced system voltages. The enhanced PLL dia-gram is shown in Fig. 2.3. In enhanced PLL the measured linevoltages are multiplied by feedback currents with unity ampli-tude, and one of them leads other by 120�. The reference funda-mental angular frequency (x0 = 2pf) is added to the output of thePI controller to stabilize the output. The exact transformation an-gle (xt) is obtained by output of the integral after the PI control-ler, but the produced xt lead by 90� with x0; therefore, the �p/2is added to the output of the integrator in order to reach systemfundamental frequency. This EPLL circuit arrives at a stable oper-ating point when three phase instantaneous active power (p3ax)becomes zero.

The proposed EPLL and SRF-based shunt APF reference source-current signal-generation algorithm uses only source voltages,source currents, and dc-link voltages. The enhanced PLL circuit isdesigned to operate properly under distorted and unbalanced volt-age waveforms.

2.3.2. Reference current generationThe parallel APF described in this paper is used to compensate

the current harmonics, reactive power generated by the nonlinearload. The source currents are transformed to d-q-0 coordinates, asgiven in (6) and using xt which coming from the EPLL. In 3P4Wsystems under with nonlinear load conditions, the instantaneoussource currents (isd and isq) include both oscillating components

(fisd and (fisq ) and average components ( �isd and �isq). The oscillatingcomponents consist of the harmonic and negative-sequence com-ponents of the source currents. The average components consistof the positive-sequence components of current and reactive cur-rent. The proposed SRF-based method employs the positive-se-quence average component ( �isd) in the d-axis and assigned 0value to zero- and negative-sequence components, in order tocompensate harmonics and unbalances in the load.

is0

isd

isq

264

375 ¼ 2=3

12

12

12

sinðxtÞ sinðxt � 2 p3Þ sinðxt þ 2 p

3ÞcosðxtÞ cosðxt � 2 p

3Þ cosðxt þ 2 p3Þ

264

375

isa

isb

isc

264

375 ð8Þ

In order to compensate the active power losses of the UPQC,during the active power is injected to the power system by theseries APF, which causes dc-link voltage reduction, in parallelAPF, the active power is absorbed from the power system for

Fig. 2.3. Enhanced PLL.

Fig. 2.4. Reference voltage, current generation.

322 A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328

regulating dc-link voltage. Due to absorption and injection of ac-tive power, the dc link voltage is not maintained constant for thispurpose, the dc-link voltage is compared with its reference voltage(vdc), and the required active current (idloss) is obtained by a PIDcontroller. The PID controller is used to control the dc side capac-itor voltage of the PWM-inverter. The PID controller is a linearcombination of the P, I and D controller. Its transfer function canbe represented as:

HðSÞ ¼ kp þki

sþ kdðSÞ ð9Þ

where kp is the proportional constant that determines the dy-namic response of the DC-bus voltage control, kI is the integrationconstant that determines it is settling time and kd represents thederivative of the error. The controller is tuned with proper gainparameters of [kp = 0.7, kI = 23, kd = 0.01]. These values are ob-tained by tuning rules based on improved Ziegler–Nichols meth-od. The PID controller estimates the required active current [15].The source current fundamental reference component is calcu-lated by adding to the required active current and source currentaverage component (isd), which is obtained by an LPF, as given inEq. (8).

isdr ef ¼ idloss þ lsd ð10Þ

The source current references are calculated as given in (9) tocompensate the harmonics, neutral current, unbalance, and reac-tive power by regulating the dc-link voltage.

isa ref

isb ref

isc ref

264

375 ¼ T�1

0lsd

0

264

375 ð11Þ

In hysteresis current control method reference source currents(isa_ref, isb_ref, and isc_ref) and measured source currents (isa, isb, andisc) are compared for generating IGBT switching signals to compen-sate all current-related problems. The reference voltage and cur-rent generation diagram is shown in Fig. 2.4.

3. Current control scheme of UPQC

The control scheme of UPQC includes reference voltage and cur-rent extraction control strategy for both filters and generation ofgate pulse for PWM VSI. The generation of reference current,voltage technique is explained in previous sections. The gatepulse generations of both filters are explained in the followingsections.

Fig. 3.1. Current control technique for series APF.

Fig. 3.2. Modulated hysteresis current control technique for parallel APF.

A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328 323

3.1. Series active filter

The Higher order harmonic content in the supply line side is re-duced by carrier based sinusoidal PWM technique. In this modula-tion technique a sinusoidal signal is compared with carrier(triangular) waveform. The width of each pulse is calculated bythe amplitude of sine wave at that moment. The peak value of out-put voltage can be controlled by varying the pulse width. ThisPWM controller imposes constant switching frequency of the IGBTswitches. It forces the input PWM voltages of inverter to track theirreference values. The reference voltage is compared with the actual

Fig. 4.1. Phase (A) hare w

voltage acquired from the load and then the error signal is passedto the sinusoidal PWM controller, the PWM controller producespulses to the IGBT gates. A closed loop feedback can ensure thedynamical changes in voltage variation [8,9]. Fig. 3.1 shows thecontrol block diagram of series APF.

3.2. Parallel active filter

Linear current controller with pulse width modulation tech-nique having constant switching frequency but its dynamic prop-erty is limited. Compared with other controllers, non-linearbased on hysteresis strategies allows faster dynamic responseand better robustness with respect to the variation of the non-lin-ear load [8–10]. Nevertheless, with non-linear current controllers,the switching frequency is not constant and this technique gener-ates a large side harmonics band around the switching frequency.In literature, number of solution is available to fix switching fre-quency; one among them is using a variable hysteresis bandwidth.But this variable band hysteresis controller needs the knowledge ofsystem model and its parameter; this implies difficulty in makinghardware implementation. Here, we implemented a non linearcurrent controller, i.e. modulated hysteresis current controller[16,17]. In this method the carrier frequency is chosen which isequal to the desired switching frequency for the voltage source in-verter. The resulting signal (H) constitutes then the new referenceof a classical hysteresis controller with a bandwidth of 2Bh. Theoutputs of the hysteresis block are the switching pattern to thevoltage source inverter. Fig. 3.2 shows the block diagram of hyster-esis current controller. To control the active filter at fixed switchingfrequency, the triangular carrier signal of amplitude Atr is com-bined with hysteresis bandwidth Bh [18,19].

4. Simulation and experimental results and analysis

The proposed UPQC system with series transformer protectioncircuit compensates the current harmonics produced by a diode

are model of UPQC.

Fig. 4.1d. Load current (UPQC OFF).

Fig. 4.1e. Source side neutral current (UPQC OFF).

324 A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328

bridge rectifier, and eliminates the voltage harmonics, and alsoprotect the series transformer under load side short circuit condi-tion. The experimental prototype in the 3P4W UPQC system con-sists of two voltage controlled inverters (shunt and series APFs)sharing the same dc bus in split-capacitor topology. The seriesAPF is connected in series with the supply via a ripple RC filter,RT and CT, and a matching Series transformer. The dc links of bothshunt and series APFs are connected to two common series 2200-lF dc capacitors under 700-V dc in split capacitor topology. Athree-phase and a single-phase diode bridge rectifier are used asnonlinear loads and the effect of change in load current is recordedfor each phase. The control algorithm for the UPQC is evaluated byMATLAB/Simulink software. The system is investigated underunbalanced load conditions. The control unit of hardware setupconsists of an ATMEL 89S52 microcontroller along with the drivercircuit. The driver circuit performs the PWM method to performswitching operation and the pulses are fed to the microcontroller.The microcontroller receives both the switching pulses, the signalfrom the VI detector and the PLL signal. It coordinates and providesthe switching pulses appropriately to the active power filters. TheATMEL 89S52 microprocessor is fed with the program with thehelp of the KEIL software. The circuit diagram of the UPQC hard-ware kit is shown Fig. 4.1. The system parameters used are; lineto line source voltage Vrms is 380 V; system frequency (f) is50 Hz; source inductance is LS is 1 mH; series side Filter impedanceof Rc1, Lc1, Cc1 is 100 X, 1 lH, 60 lF; shunt side Filter impedance ofRc2, Lc2, Cc2 is 5 X, 3.5 mH, 10 lF; three phase diode rectifier RL, LL

Fig. 4.1a. Source voltage (UPQC OFF).

Fig. 4.1b. Source current (UPQC OFF).

Fig. 4.1c. Load voltage (UPQC OFF).

Fig. 4.1f. Load side neutral current (UPQC OFF).

Fig. 4.2a. Source voltage (UPQC ON).

Fig. 4.2b. Source current (UPQC ON).

Fig. 4.2c. Load voltage (UPQC ON).

Fig. 4.2d. Load current (UPQC ON).

Fig. 4.2e. Compensating current (UPQC ON).

Fig. 4.2f. Source side neutral current (UPQC ON).

Fig. 4.2g. Load side neutral current (UPQC ON).

Fig. 4.2h. Voltage across capacitance (UPQC ON).

Fig. 4.3a. 1.5 KVA proto type UPQC kit.

Fig. 4.3b. Inductive load.

Fig. 4.3c. Experiment result of source current (phase A) without UPQC.

Fig. 4.3d. Experiment result of source side voltage (phase A) without UPQC.

Fig. 4.3e. Experiment result of source voltage with UPQC.

A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328 325

load: 10 X; 30 mH respectively; unbalanced three phase load resis-tances are R1 = 20 X, R2 = 70 X, R3 = 100 X and load inductance LL

is 50 mH; DC side capacitance is 2200 lF; reference voltage (VDC,ref)is 700 V, switching frequency of series and shunt inverter isapproximately12 KHz. Fig. 4.1 shows the block diagram of hardsetup in phase A.

4.1. UPQC OFF condition

Figs. 4.1a–f show the source voltage, source current, load volt-age, load current, source side neutral current, load side neutral cur-rent of three phase with bridge rectifier and unbalanced loadcondition. The THD of the source voltage and current is 26.6%and 29.7%.

Fig. 4.3f. Experiment result of source current with UPQC.

Fig. 4.3g. Experiment result of load current with UPQC.

Fig. 4.3h. Experiment result of compensating current with UPQC.

Table 1Simulation, experimental results and thd levels of voltage and current waveforms atthe pcc.

Various parameters (THD) Simulation results Experimental results

UPQCOFF

UPQCON

UPQCOFF

UPQCON

Input source current (Aphase)

28.07 2.25 36.7 4.56

Load side current (A phase) 36.2 13.6 46.2 10.5Input source current (B

phase)28.07 2.45 33.2 4.6

Load side current (B phase) 38.2 15.42 42.2 13.6Input source current (C

phase)28.07 2.50 37.4 4.9

Load side current (C phase) 28.07 2.50 42.5 13.6Input source voltage (A

phase)28.07 2.25 41.07 2.25

Load side voltage (A phase) 36.2 12.6 38.6 4.02Input source voltage (B

phase)28.07 3.0 40.45 12.45

Load side voltage (B phase) 38.2 16.4 38.42 14.2Input source voltage (C

phase)28.07 3.2 4250 3.3

Load side voltage (C phase) 36.07 13.3 49.50 12.50

326 A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328

4.2. UPQC ON condition

Figs. 4.2a–h show the source voltage, source current, load volt-age, load current, compensating current, source side neutral cur-rent, load side neutral current and voltage across capacitance ofthree phase with bridge rectifier and unbalanced load condition.The THD of the source voltage (phase A) and current (phase A) is2.33% and 2.25%. The circuit parameters and experimentalconditions are set up the same as the simulation conditions. Theexperimental set up is shown in diagram Figs. 4.3a–d shows exper-iment result of source current (phase A), source voltage (phase A)without UPQC. Figs. 4.3e–h show experiment result of sourcevoltage, source current, load current, compensating current withUPQC.

The experimental results show that the control objectives aresatisfied. Table 1 explains the comparison of source, load voltagesand currents with simulation, experimental results before andafter UPQC conditions.

5. Conclusion

This paper describes a enhanced PLL based SRF control strategyused in the UPQC, which mainly compensates the reactive poweralong with voltage and current harmonics under unbalancedload-current conditions. Sine PWM current control technique isused for series APF voltage reference and modulated hysteresiscurrent control technique for Parallel APF current reference gener-ation. By the use of EPLL, able to generate reference current underdistorted of load condition. The series APF isolates the loads andsource voltage in unbalanced and distorted load conditions, andthe parallel APF compensates reactive power, neutral current,and harmonics and provides three-phase balanced and rated cur-rents for the mains. A protection circuit is connected across the ser-ies transformer to protect the secondary of series transformerunder load short circuit condition. A bypass breaker is connectedacross the primary of series transformer to protect heavy currentflow thro it under load fault condition. The comparison table showsthe simulation, experimental result of proposed UPQC. Experimen-tal results obtained from a laboratory model of 1.5 kVA, along witha theoretical analysis, are shown to verify the viability and effec-tiveness of the proposed EPLL with SRF-based UPQC controlmethod.

Appendix A

S. No

Components required Configurations

1

Switches in the APF IRF 840 N ChannelMOSFET (8A max, 500 Vmax)

2

Transformer Primary ? 18A (AWG) Secondary ? 21A (AWG)

3

Optocoupler MCT2E (60 V max,500 mA max)

4

For capacitor bank 2200 lF 5 Microcontroller ATMEL 89S52 6 Load inductance Equal to 5 HP motor 7 Step down transformer

for DC input components

230–5 V formicrocontroller units

8

Ammeter 0–5 A, 0–30 A 9 Triac 32 A

A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328 327

Appendix B

References

[1] Sankaran C. Power quality. CRC Press; 2002. p. 202.[2] Walling RA, Saint R, Dugan RC, Burke J, Kojovic LA. Summary of distributed

resources impact on power delivery systems. IEEE Trans Power Deliv2008;23:1636–44.

[3] Akagi H, Fujita H. A new power line conditional for harmonic compensation inpower systems. IEEE Trans Power Deliv 1995;10:1570–5.

[4] Fujita H, Akagi H. The unified power quality conditioner: the integration ofseries and shunt-active filters. IEEE Trans Power Electron 1998;13:315–22.

[5] Zaveri T, Bhalija BR, Zaveri N. Load compensation using DSTATCOM in threephase three wire distribution system under various source voltage and deltaconnected load condition. Int J Electron Power Energy Syst 2012;41:34–43.

[6] Zaveri N, Chudasama A. Control strategies for harmonic mitigation and powerfactor correction using shunt active filter under various source voltageconditions. Int J Electron Power Energy Syst 2012;42:661–71.

[7] Ketabi Abbas, Farshadnia Mohammad, Malekpour Majid, Feuillet Rene. A newcontrol strategy for active power line conditioner (APLC) using adaptive notchfilter. Int J Electron Power Energy Syst 2013;47:31–40.

[8] Akagi H, Watanabe EH, Aredes M. Instantaneous power theory andapplications to power conditioning. Wiley-IEEE Press; April 2007.

[9] Zaveri Tejas, Bhalja Bhavesh, Zaveri Naimish. Comparison of control strategiesfor DSTATCOM in three-phase, four-wire distribution system for power qualityimprovement under various source voltage and load conditions. Int J ElectronPower Energy Syst 2012;43:582–94;Han B, Bae B, Kim H, Baek S. Combined operation of unified power-qualityconditioner with distributed generation. IEEE Trans Power Deliv2006;21:330–8.

[10] Aredes M. A combined series and shunt active power filter. In: Proc IEEE/KTHStockholm power tech conf, Stockholm, Sweden; 1995. p. 18–22.

[11] Newman Michael John, Holmes Donald Grahame. An integrated approach forthe protection of series injection inverters. IEEE Trans Ind Appl2002;38:679–87.

[12] Chen Y, Zha X, Wang J. Unified power quality conditioner (UPQC): the theory,modeling and application. In: Proc Power System Technology Power Con IntConf; 2000. p. 1329–33.

[13] Peng FZ, McKeever JW, Adams DJ. A power line conditioner using cascademultilevel inverters for distribution systems. IEEE Trans Ind Appl1998;34:1293–8.

[14] Lee GM, Lee DC, Seok JK. Control of series active power filter compensating forsource voltage unbalance and current harmonics. IEEE Trans Ind Electron2004;51:l32–139.

[15] Esfandiari A, Parniani M, Emadi A, Mokhtari H. Application of the unifiedpower quality conditioner for mitigating electric arc furnace disturbances. Int JPower Energy Syst 2008;28:363–71.

[16] Chaoui Abdelmadjid, Gaubert Jean Paul, Krim Fateh, Champenois Gerard. PIcontrolled three-phase shunt active power filter for power qualityimprovement. Electric Power Compo Syst 2007;35:1331–44.

[17] Khadkikar V, Chandra A. A new control philosophy for a unified power qualityconditioner (UPQC) to coordinate load-reactive power demand between shuntand series inverters. IEEE Trans Power Deliv 2011;23:2522–34.

328 A. Jeraldine Viji, T. Aruldoss Albert Victoire / Electrical Power and Energy Systems 58 (2014) 319–328

[18] Santos Filho RM, Seixas PF, Cortizo PC, Torres LAB, Souza AF. Comparison ofthree single-phase PLL algorithms for UPS applications. IEEE Trans Ind Electron2008;55:2923–32.

[19] Espi Huerta JM, Castello J, Fischer JR, Garcia-Gil R. A synchronous referenceframe robust predictive current control for three phase grid-connectedinverter. IEEE Trans Ind Electron 2010;57:954–62.

[20] Rodriguez P, Pou J, Bergas J, Candela JI, Burgos RP, Boroyevich D. Decoupleddouble synchronous reference frame PLL for power converters control. IEEETrans Power Electron 2007;22:584–92.

[21] Basu M, Das SP, Dubey GK. Investigation on the performance of UPQC-Q forvoltage sag mitigation and power quality improvement at a critical load point.IET Gener Transm Distrib 2008;2:414–23.

[22] Chatterjee K, Fernandez BG, Dubey GK. An instantaneous reactive volt-amperecompensator and harmonic suppressor system. IEEE Trans Power Electron1999;14:381–92.

[23] Takeshita T, Matsui N. Control of active filters using source current detection.In: Proc 29th Annu Conf IEEE Ind Electron Soc. vol. 2; 2003. p. 1515–20.

[24] Moran L, Pastorini I, Dixon J, Wallace R. A fault protection scheme for seriesactive power filters. IEEE Trans Power Electron 1999;14:928–38.

[25] Dash PK, Pradhan AK, Panda G, Liew AC. Adaptive relay setting for flexible ACtransmission systems (FACTS). IEEE Trans Power Deliv 2000;15:38–43.

[26] Nielsen JG, Newman M, Nielsen F. Control and testing a dynamic voltagerestorer (DVR) at medium voltage level. IEEE Trans Power Electron2004;19:806–13.