SOKUDO Key Note IMEC final - IMEC Presentation (LBF... · Experience the world wherever you are...

PUSHING LITHOGRAPHYTO ENABLE ULTIMATE NANO-ELECTRONICS

LUC VAN DEN HOVEPresident & CEO imec

© imec 2010

OUTLINE

! Industry drivers

! Roadmap extension

! Lithography options

! Innovation through global collaboration

Experience the world wherever you are

Always connected Virtual Social Networks(Facebook, LinkedIn, Twitter, You Tube...)

Computer

ComputerCommunication

Consumer

ConnectedWorld

0

1,000,000

500,000

1,500,000

2,000,000

2008 2009E 2010E 2011E 2012E 2013E

Tota

l mob

ile d

ata

traf

fic (T

etab

yte

per m

onth

)

Data

P2P

Video

Voice

19%

64%

10%

7%

Global mobile data traffic, by type

Video to dominate mobile data traffic

© NVIDIASource: Morgan Stanley

Ubiquitous ConnectivityVideo + Ultimate Graphics

3D

Experience the world wherever you are

Computing

Communication Consumer

Computing

Communication Consumer

LifestyleHealthcare

BUSY LIFESTYLE

1 billion overweight people 300 million of those are obese

AGING POPULATION

600 million persons 60+Expected to double by 2025

RISE IN CHRONIC DISEASES

600 million people worldwide$500 billion a year (US) $685 billion by 2020 (US)

MEDICINE GOES DIGITALPERSONALIZED - PREDICTIVE - PREVENTIVE

Anywhere, anytimeConnected healthHealth and lifestyle

WEARABLE HEALTH AND COMFORT MONITORING

internetdoctorhospital

ECG NECKLACE FOR AMBULATORY APPLICATIONS


BOOSTING CHIP PERFORMANCEAND SYSTEM FUNCTIONALITY

TERAFLOPTERABIT

MORE FUNCTIONALITY

RELENTLESS SCALING

Lithography Enabled Scaling STOP

Geometric(Dennard’s Law) Scale: tox, Lg, xj, ...

1965 2002-2003~ 90 nm

RELENTLESS SCALING

Lithography Enabled Scaling

Geometric(Dennard’s Law) Scale: tox, Lg, xj, ...

Materials Enabled Scaling

1965 2002-2003~ 90 nm

RELENTLESS SCALING

IntelHigh mobility SiGe channel

Metal gateHigh-k

1965 2002-2003~ 90 nm



RELENTLESS SCALING

poly-SiFin

FINFET

Fin

1965 2002-2003~ 90 nm

Strained SiHigh-k

Metal GateMulti Gate



~ 15nm

RELENTLESS SCALING

~ 15nm1965 2002-2003

~ 90 nm



EXTREME HIGH MOBILITY CHANNELS

RELENTLESS SCALING



3D Enabled Scaling

From Plane to Cube

3D STACKED ICs CONNECTED THROUGH TSVs

10um

5um

Bottom tier

Top tier

25um

Cu - Cu bonding

10um

5um

Bottom die

Top die

25um

Cu - Cu bonding

COMPUTE SYSTEMSE.g., Routers, Severs

Performance, Power efficiency,heat dissipation, Reliability

MOBILE SYSTEMSE.g., Netbooks

Cost, Power, Form factor, Performance

CONSUMER

E.g., micro-servers

Power, Cost, Performance,Form factor, ...

HEALTHCAREE.g., sensor nodes

Form-factor, power, bio-compatibility,reliability

3D Integration & advanced packaging

REUSEPERFORMANCE

MODULARITY FORMFACTOR

Memory

Multi-core logic

Photonics

3D STACKED ICs CONNECTED THROUGH TSVs

Optical interconnects

ExploreMarc Heyns !imec 2009

GdAlSiOx

Si3N4

NEW MEMORY CONCEPTS

BiCS (ref. Toshiba)

ExploreMarc Heyns !imec 2009

GdAlSiOx

Si3N4

Cross-bar memory

NEW MEMORY CONCEPTS

GdAlSiOx

LIKELY FLASH ROADMAP

2 bit FG

3 bit FG 4 bit FG1F2

2F2

<1F2

RRAM

3D NAND

2010 2011 2012 2013 2014 >2015

GdAlSiOx

LIKELY DRAM ROADMAP

4x nm6F2

8F2

4F2

5x nm6x nm

2x nm3x nm

1x nmRRAM

2010 2011 2012 2013 2014 >2015

RELENTLESS SCALING



3D Enabled Scaling

Surname + Name ! IMEC restricted 2009 36

Final CD < 10%CD

First exposure

Spacer making

EtchFinal CD < 10% CD

First exposure

Etch

Second exposure

Etch

Litho-Etch-Litho-Etch Spacer defined DP

32nm Lines/32nm Spaces

DOUBLE PATTERNING


SOURCE MASK OPTIMIZATION22NM SRAM PROCESS WINDOW WITH DOUBLE PATTERNING

0!

2!

4!

6!

8!

10!

0 20 40 60 80 100 120 Depth of Focus (nm)

Exp

osur

e La

titud

e (%

)!

MEEF = 4.4

MEEF = 3.0

!48 nm defocus

Best focus best dose

+40 nm defocus

!56 nm defocus

+48 nm defocus Mask

Process window

limiting feature

Contact layer design split

k1=0.384

Freeform illumination

Standard illumination

EUV LITHOGRAPHY

28 nm 30 nm

EUV TOOL OUTPUT

0

500

1000

1500

2000

2500

1 6 11 16 21 26 31 36 41 46 51

# go

od w

afer

s

Weeks

2010 cumulative wafer output

0

500

1000

1500

2000

2500

1 6 11 16 21 26 31 36 41 46 51

Weeks

2009 cumulative wafer output

~ 2200

40

0.089 µm2

0.22µm!

0.406µm!

22nm NODE SRAM PATTERNING WITH EUV

IMEC PARTNER EXPOSURES


Sensitivity

Line

Wid

th

Roug

hnes

s

Acid

Diff

usio

n Le

ngth

= P

ixel

Size

Acid Diffusion Length

Shot Noise Statistics = Photons/

Pixel

Resolution

RESIST MATERIALS


RESIST MATERIALS

SEVR-59

10-02

09-58

10-05

09-4609-45

10-03

10.04

09-48

10-01

LUC VAN DEN HOVE / © IMEC 2010

ML2 LITHO DEVELOPMENT

Meeting the 3 key targets (resolution, overlay, throughput) for direct write on Si is extremely challenging! Targets are rapidly moving according to Moore’s law. Missing the targeted

insertion node can have major impact on the ROI

Focusing on mask writing as intermediate milestone! Reduces the risk: any throughput improvement is welcome

Both 193nm and EUVL can use this

45

© imec 2010

OUTLINE

! Industry drivers

! Roadmap extension

! Lithography options

! Innovation through global collaboration

© imec 2010

BRINGING TOGETHER FULL ECO SYSTEM

Foundries

FablessFablite

Logic IDMMemory IDM

System

SuppliersEquipmentSuppliers

MaterialSuppliers

EDA SAT

LUC VAN DEN HOVE / © IMEC 2010

CONCLUSIONS

!Nano-electronics will continue to bring innovation into many converging application fields

!Concurrent scaling enabled by • lithography• materials innovations• 3D

!Momentum on EUV has increased tremendously during last year

!Global collaboration (including entire value chain) is required to address the huge R&D challenges

ASPIREINVENT

ACHIEVE

SOKUDO Key Note IMEC final - IMEC Presentation (LBF... · Experience the world wherever you are...

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Transcript of SOKUDO Key Note IMEC final - IMEC Presentation (LBF... · Experience the world wherever you are...