SIMULATION MODELING OF WAFER FABRICATION A THESIS IN ...

SIMULATION MODELING OF WAFER

FABRICATION

by

SRILAKSHMI VENKATESH, B.E.

A THESIS

IN

INDUSTRIAL ENGINEERING

Submitted to the Graduate Faculty of Texas Tech University in

Partial Fulfillment of the Requirements for

the Degree of

MASTER OF SCIENCE

IN

INDUSTRIAL ENGINEERING

Approved

Accepted

August, 1986

ACKNOWLEDGEMENTS

I am deeply indebted to Dr. Milton Smith for his

continuing support, guidance, time and patience in helping

see this research effort through to completion. My special

thanks to Dr. Michael Parten for his invaluable support

through all stages of this research. I also wish to thank

my other committee members, Dr. William Marcy and Dr. Eric

Blair for their suggestions. I am grateful to my dear

friends Dr. Aravamudhan 'Dumbo' Soundararajan and Salim

Dastagir for their support and encouragement.

My thanks to Texas Instruments for making this research

possible.

l 1

CONTENTS

ACKNOWLEDGEMENTS

LIST OF TABLES

LIST OF FIGURES

CHAPTER

I • INTRODUCTION

Description of the Process

I I .

Purpose Literature Survey Outline of Succeeding

THE PROPOSED SIMULATION

Problem Definition Assumptions

Chapters

MODEL

Description of the Proposed Model Input/Output Provisions in the Model

III. VALIDATION AND RESULTS

Validation Results of the Simulation Runs

IV. CONCLUSIONS AND RECOMMENDATIONS

Recommendations for Further Research

REFERENCES

APPENDIX

A. PROGRAM LISTING

B. SAMPLE INPUT

... l l l

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lV

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1

2 7 8 9

12

12 18 21 26

39

39 41

54

56

62

63

85

LIST OF TABLES

1. Lots Processed each Month 45

2. Average Cycle Time . Hours (SET I ) 46 1n

3. System Yield and % of Input Lots Processed (SET I) 46

4. System Cycle Time and Yield (SET I I) 47

5. Average Cycle Time of Normal Lots . Hours 1n (SET I I I ) 48

6. Average Cycle Time of Hot Lots 1n Hours (SET I I I ) 49

7. System Cycle Time and Yield (SET IV) 49

lV

LIST OF FIGURES

1. Process Flow Graph (Atherton et al., 1985) 11

2. Schematic showing Hierarchy of Control 28

3. Flowchart showing Processing through the System 29

4. Flowchart showing Processing through a Loop 30

5. Flowchart showing Processing through a Logpoint 31

6. Pseudo-code for the Main Segment 32

7. Pseudo-code of Grouping Subroutine 33

8. Pseudo-code of Unlinking Subroutine 34

9. Pseudo-code of Logout Subroutine 35

10. Flowchart showing Periodic Machine Maintenance 36

11. Flowchart showing Random· Machine Failure 37

12. Flowcharts showing Data Collection and Tabulation 38

13. Graphs for SET I: (a) Average Cycle Time and (b) Yield and % of Input Lots Processed 50

14. Graphs for SET II: (a) System Cycle Time and (b) System Yield 51

15. Graphs for SET III: Average Cycle Time for Normal VS Hot Lots 52

16. Graphs for SET IV: (a) System Cycle Time and (b) System Yield 53

v

CHAPTER I

INTRODUCTION

Integrated circuit (IC) manufacturing is a very precise

and complex procedure, involving a perplexing number of

detailed, often repetitive processing steps. Beginning with

raw cross-sections of the silicon ingots to the final

encapsulated IC chip, it covers a gamut of processing steps

of various types and duration. The fabrication procedure

and the processing steps and their related durations vary

with the type of IC (i.e., part-type) being fabricated. Due '

to the versatility of the machines, each part-type has

alternative routings. Furthermore, rework of defectives at

various stages of production, machine downtime due to

periodic maintenance and random failure, different part-mix

strategies, and express lots, make the system a bewildering

maze of intricate loops.

Owing to the complex nature of the system, the highly

specialized nature of the process, and the proprietorial

nature of the problem, there exist very few studies

conducted in this area in literature today.

It is the intention of this research to develop a

computer simulation model for an existing IC fabrication

process. This model will be capable of studying the effect

of various procedural changes on the system.

1

Description of the Process

Before going any further into the actual modeling of

the system under study a concise outline of a general IC

manufacturing procedure is presented.

IC fabrication is a highly involved and complex

procedure. The fabrication begins with silicon slices that

are lapped and etched to give highly polished surface.

These polished slices are called wafers. The wafers go

through a number of carefully controlled processing steps;

many of these steps may be repeated a number of times.

After going through all this complex processing, each wafer

yields a number of IC chips which are electrically tested

and encapsulated in plastic molds. Figure 1 g1ves an idea

of the comP.lexity of the overall fabrication process. The

numbers on the arrows indicate the processing sequence,

while the numbers in the circles indicate the process type.

Notice the repetitive nature of the fabrication mentioned

earlier.

Typically, the processing steps fall into one of the

following categories: Starting material processes;

Deposition and growth processes; Imaging processes; and

Etching-masking operations.

2

In starting-material processes ingots of pure silicon

are grown. Raw sections of the silicon ingots are polished,

lapped, and etched to obtain a high quality surface. At

this point the slices are called wafers. After this the

wafers are typically sent to an oxide growth process for

further processing.

3

Deposition and growth processes, as the name ·implies,

are used to apply various lay~rs of semiconductive material

on the wafer surface. Growing of silicon-dioxide, used

almost universally as the surface for imaging operations, 1n

addition to other uses, is one of the common examples of the

above procedure. Some of the other examples are: Epitaxy

a deposition process used to extend the silicon wafer

surface; Predeposition of dopants before diffusion~ Ion

implantation used for precise placing of dopant ions in the

semiconductive layer; and aluminum metalization for making

ohmic contact with the devices formed on the wafer and the

chip leads. After this, the wafers are usually imaged and

then etched.

Sometimes, before going through the imaging process, a

layer of mask-oxide, usually silicon-dioxide is grown. This

process is called masking. This is done if the current

wafer surface does not promote good resist bonding. After

this, the wafer can be imaged and etched as usual.

The imaging process replicates the various IC pattern

geometries on different wafer surfaces. Imaging is very

4

important. It is used repeatedly at various points in the

fabrication procedure. Careful control and monitoring of

the process and the environment are extremely important.

Wafers are initially chemically and mechanically treated to

remove dust and other contaminations. Later, the wafers are

coated with photoresist and softbaked to remove the solvents

used in the coating step. They are then exposed to transmit

the necessary pattern onto the wafer surface. Exposed

wafers are developed and baked again, if necessary, to

insure proper resist bonding, depending on the wafer

surface. The wafers are then etched to remove

semiconductive material left exposed by the developing

process.

Etching-masking operations selectively remove or add

the deposited or grown layers to the wafer. Undoped and

doped silicon-dioxide, polysilicon, and aluminum etching

are some of the common examples of the etching operation.

Here care must be taken that the etchants do not attack the

pattern forming resist or the mask, if any. Furthermore,

etchant concentration has to be properly controlled to avoid

either too much or too little etching.

The foregoing discussion outlines a very common

sequence of operations in the fabrication procedure. A

number of variations are employed, still maintaining the

overall order of precedence outlined above.

At various points defective wafers are reworked,

although reworks generally yield fewer good dies than

non-reworked wafers. Contaminations, defective patterning,

and improper etching are some of the common causes for

reworks. Contaminations and defects, if left undetected,

will be present in subsequent processing when rework may be

much costlier, or worse still, the damage may be

irreparable. Hence careful control of the process and a

very clean, uncontaminated environment is necessary.

5

One of the most common areas of rework is in the

imaging process because defects in other steps may not be as

easily rectified. Defective resist images will result 1n

the wafer being sent back to the precleaning stage where it

will be stripped of the defective photoresist layer,

cleaned, baked, recoated, and reimaged. Here defects may be

due to any one of the various reasons such as bad resist

bonding, improper image development, extended delays after

exposure, or lack of proper primer prior to resist

application. If defects are left undetected at this stage,

they will show up latter, and by then the wafer may be

beyond salvaging.

Another area of rework is in the etching process. Here

excess1ve etching may cause serious damage resulting in

scrapping the wafer. On the other hand, too little etching

6

may necessitate additional processing by way of rework. The

wafers are etched again to completely remove the defective

layer of semiconductive material. These wafers are then

sent back to the precleaning area for cleaning; the

semiconductive material will be redeposited, and etching

will be done again.

In summary, IC chips are fabricated from raw silicon

ingots which are sliced and polished. The polished slices

are laser scribed with identification numbers. These

polished slices go through a combination of deposition and

growth, imaging, masking, and etching sequence. This

sequence is maintained from the initial laying out of the

circuitry, through doping, aluminum metalization, and the

final deposition of the passivation layer. The scribe lines

and bonding pads are etched in the end before being tested

by automatic wafer probe systems. Here, faulty dies, 0

1. e. ,

the separate chips on the wafer, are identified. The wafers

are separated into individual dies, followed by the good

dies being die and pad bonded for electric contact,

encapsulated in a plastic mold, and hermetically sealed 1n

vacuum.

It should be noted here that in the present study an

existing system is modeled, beginning with the polished

wafers up to the testing phase before being scribed and

diced.

Purpose

IC manufacturing is an exceedingly competitive

industry. Capital involved is very high. Owing to the

complex nature of the problem, there are no analytical

solutions available. A reliable tool that is capable of

predicting the response of the system under a variety of

conditions would be very useful.

7

Briefly, the configuration of the system is as follows:

A number of part-types are fabricated. Each part type goes

through a specified number and sequence of processing steps.

Each processing step can be performed on a number of

~~ifferent machines thus giving the part-types alternative

l routings. Defective parts at various stages in the

. ·fabrication are routed back to be reworked or may be

scrapped. Furthermore, the machines may be out of serv1ce

due to either breakdown or periodic maintenance.

The object of this research is to develop a computer

simulation model for an existing IC manufacturing process.

This model will be capable of evaluating the performance of

the system under a variety of production situations. ---l

Average cycle times, machine utilization, percentage yield, !

and total number of lots processed in a certain period of

time (throughput) are the performance measures to be used

for analysis purposes. Specifically, the model will permit

'

I \

8

the study of the effects of different part-mix strategies,

queue disciplines, rework procedures, periodic machine

maintenance and random failure, and hot lots. j This research lays emphasis on model development rather

than analysis. As mentioned earlier, the intricacies of the

problem preclude an in-depth analysis of the system in all

its facet and would be beyond the scope of a work of this

nature. Also, no attempt will be made to validate under all

conditions. Some experimental simulation runs, to be

discussed later, will be made. The experimental runs will

serve to demonstrate the capability of the model and help

validate the model.

Literature Survey

The complex nature of the problem, as mentioned before,

precludes the use of analytical techniques. These

techniques such as queuing theory and linear programm1ng

make a number of convenient assumptions. Furthermore, they

tend to become excessively cumbersome, and the models become

very large as the number of variables increase: this puts a

limit on level of detail that can incorporated into the

model.

Simulation modeling is a very handy and a feasible

alternative in problems of this nature. It allows any level

9

of detail in the model to facilitate evaluation of various

configurations of the system under study with simple

manipulations. These are some of the advantages of

simulation. Disadvantages include difficulty in validation

and enormity of data required to run such models. This is

especially true in the present case where the problem has

its basis in a highly competitive industry. Also due to the

complexity of the model and the nature of the technique an

enormous amount of computer memory is needed.

A number of other researchers, Atherton et al. (1985),

Dayhoff et al. (1984), and Lohrasbpour et al. (1985), use

simulation. Though the level of detail and structure of the

problem seem to vary, all of them adopt a similar type of

approach. Analysis of the fab area is made using wafer

throughput, inventory levels, and average cycle times at

varying input rates. Atherton (1985) suggests using these

graphs, called signature analysis of the fab area, for

studying the behaviour and making recommendations for

improvements.

Outline of Succeeding Chapters

In chapter II a detailed description of the proposed

simulation model is given, including a discussion on the

input and output of the model. Also included is a

description of the actual system under study and the

10

accompanying assumptions that are made in the proposed

model. Chapter III discusses aspects of validation followed

for the model and results obtained. Chapter IV concludes

with a summary of the research study with recommendations

for future work.

..

.. If

~--------4

"'

.. ..

Figure 1: (Atherton

... .. • •

Process Flow Graph et a1., 1985)

In ....

11

CHAPTER I I

THE PROPOSED SIMULATION MODEL

~his chapter the simulation problem under study is

discussed in depth and_getail) beginning with a description ---·~ -=-

of the actual system. 1 The proposed model will be desc~ibed --~ . .I I - '

~~-1~ .......... "'-. ..k-, J)-, .... ~. 4

completely, along with all the associated,subroutines. The)~;""'-:_·

- ;> ;;.:,_\]~~~£ "~'~ limitations and the assumptions,_ of the proposed model will

. /.' _ _/) ~) _;_)

also be discusse~~J- A complete listing of the program 1s

attached in Appendix A.) Appendix B gives a listing of a

sample input.

Problem Definition -7

Wafers typically are processed in batches of forty .

eight, called lots. Each lot contains two plastic carr1ers,

called cassettes, loaded with twenty four wafers. A lot

always contains only one type of device or part-type; no two

part-types are ever mixed. Also, wafers of different lots

are not intermixed in the same carrier.

Logpoints

Each lot, depending on the part-type, has to go through

a specific sequence of processes before being scribed, diced

and finally encapsulated. Each process has a number of

12

13

smaller processing steps. Each step may use a different

type of machine. Photolithography is, for instance, an

example of a process. Resist coating, exposure,

development, and inspection, in that sequence, represent the

various smaller processing steps. All these steps, each of

which uses a different type of machine, make up the

photolithographic process.

Wafer fabrication consists of a number of processes,

and each process is identified by a logpoint. Each

part-type has a definite sequence of logpoints. The number

of logpoints may vary depending on the part-type.

Furthermore, some of the logpoints may even be similar for

a number of part-types.

Lots are logged in at the appropriate logpQint before

starting a new process. Successfully processed lots are

logged out from the logpoint. Also the reworks, if any, are

restricted within the logpoint until they pass inspection

successfully. This makes controlling a complex wafer

fabrication line much easier. The logpoints serve as points

of inventory control, queuing control, rework supervision,

yield and cycle time calculations. They help in localizing

trouble-spots in case of consistent defective fabrication.

Also all the activities associated with a specific logpoint

fall in the jurisdiction of a single supervisor.

14

The Loop Structure

On a much higher level of control, a number of

logpoints are grouped together to form a loop. Usually, an

initial oxidation process or a photolithography process

marks the start of a new loop and the end of the previous

loop. Like logpoints, the loops help in inventory control,

queuing regulation, yield and cycle time calculations, and

assist in the spotting of troubles. In the system under

study, there are a total of seven loops. Each lot before

being completely processed has to go through all the loops.

The lot qoes not enter the loop unless sufficient space is

available in the loop. Also, the lot does not leave the

loop for the next loop until the processing is complete in

the current loop. On machines where more than one lot is

processed simultaneously, lots from different loops are not

intermixed. The hierarchy of control just described is

schematically represented in Figure 2.

Part Types

A wafer fabrication line normally produces a variety of

res. Each part-type has a different number and sequence of

processes. Some of the processes may not be common to all

part-types. Also, various combinations and percentages of

different part-types are loaded depending on the need and

15

requirements of the sales. All this part-mix strategies

have tremendous impact on the overall balancing and loading

of machines.

Processing

Each part-type goes through a number of processes.

Each process consist of a number of process1ng steps. A

processing step is characterized by a specific period of

processing time. This processing is performed on a specific

machine set. A machine set is a group of identical

'machines. The processing step may be repeated a number of

times before the lot is completely processed. Also, some of

the machines can perform more than one type of process1ng.

All this gives each part-type alternate routes, thus

complicating the problem further.

Rework

At various stages in the fabrication process defective

lots or wafers are routed back to be reworked. As mentioned

earlier, lots to be reworked are restricted within the

logpoint and very rarely leave the logpoint until rework has

been accomplished. Defective and reworkable lots or wafers,

after a preliminary clean up, are routed back to start of

the logpoint for rework. Depending on the process and the

16

machine being used rework may be on a lot by lot, or a wafer

by wafer basis. In case it is on a wafer by wafer basis,

the lot waits until the defective wafers rejoin the lot

after successful rework. On other processes it may be much

more economical and easier to handle if reworking is done on

a lot by lot basis. In some cases, reworks may not be

entirely possible or economical after a certain number of

processes. Furthermore, the percentage of reworks, the

point of reentry, and the rework procedure vary depending on

the process and the part-type.

Machines

The machines are sophisticated, complex, and versatile.

Each machine has a small queuing space; logpoints have

larger queues and space restrictions for controlling queue

buildup. The machines are grouped into sets of identical

machines for convenience. Some machines belong to more than

one machine set by virtue of their versatility. The

machines may process on a lot by lot basis or a wafer by

wafer basis. In any case lots of different loops or of

different part-types are not mixed. Also process

restrictions may impose a limit on waiting time for

gathering sufficient number of lots on machines process1ng

more than one lot at a time.

17

The sophistication of the machines render maintenance

and repair procedures elaborate and it varies greatly from

machine to machine. Hence factors such as mean time between

maintenance (MTBM), mean time to maintain (MTTM), mean time

between failure (MTBF), and mean time to repair (MTTR) vary

among different machines. Maintenance may be based on the

number of lots processed, hours of actual processing time,

hours of real time, or a combination of any of these. All

these factors have a tremendous impact on the downtime of

the machines and hence the overall output of the system.

Hot Lots

Hot lots, sometimes called express lots, are lots

having the highest priority in processing on any machine.

Lots may turn hot if processing has restrictions on the

amount of waiting time or there is an urgent need for the

part-type. Lots may start hot or turn hot midway through

the processing. Hots lots, depending on the level of

hotness, may rarely preempt other lower priority lots

already using a machine. Commonly hot lots are placed at

the front of a queue for processing as soon as the machine

is free. On machines where more than one lot is processed

at a time, hot lots may be processed alone, thus speeding up

the processing.

18

Assumptions

(_!{( As indicated earlier, though every attempt is made to

incorporate all th~eatures of the system under study, a

few convenient assumptionshad to be made and not all -- --------features could be included. In this section_the assumptions

..,..----- --

made will be stated and discussed in detail.

\Assumption 1. The inventory and queuing control of the

lots are at the start of the loops and logpoints. \~ueuing

" space is provided at the beginning of each 1}l,~?~_,~while no

such provision is made at the logpoints. !Also, instead of a -small buffer zone for each machine, a common ~ueuing area is ------ - - -provided for a set of identical machines. ---- No limit is

imposed on the queue length in ei!her case~ ~-- --

Assumption 2. Lots inside the loop are g1ven higher

priority in processing over lots waiting outside.

Furthermore, at places where conflicts arise between lots

from different loops contesting for the same machine, lots

from lower numbered loops have first preference. This

decision may be influenced by the existing management

policies on such matters. The priority ordering may be J

easily changed to any desired sequence. / J--6----___ .

(:ssurnpt ion :_:___ The processing is assumed to be o ort_., J lot

basis through out the system, though in reality~ome of ---machines may operate on a'wafer basis, while others operate -

0 J 19 :}-;v ~

on a lot basis. Actually the model will exactly represent a

wafer by wafer process even though the modeling is by lot;

since lots are never split between two or more machines, the

entire lot retains control of a machine until the last wafer

is completed.

Assumption 4. No variability in the process times are

assumed, and no limit on the waiting time between --consecutive processes are imposed./Although in reality,

·"--

depending on the process, a limit on waiting time may need -to be imposed for reasons like image decay in patterning -after development. These limits usually are relatively long ----and likely will not be violated unless a machine failure

occurs.) -Assumption 5. Rework is assumed only in the

photolithographic process. Also, the rework is strictly

confined within the logpoint area although in the actual

system the lots may seldom leave the logpoint during rework.

During rework, it is assumed only one precleaning process is

needed. Depending on the type of rework this may vary,

requiring additional precleaning processes. Furthermore,

the period of precleaning is considered to be equal to that

of normal processing for that step. Finally, each lot being

reworked is allowed a max1mum number of reworks, after which

it is scrapped. In reality a cost factor is usually

20

associated with each rework; this has not been incorporated

in the model.

I Assumption 6.

processed at a time.

requisite number of

On some machines more than one lot is 1-

Here1the1lots wait to accumulate the '\Jr--.. ~ - . • /, o., ·

1

-A-••ri.-) - -

lots. Depending on the machine and the I --- --

process, a limit on this waiting time may be imposed. In

such cases, the lOts) wait until they accumulate the_ "<:;~; t?i --- --

requisite nurnber"~f~s~or teach the time limit, whichever -- - ~) (occurs first,. On the other hand, on machines and processes

~not specifying a time limit, the lots wait until they

collect the required number of lots. It should be mentioned

here that on these machines hots lots are processed alone.

Assumption 7. All the machines except the furnaces are

assumed to be free from periodic maintenance and random ----failure. The furnaces are maintained on a periodic (every

.....___ ---

twenty four hour day) basis. The maintenance time,

breakdown rate, and repair time, as a first approximation,

are assumed to be uniformly distributed. The maintainance

and repair times are assumed to be as long as the longest

processing on the machine. Furthermore, maintenance begins

only after the lot/s, if any, currently occupying the

machine is/are completely processed. In case of machine

breakdown the lot/s currently being processed, if any,

is/are scrapped immediately. Also, the machine currently

~*-~ ,', -~ o-/~ ,..__/ u /l"~--e.- f ~fL/

~_t_~~ ,·~ _-ri-..A_ ~ (! c , ~

~-'11-'QA_~ f L ~ ('1~'-Jl-'-V•'~ fl'--u1~

21

being maintained is assumed to be free from random failure

for that period of time, and a~chine being repaired at the

time of a scheduled maintenance will no~ be maintained again

until the next scheduled maintenance period.)

Assumption 8. A single level of hot lots is assumed.

Lots turn hot at the beginning of each loop and stay hot

until they are completely processed. In reality, two or

three levels of hot lots commonly occur, and the lots may

turn hot for a variety of reasons such as customer demands

or special part-types. Hot lots are given the highest

priority in processing. To facilitate this hot lots enter

the loops irrespective of whether or not space is available

in the loop. Also, on machines that process more than one

lot at a time, hot lots are processed alone. They do not,

however, preempt other lots already using the machine.

Description of the Proposed Model

A detailed description of the proposed model and its

capabilities will be presented in this section. As

indicated earlier, the main concern of this work 1s the

development of a simulation model. General Purpose

Simulation Language (GPSS/H) was chosen as the programming

language as it is flexible and simple. The simulation model

consist of a main segment and a number of subroutines called

22

by the main segment. The subroutines do specialized or

repetitive tasks such as various operations at a log out

point, releasing waiting lots, and grouping lots that are to

be processed together. At these points where the main

segment 'calls' the subroutines, the lots are transfered to

the subroutine and returned to the main segment after

completion of these special operations. In addition, there

are segments for machine maintenance and repair and for data

collection and tabulation. The proposed model is described

with the aid of flow charts and segments of code written in

plain English, called pseudo-codes, wherever necessary.

The Main Segment

The main segment simulates much of the processing. At

various points, whenever necessary, it calls different

subroutines to do additional or specialized operations.

Figures 3-5 indicate the order in which the lot is processed

and the hierarchy of the control levels. The lot is

processed through all the logpoints in a loop before going

to the next loop. The lot is considered to be completely

processed after it has passed all the loops successfully.

At various points during the processing a lot may be ~

scrapped. Cycle times and lots processed through the

logpoints and the loops are tabulated wherever appropriate.

23

Due to the intricacy of the problem logic, the main segment

and its associated subroutines are best explained with the

aid of pseudo-codes.

The main segment is the heart of the simulation model.

It has seven groups of identical code, each representing a

loop. Figure 6 shows the logic of one such loop in

pseudo-code. Lots enter the loop if space is available

inside the loop, after which it is assigned appropriate

parameters, and then processed. On machines processing more

than one lot at a time, the lots are collected and processed

in the Grouping subroutine. After being processed through

one machine, the lots release any other lots waiting for the

same machine, in the Unlinking subroutine. Once processed

through a process completely the lots are transfered to the

Logout subroutine. In the Logout subroutine operations

such as routing lots to rework, to scrap, or to the next

process step are performed. The lot leaves the loop after

being completely processed through the current loop and goes

to next loop.

Grouping Subroutine

The task of this subroutine is to collect lots and

process lots together on machines that process more than one

lot at a time (Figure 7). Here the lots are collected into

24

groups according to various conditions and stipulations. To

keep track of the grouped lots they are processed in a

separate subroutine. After the processing is complete, the

lots are separated from the group and transfered back to the .

ma1n segment.

Unlinking Subroutine

The task of this subroutine is to release any waiting

lot for the machine just freed. Each lot releases only one

other lot. The order of priority, as indicated by the

pseudo-codes in Figure 8, is hot lots, lots within the loop,

and finally lots outside the loop. At the same level of

priority, i.e, hot lots, lots within the loop, or lots

outside the loop, lots can be released following any

criteria of queue discipline. After this the lots are

transferred back to the main segment.

Logout Subroutine

The task of this subroutine is to route the lots for

rework, scrappage, or to the next logpoint, based on the

given input values of percent rework and yield; Figures 5

and 9 show the details. It should noted that not all

logpoints have rework, in which case rework percentage 1s

taken as zero. The good lots are now transferred back to

the main segment for the next process.

25

Maintenance and Repair Segments

The task of these segments is to maintain on a periodic

basis and repair the machine in case of failure. Each

machine has an independent segment, one for maintenance and

one for random breakdowns. This way each machine can be

maintained or repaired independently. The flowcharts 1n

Figures 10 and 11 show the details.

Data Collection and Tabulation Segments

The task of these segments (Figure 12) are to collect

and tabulate data for the logpoints and the loops. A weekly

(this time period can be changed) scheduler transaction

comes to collect and store the data. Another transaction,

.at the end of the simulation, does the necessary

calculations and the final tabulation.

The model prints out the following statistics at the

end of the simulation: average and standard deviation of

lots processed per week, average and standard deviation of

cycle times, and throughput (the number of lots processed

for a specified length of time period). The model also

prints out machine utilizations, waiting times, and the

overall system yield.

26

Input/Output Provisions in the Model

The system, by virtue of its complexity, has immense

data requirements. Texas Instruments has been very helpful

in providing the data. The design of the program allows the

input to the model independent of the actual simulation

program. The input to the model is fed through external

files stored under specific names. A detailed explanation

of all the variables, with their significance, and the way

they are input is given in the listing and documentation in

appendices A and B.

The variable requirements of the program is input with

the help of ampervariables and through matrices, wherever

necessary. Input is supplied in a simple blank-delimited

format. This nature of the prQgram makes it easy for the

user to study the system un~er a variety of conditions

without ever tinkering with the source code of the actual

model.

The model outputs a variety of statistics on a lot

basis and on a monthly basis. Also repeated runs us1ng

different random numbers would provide sufficient data to

statistically evaluate the performance of the system.

various machine and queue statistics are also printed.

Along with this the following statistics are also printed

out: average and variance of cycle times of normal lots and

27

hot lots by loop and by logpoint; average and variance of

lots processed per week (this time period can be changed) by .

loop and by logpoint, throughput (total number of lots

processed for a specified period of time), and system yield.

In addition data on each lot completed is maintained; this

data includes such items as cycle time and part type

identification number.

LOOP 1

THE MAIN CONTROL

\

LOOP3

A SERIES OF PROCESSING STEPS

• • •

Figure 2: Schematic showing Hierarchy of Control

28

LOT ENTERS THE SYSTEM

ENTER THE FIRST LOOP

COMPLETE PROCESSING IN THE LOOP

LEAVE THE LOOP

TABULATE RESULTS *TIME TAKEN

LOT LEAVES THE SYSTEM

WAIT IN THE QUEUE AND REENTER THE LOOP

AS SPACE BECOlVIES AVAILABLE

NO ( GO TO NEXT LOOP)

Figure 3: Flowchart showing Processing through the System

29

LOT ENTERS THEIDOP

ENTER THE FIRST LOGPOINT IN THE LOOP

COIVIPLETE PROCESSING IN THE LOGPOINT

LEAVE THE LOGPOINT

TABULATE RESULTS * Til\1E TAKEN

LOT LEAVES THE LOOP

NO

Figure 4: Flowchart showing Processing through a Loop

30

ASSIGN PROCESS AND MACHINE PARAMETERS

YES SUBROUTINE TO COLLECf AND GROUP LOTS

SELECf APPROPRIATE MACHINE

NO

COMPl.EfE PROCESSING

UNGROUP LOTS, IF GROUPED TOGETI-JER

RELEASE ANY WAffiNG LOT, WITH PRIORITY TO Har Lar

JOIN THE QUEUE AND WAIT TO BE RELEASED

PREUMINARY PROCESSING

Figure 5: Flowchart showing Processing through a Logpoint

31

Lot enters. TEST {If lot is 'HOT'}

IF SO: enter the loop

IF NOT: continue.

TEST {If space available in the loop} IF SO:

enter the loop IF NOT:

join the queue outside the loop. Lot enters the loop. ASSIGN Process and Machine parameters. TEST {If Lots processed in groups of. more than one}

IF SO: transfer to the GROUPING subroutine, return after processing.

IF NOT: continue.

SELECT Appropriate machine, if unavailable join queue. SEIZE Machine. Complete processing. RELEASE Machine. Transfer to the UNLINKING subroutine,

return after processing. TEST {If logout point}

IF SO:

TEST

transfer to the LOGOUT subroutine, return after processing

IF NOT: continue processing.

{If end of the loop} IF SO:

tabulate results for the loop leave the loop

IF NOT: reassign process and machine parameters, and continue processing.

Lot leaves the loop.

Figure 6: Pseudo-code for the Main Segment

32

Lot enters GROUPING subroutine. TEST {If limit on waiting time}

IFSO: wait till the time limit or till requisite number of lots accumulate, whichever is earliest. If required number of lots accumulate continue, else return to main segment

IF NOT: wait till required number of lots accumulate.

Group accumulated lots together. ASSIGN Process and Machine parameters. SELECT Appropriate machine, if unavailable join queue. SEIZE Machine. Complete processing. RELEASE Machine. Seperate member lots from the group. Lot returns to appropriate loop in main segment.

Figure 7: Pseudo-code of Grouping Subroutine

33

Lot enters UNLINKING subroutine. UNLINK {Hot lot from machine queue}

UNLINK

UNLINK

IF LOT UNLINKED: unlinkee and unlinker return to appropriate loop for next processing step

IF NOT: continue.

{Lot from machine queue} IF LOT UNLINKED:

unlinkee and unlinker return to appropriate loop for next processing step

IF NOT: continue.

{Lot from loop queue} IF LOT UNLINKED:

unlinkee and unlinker return to appropriate loop for next processing step

IF NOT: continue.

Lot returns to appropriate loop in main segment.

Figure 8: Pseudo-code of Unlinking Subroutine

34

Lot enters LOGOUT subroutine. TRANSFER {R% sent for rework}

do preliminary proc,essing return to main segment for rework.

{(1-R)% continue} TRANSFER {S% sent to scrap}

{Y%, the remaining, continue} TABULATE Cycle time for the logpoint. Lot is logged out. Lot returns to appropriate loop in the main segment.

Figure 9: Pseudo-code of Logout Subroutine

35

WAIT TILL TIME FOR MACHINE MAINTENAN

(MTBM)

CHECK IF MACinNEIS

BEING REPAIRED?

RENDER MACinNE UNA V All.ABLE FOR

PERIOD OF MAINTENANCE

(MTIM)

WAIT TILL MACinNE IS FREE,

TRY AGAIN

Figure 10: Flowchart showing Periodic Machine Maintenance

36

ENTER BREAKDOWN AND REPAIR

TRANSACTION

WAIT FOR MACHINE TO BREAKDOWN

(MTBF)

CHECK IF MACIDNEIS

BEING MAINTAINED ?

~NO

RENDER MACHINE UNAVAILABLE FOR PERIOD OF REPAIR

(MITR) SCRAP LOT/LOTS

CURRENTLY BEING PROCESSED

YES

Figure 11: Flowchart showing Random Machine Failure

37

r ENTERDATA ' COU.ECTION

TRANSACTION \.. ~

...

WAIT FORA SPECIFIED PERIOD

OF TIME (WEEK)

,, TABULATE

* LOTS PROCESSED THROUGH THE SYSTEM,

THE LOOP, AND THE LOG POINTS

/ ENTERDATA '"" TABULATION

TRANSACTION \.. ./

,, WAIT TILL

END OF THE SIMULATION RUN

,, TABULATE RESULTS

FOR THE SYSTEM, THE LOOPS, AND THE LOGPOINTS

* A VG AND S.D OF CYCLE TIMES.

* A VG AND S.D OF LOTS PROCESSED WEEKLY.

* TOTAL NUMBER OF LOTS PROCESSED.

* PERCENT YIELD.

,, STOP

TABULATION

Figure 12: Flowcharts showing Data Collection and Tabulation

38

CHAPTER III

VALIDATION AND RESULTS

In this chapter the procedure adopted for validating

the model is discussed, along with the results obtained.

Validation

A difficult task faced by a modeler, but nonetheless an

important one, is validation of the model. In the present

context, scope of the research study, unavailability of

data, and complexity of the model itself, are some of the

complicating factors. As mentioned earlier, an in-depth

statistical analysis of the system in all its factes would

be beyond the scope of work of this nature although it is a

desirable approach. With this in mind, a three step

approach toward validation was undertaken.

The first step was a check and trace through the source

code of the individual routines separately and the model as

a whole. This step also includes a check on the input

parameters after model execution, proper execution of model

logic, especially at the various decision points, and a

check on the block counts and other similar parameters for

reasonability. The result showed that the model was

behaving in a resonable manner.

39

40

The second step consisted of a discussion with the

personnel of Texas.Instruments who are knowledgeable with

the workings of IC fabrication systems regarding the

implementation of logic in the model. A number of flow

charts and segments of pseudo-code, wherever necessary, were

used to aid this discussion. Within the restrictions of the

proposed model, it was found that the implementation of the

logic to be greatly satisfactory.

The third step consisted of a number of simulation runs

under a variety of conditions, to be discussed next, testing

the reasonability of the model output. The results were

presented to a number of technical personnel from Texas

Instruments who are knowledgeable in the workings of the

system. Comparing the results obtained from the simulation

runs with that of the actual system a few discrepancies were

noticed. The model and the associated assumptions were

discussed in detail in a step by step manner. This showed a

few misrepresentations in the model. The model was

corrected and the simulation runs were executed again. The

results obtained from the corrected model were presented

again. Within the stated restrictions it was found that

the model was found to be behaving in a reasonable manner.

The results of the simulation runs will be discussed in the

next section.

41

Results of the Simulation Runs

fA number of sets~o'f ~ imulat ion runs were executed. --- '~ ;.;;.J ~~ _J,-._; ~'-<

(~ach se; is based on ,a ~umber o~ assumptio~s whi~~w~ll be J

1 , tu, "\,Uirt_ L-~ ::)~ ,£ discussed in the 1 following paragraphs. Within each set a .

I )~' ivr- ~-number of simulation runs are executed under different input

\___ - - - ...-- - -- ---- ~ \

rates. The effect on average cycle tim~s, percent yield, - - \:- . ·-' ~\t(t' ' 1 ~5\..

queue lengths, and machine utilization due to the various

runs will be compared and contrasted.) It should noted here --· -- - -/

that all the simulation runs are based on one part-type. ~ ~ ~

~e simulation is run for a period o~~t~ 8 ~hs with a 'RESET' statement used after each month. fThe 'RESET: --~-- "-' ·-~ ~~~/~ statement discards the statistics collected for the month

but re_~ains the state of _the system. This way the system

achieves steady state after repeated use of the 'RESET' ~~~· -- ~-~ --- __ .__.-

card. ·Although statistical analysis for finding steady --- ·-state was not made, a cursory measure based on cycle times --and a weekly average of the number of_!ot~processed for ~ ~ -·--

each month is used.) Table 1 lists the weekly average after

each month under conditions of no hot lots, rework, machine

maintenance and breakdown for varying input rates. At input

rates of 10 to 40 lots/week the weekly average of the number

of lots processed reaches the input rate after a certain

period of time. At 50 lots/week the average fails to reach

the input rate due to system saturation.

42

The model was run on IBM 3081. CPU time requirements

varied from as low as 10 seconds to as high as 50 seconds.

As can be expected addition of various features and

increasing the input rates generally increased CPU time

requirements. The CPU times mentioned here refer to run

lengths of 6 to 8 months. Similarly, memory requirements

varied from 1 megabyte to 2 megabytes depending on the

features included. Assuming conditions of no hot lots,

rework, or machine maintenance and rework, CPU times varied

between 10 to 25 seconds with increased CPU time requirement

at higher input rates. Memory requirements for the system

described above was below 1 megabyte. Inclusion of features

such as rework, hot lots, and especially machine maintenance

and failure increased CPU time and memory requirements. The

model with provisions for maintenance and breakdown for 20

of the machines with no hot lots or rework required between

20 to 50 seconds for execution. The memory requirement

increased to 2 megabytes.

~The first set of results to be discussed in detail

consists of runs with no hot lots, rework, or machine

maintenance and breakdowns. The simulation was executed at

input rates of 10, 20, 30, 40, and 50 lots/week. The

results are tabulated in Tables 2 and 3, and are shown 1n

Figure 13.

43

The results show an increase in average cycle times at

input rates above the saturation point of 40 lots/week due

to queue build-up. Also increased queue lengths, and

machine utilization were noticed at critical machines. The

bottle-neck effect is clear from Figure 13 which shows a

decline in the percent of input lots that are processed.

The second set of simulation runs included rework. Hot

lots, machine maintenance and breakdown were not considered.

The runs were executed with varying input rates. The lots

were allowed a maximum of five reworks. The results are

tabulated in Table 4 and graphed in Figure 14.

Increasing input rates generally increased the cycle

times. The effect is more pronounced at 50 lots/week. This

can be attributed to system saturation with the reworks

clogging the system. The effect on the loops vary widely.

The second, third, and fourth loops are more affected due to

repeated usage of the photolithography process.

The third set of simulation runs included hot lots.

Rework, machine maintenance and breakdown were excluded. A

percentage of the lots turned hot at the beginning of each

loop. Lots once hot stayed hot until completely processed.

The simulation runs were executed at input rates of 40

lots/week. The results are tabulated 1n Tables 5 and 6 and

graphed in Figure 15.

A general increase in cycle times for normal lots can

be noticed as compared to that of hot lots. The hot lots

were processed faster at the cost of delaying the normal

lots. The effect of hot lots was more pronounced in

logpoints which use a furnace since hot lots are processed

alone on furnaces: a furnace normally waits to collect the

requisite riumber of lots before starting the processing.

44

The last set of simulation runs consists of some of the

machines (furnaces) having maintenance and breakdown

capabilities. No rework or hot lots were assumed to be

present. The runs were executed at different input rates.

The results are tabulated in Table 7, and graphed in Figure

16.

Results indicate an increase in cycle times due to

machine maintenance and breakdown. The yield also suffered

due to more lots being scrapped because of breakdowns. Also

bottle-necks appeared on more machines than in those runs

without machine maintenance and breakdown.

45

------------------------------------------------------------I I TABLE 1 I I Lots Processed each Month I I I I +----------------------------------------------------------+ I Input Rate Lots/Week I I Month 10 20 30 40 50 I +----------------------------------------------------------+

1 4.50 10.50 15.50 23.75 23.50

2 8.05 19.00 27.50 38.00 34.00

3 10.00 18.00 28.00 38.00 38.00

4 9.25 19.50 28.00 39.75 37.00

5 9.25 19.00 28.25 38.50 34.25

6 10.00 18.50 28.75 37.00 35.50

7 9.00 19.50 29.00 38.00 34.50

8 9.00 19.00 29.75 38.00 33.50

------------------------------------------------------------

46

------------------------------------------------------------I I TABLE 2 I I Average Cycle Time in Hours (SET I) I I I I +----------------------------------------------------------+ I Input Rate Lots/Week I I Loop 10 20 30 40 50 I +----------------------------------------------------------+

1 50.76 49.98 51.08 49.96 49.83

2 67.18 39.73 49.00 41.76 139.11

3 75.95 77.60 55.22 58.25 467.85

4 78.95 64.80 50.15 63.66 459.41

5 34.31 26.20 23.11 22.00 140.30

6 12.95 17.35 18.30 17.21 13.50

7 11.20 11.33 11.60 11.59 11.50

SYSTEM 202.71 200.32 213.22 225.35 1221.88

I TABLE 3 I

I System Yield and % of Input Lots Processed (SET I) I

I I I +----------------------------------------------------------+ I Input Rate Lots/Week I I 10 20 30 40 50 I +----------------------------------------------------------+ I Yield 1.0 1.0 1.0 1.0 1.0 I I I I % Processed 0.94 0.93 0.98 0.94 0.68 I I I I I ------------------------------------------------------------

47

------------------------------------------------------------I I TABLE 4 I I System Cycle Time and Yield (SET II) I I I +----------------------------------------------------------+ I Input Rate Lots/Week I I (25% Rework, Maximum Number of Reworks=S) I I Rework 10 20 30 40 50 I +----------------------------------------------------------+ I Time (Hours) Y 208.63 221.01 223.01 236.70 1442.72 I I I I N 202.71 200.32 213.22 225.35 1221.88 I I I I Yield Y 0.97 0.98 0.92 0.96 0.85 I I I I N 1.0 1.0 1.0 1.0 1.0 I I I I I ------------------------------------------------------------

48

------------------------------------------------------------I I TABLE 5 I I Average Cycle Time of Normal Lots in Hours (SET III) I I I +----------------------------------------------------------+ I Percent of Hot Lots I I (Input Rate 40 Lots/Week) I I Loop 1 0 15 2 0 I +----------------------------------------------------------+

1 50.80 50.85 51.10

2 45.51 46.21 46.81

3 59.98 56.63 70.91

4 61.31 60.01 71.73

5 23.85 23.21 25.08

6 15.50 15.70 16.23

7 11.71 11.73 11.90

System 231.00 232.20 241.95

------------------------------------------------------------

49

-------------------------------------------------------~----I I TABLE 6 I I Average Cycle Time of Hot Lots in Hours (SET III) I I I +----------------------------------------------------------+ I Percent of Hot Lots I I (Input Rate of 30 Lots/Week) I I Loop 10 15 20 I +----------------------------------------------------------+

1 47.06 47.65 48.51

2 24.40 23.41 24.15

3 38.11 38.48 38.68

4 44.55 44.43 45.68

5 17.71 17.93 17.73

6 11.81 11.86 11.98

7 10.21 10.55 10.70

System 215.23 216.70 238.62

I TABLE 7 I

I System Cycle Time and Yield (SET IV} I

I I I +----------------------------------------------------------+ I Input Rate Lots/Week I I (With Maintenance and Repair) I I 10 20 30 40 50 I +----------------------------------------------------------+ I Time (Hours} 213.00 219.08 219.45 315.80 781.66 I I I I Yield 0.94 0.93 0.82 0.81 0.73 I I I I I ------------------------------------------------------------

t:l'.)

~ 0 =

1400

1200

1000

800

600

400

200

0 10 20 30 40 50

I.DTS/WEEK

(a)

1.0

0.9 +- Yield 0.8 +- % Processed

~ 0.7

z 0.6 t.I.J u 0.5 ~ t.I.J 0.4 c..

0.3 0.2 0.1

0.0 10 20 30 40 50

LOTS/WEEK

(b)

Figure 13: Graphs for SET I: (a) Average Cycle Time and (b) Yield and % of Input Lots Processed

50

0+---~~---+----~--~

10 20 30 40 50 LOTS/WEEK

(a)

0.95

0.90 ~

,._ Without Rework

~ With Rework

~ ~ 0.85

g: 0.80

0.75

0. 70 .,_ __ --4~---+----+-----1 10 20 30 40 50

LOTS/WEEK

(b)

Figure 14: Graphs for SET II: (a) System Cycle Time and (b) System Yield

51

250

200

V) 150 c==: ::;)

0 ::t 100

50

0+---------~--------~

10 15 20

PERCENT OF HOT LOTS

+- Normal Lots

~Hot Lots

Figure 15: Graphs for SET III: Average Cycle Time for Normal VS Hot Lots

52

v.l

~ 0 ::c

f-4

~ u 0:: ~ P-c

1400

1200

1000

800

600

300

200

0 10 20

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0 10 20

30 40 LOTS/WEEK

30 40 LOTS/WEEK

50

(a)

50

(b)

+- With Maint & Breakdown -co- Without Maint & Breakdown

+- With Maint & Breakdown ~ Without Maint & Breakdown

Figure 16: Graphs for SET IV: (a) System Cycle Time and (b) System Yield

53

CHAPTER IV

CONCLUSIONS AND RECOMMENDATIONS

The primary object of this research which was to

develop a simulation model capable of being used to study

the dynamic behaviour of the system under a variety of

conditions has been fulfilled.

This study brought to light the complexities and

intricacies involved in modeling IC fabrication lines. It

also brought to sharp focus the immense amount of data

required in simulation research of such systems. It also

proved to be worthwhile in understanding the workings of the

actual system, especially the not so salient features.

Within the restrictions and assumptions stated for this

model, the present configuration of the system, and the

simulation runs that were performed, certain broad

conclusions can be made.

The system, under assumptions of no rework, no hot

lots, and machines free from maintenance and breakdown,

attained saturation at input rates of 40 lots/week. Beyond

this point, critically overused machines showed up as

bottle-necks, with a marked increase in average cycle times,

queue lengths, and machine utilization.

54

55

With the introduction of rework the average cycle times

for processing increased. This was more noticable specially

at input rates of 40 lots/week and over, and this increase . 1n cycle time was caused by saturation of the system. A

similar increase was observed with machine utilization and

queue lengths.

The introduction of express lots had the effect of

decreasing the percent of normal lots processed through the

system and increasing their average cycle times. The hot

lots, on the other hand, had lower average cycle times.

Addition of maintenance and breakdown for the machines

had a similar effect of increasing queue lengths and

average cycle times. Once again the effect was more

noticable at input rates of 40 lots/week and higher.

It was seen clearly that the behaviour of the system

differs with different input rates. The response of the

system is different and more drastic at saturation input

rates, as against lower input rates. Also each loop behaved

differently under the effect of different perturbations.

The first three loops, having more multi-lot processing

machines, were more affected by the introduction of hot

lots. The second, third, and fourth loops employ the

photolithography process a number of times and were more

affected by rework. On the other hand, the last three

56

l0ops, employing a very small number of processing steps,

were not affected significantly by any of the perturbations.

This was due to the nature of the flow rates to these loops;

the rate was relatively constant even though bottle-necks

appeared in the previous loops.

Recommendations for Further Research

This section includes a number of suggestion for future

research. This includes recommendations to extend the

capabilities of the model and incorporate more details into

the model. Also, suggestions regarding possible areas for

study and applications for the model are made. It should be

noted here with the addition of the extra features there 1s

a possibility of running into problems with the memory.

allocation although CPU time requirements may not be such a

problem.

To begin with additional part types need to be

·included. This would allow testing of various part-mix

strategies. The data input module and the module simulating

the manufacturing area are entirely independent in the

program. Thus additional part-types would only requ1re

additional input matrices. The flow is broken into the

component processing steps. Next the flow sequence can be

given in a matrix (halfword matrix 2 or 3). Data would have

to be collected separately for different part-types in

floating point matrices as it is done now.

57

The incorporation of additional part-types would allow

the study of different queue disciplines. In the model,

unlinking from the queues is on a lowest-value-first basis,

within priority class. Using different parameters various

queue strategies can be tested. By adding an identical set

of blocks (like the unlinking subroutine) and using

highest-value-first criteria within priority class, almost

any type of queue selection rule can be used. A 'TEST'

block acting as a toggle can serve to choose between the two

types of decisions and can be controlled by the user.

Addition of blocks is necessary because GPSS/H does not

allow the use of character-string constants defined as

ampervariables that can be input from an external device 1n

the block operands.

In the present model when lots from different loops are

waiting for the same machine, lots from the earlier loops

are given first preference. This can be changed such that

different priority orderings can be studied easily. This

can be done by reordering the blocks simulating this in the

unlinking subroutine.

Logpoints, like loops in the present program, should be

provided with special queuing space. Furthermore, features

to restrict queuing space should be incorporated.

Set-up times, load and unload times, and process

variability should be incorporated. These can be input

through halfword matrix 4 with the help of additional

columns in the matrix. Distinction should be made between

·machines that process on a lot basis or on a wafer basis.

58

This can be built into the model using an additional

parameter. The parameter should carry the numbet of wafers

present in the lot. This number can be used as a

multiplicative factor in process time calculation, thus

reducing processing or rework times, if worked on a wafer

basis on lots with fewer wafers. Also features that would

allow hot lots to be processed together with normal lots,

without waiting for the normal lots, should be included.

This can be done in the Grouping subroutine. Care should be

taken that hot lots and normal lots can be separately

identified so that they can be separated when ungrouped.

Sequence dependent set-up times should also be

included. This can be incorporated very easily, if they

vary as a percentage. As an-example, say the set-up time on

a particular machine for a particular part-type is 30

percent less if the previous part-type processed on that

machine was Y, but 40 percent less if the previous part-type

processed was Z. A matrix of N rows and N columns for N

part-types currently processed on the system can be built to

hold the percent values. This can be used as a

multiplicative factor in set-up time calculations 1n the

program.

59

The exact nature of distribution for order arrival,

process variability, machine maintenance and breakdown

rates, and maintenance and repair times should be included.

Different distributions can be easily attached using the

IMSL library through facilities provided in the software.

Restrictions in the length of the waiting time between

consecutive processes has to be included. This can be done

by spliting the parent transaction and passing the offspring

through an 'ADVANCE' block. The 'ADVANCE' block simulates

the period of waiting time, after which the offspring can

unlink the parent transaction and route it back for

reprocessing if the parent transaction has not already been

processed. A unique match between the parent and the

offspring can be made based on the the mark time or some

other parameter.

Maintenance and breakdown provision for more machines

should be provided. This can be done very easily by reusing

macros already defined. If machines are maintained based on

decisions such as a certain number of lots or a certain

number of actual processing time, these features should be

included. This can be done by global boolean variables

incorporating these decisions. The number of a particular

boolean variable to be used for a particular machine, and

hence a certain type of decision for the machine, can be

obtained through a matrix (halfword matrix 8).

60

Presently the model allows capacity analysis by

altering the number of machines used at various stages and

dynamic reallocation of machines to a limited extent. To

fully realize this reallocation capability the machines will

have to be represented as 'STORAGES' instead of 'FACILITIES'

as they are represented now. Finally, human and labour

resource constraints need to be incorporated.

The next step would be to study the behaviour of the

system, possibly using a simulation database program to

manage input and output data under various perturbations,

different scheduling criteria and queue disciplines,

part-mix strategies, and management and operating policies.

The model may also be used judiciously in technology

evaluations such as Just-In-Time environment, automating

parts of the flow line, or the introduction of new

part-types. It may also be used as a learning tool for new

managers to gain experience.

Implementations of the model on personal computers

(PCs) needs to be explored. The enormity of the problem

dictates the use of advanced versions of PCs (i.e., with

61

memory capabilities of the order of 2 to 4 megabytes). PC

implementations would render the model economical to run and

would be interactive; disadvantages of using PCs could be

extended run times.

REFERENCES

Atherton, R. W., Bouriadou, D., and Dralla, J. R., "Implementation of Automated Semiconductor Manufacturing Systems," Technical Program Proceedings, SEMICON/WEST, San Mateo, California, May 1984, pp 100-106.

Atherton, R. w., and Dayhoff, D. E., "Improving Wafer Throughput and Yield by Simulating Wafer flow," Technical Program Proceedings, SEMICON/WEST, San Mateo, Cal1forn1a, 1985, pp 63-69. .

Banks, J., and Carson J. S., Discrete-Event System Simulation, Prentice-Hall, Inc., Englewood Cliffs, New Jersey, 1985.

Dayhoff, J. E., and Atherton, R. w., "Simulation of VLSI Manufacturing Areas," VLSI Design, Dec 1984, pp 84-92.

Elliott, D. J., Integrated Circuit Fabrication Technology, McGraw-Hill Book Company, 1982.

Gershwin, S. B., "Dynamic Production Scheduling in Computeraided Fabrication," Technical Pro~ram Proceedings, SEMICON/WEST, San Mateo, Californ1a, 1985, pp 113-116.

Gordon, G., The Application of GPSS/V to Discrete Event Simulation, Prentice-Hall, Inc., Englewood Cliffs, New Jersey, 1975.

Henriksen, J. 0., and Robert, C. C., GPSS/H User's Manual, Wolverine Software Corporation, Annandale, V1rg1n1a, 1983.

Law, A.M., and David Kelton, W., Simulation Modeling and Analysis, McGraw-Hill Book Company, 1982.

Lohrasbpour, E., and Sathaye, S., "Simulation Modeling of IC Wafer Fabrication Lines," Technical Program Proceedings, SEMICON/WEST, San Mateo, California, 1985, pp 93-99.

Schriber, T. J., Simulation Using GPSS, John Wiley and Sons, New York, NY, 1974.

van Horn, R. L., "Validation of Simulation Results," Management Science, 1971, Vol 17, pp 247-258.

62

APPENDIX A

PROGRAM LISTING

II JOB (YYSLV,0020,,40,12),'YYSLV' ,REGION=2048K,CLASS=H II EXEC GPSSH,OPTIONS='SIZE=C,NOS' //A DD DSN=WYL.YY.SLV.MISCL,DISP=SHR //B DD DSN=WYL.YY.SLV.ROUTE,DISP=SHR 1/C DD DSN=WYL.YY.SLV.PROCS,DISP=SHR 1/D DD DSN=WYL.YY.SLV.YERWK,DISP=SHR //E DD DSN=WYL.YY.SLV.MNRPR,DISP=SHR //SYSIN DD * * * * * * * * * * *

TO RUN THE PROGRAM IT IS ESSENTIAL TO SUPPLY DATA, IN SIMPLE BLANK-DELIMITED FORMAT, UNDER THE FOLLOWING FILE NAMES MISCL MISELLANEOUS DATA ROUTE PART-TYPE ROUTE DATA PROCS PROCESS INFORMATION YERWK LOGOUT INFORMATION MNRPR MAINTENANCE AND REPAIR DATA

REALLOCATE BVR,l,BSV,95,FAC,268,LMS,3,FMS,2,FSV,l7 REALLOCATE FUN,ll,HMS,8,QUE,l00,TAB,25,CHA,65 REALLOCATE COM,89827

* SIMULATE

* * MACRO FOR MACHINE MAINTENANCE

* MAINT STARTMACRO

GENERATE ,,,1,2,1PF BLET &OKAY=#B ASSIGN l,FN$MTRPR,PF REFERENCE ROW ASSIGN l,MH8(PF1,2),PF NUM (H.MATRIX8)

#A ADVANCE 1440 MTBM GATE NU #B M/C NOT IN USE? GATE FV #B,#A M/C REPAIRED? FUNAVIAL #B ADVANCE PFl MTTM FA VAIL #B TRANSFER ,#A GO BACK, START ENDMACRO AGAIN

* * MACRO FOR MACHINE BREAKDOWN

* REPIR STARTMACRO

63

* * *

*

#A

GENERATE BLET ASSIGN ASSIGN ASSIGN ASSIGN ASSIGN ADVANCE GATE FV FUNAVIAL ADVANCE FAVAIL TRANSFER ENDMACRO

,,,1,2,4PF &OKAY=#B l,FN$MTRPR,PF 2,MH8(PF1,4),PF 3,MH8(PF1,5),PF 4,MH8(PF1,6),PF l,MH8(PF1,3),PF PFl,PF2 #B, #A #B,RE,SCRAP PF3,PF4 #B ,#A

64

REFERENCE ROW NUM (H.MATRIX8)

MTBF M/C NOT MAINT? REPAIR SCRAPLOT MTTR

GO BACK, START AGAIN

AMPERVARIABLE DEFINITIONS

INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER INTEGER

&OKAY 7,10 &TIMES &LOGPT &PARTS &MAXFC &MAXPR &WEEK &WHAT &LASTLY &PERCT &LOOP A &LOOPB &LOOPC &LOOPD &LOOPE &LOOPF &LOOPG &MAXLP &MAINF &LINKQ

USED TO INDEX IN IMPLIED DO MAX NUMBER OF REWORKS ALWD MAX NUMBER OF LOGPOINTS NUMBER OF PARTTYPES MAX NUM OF THE FACLITY USED MAX NUM OF PROCESS LENGTH OF WEEK IN MIN PERIOD OF DATA COLLEC. COUNT ON START CARD PERCENT OF HOT LOTS MAX NO. OF STEPS IN LOOPl MAX NO. OF STEPS IN LOOP2 MAX NO. OF STEPS IN LOOP3 MAX NO. OF STEPS IN LOOP4 MAX NO. OF STEPS IN LOOPS MAX NO. OF STEPS IN LOOP6 MAX NO. OF STEPS IN LOOP7 MAX OF &LOOPA TO &LOOPG MAX NO OF MACHINES MAINT & RPR PARAMETER NUM USED IN LINKING

* INTIALIZATION ROUTINE (MODEL INPUT) * FILE A MISCELLANEOUS VARIABLES LISTED ABOVE * FILE B PART-TYPE ROUTING (H.MATRIX 1) * FILE C PROCESS INFORMATION (H.MATRIX 4) * FILE D LOGOUT INFORMATION (H.MATRIX 7) * FILE E MAINTENANCE INFORMATION (H.MATRIX 8) * GETLIST

GETLIST GETLIST

FILE=A,(&TIMES,&LOGPT,&PARTS,&MAXFC,&MAXPR) FILE=A,(&WEEK,&WHAT,&LASTLY,&PERCT,&LOOPA) FILE=A,(&LOOPB,&LOOPC,&LOOPD,&LOOPE,&LOOPF)

* * * * * * * * *

* * * * * * * * * * * * * * * *

* * * * * * * *

* * *

1

4

GETLIST GETLIST

FILE=A,(&LOOPG,&MAXLP,&MAINF) FILE=A,(&LINKQ)

65

H.MATRIX 1 INPUTS THE PART FLOW. EACH ROW REPRESENTS A LOOP, HENCE 7 ROWS FOR 7 LOOPS. A +VE NUMBER FOR PROCESS TYPE A -VE NUMBER FOR LOGPOINT A 0 (ZERO) FOR MARKING THE END OF LOOP THESE +VE NUMBER IS USED TO ACESS PROCESS INFORMAT. BY PROCESS TYPE IN H.MATRIX 4.

MATRIX GETLIST GETLIST GETLIST GETLIST GETLIST GETLIST GETLIST

MH,7,&MAXLP FILE=B,(MH1(1,10),10=1,&LOOPA) FILE=B,(MH1(2,10),10=1,&LOOPB) FILE=B,(MH1(3,10),10=1,&LOOPC) FILE=B,(MH1(4,10),10=1,&LOOPD) FILE=B,(MH1(5,10),10=1,&LOOPE) FILE=B,(MH1(6,10),10=l,&LOOPF) FILE=B,(MH1(7,10),10=1,&LOOPG)

H.MATRIX 4 INPUTS PROCESS INFORMATION. EACH ROW REPRESENTS A PROCESS TYPE. RELEVANT INFORMATION IS PROVIDED IN APPROP. COLUMNS FOR EACH PROCESS TYPE. COLUMN 1 MACHINE SET NUM USED COLUMN 2 LOTS PROCESSED/RUN COLUMNS 3-4 RANGE OF MACHINE TO BE USED COLUMN 5 PROCESS TIME COLUMN 6 SET UP TIME (NOT USED) COLUMN 7 WAITING TIME LIMIT TO COLLECT LOTS

IN THE GROUPING SUB. IF NO TIME LIMIT, 0 (ZERO) IS USED HERE.

COLUMNS 8-14 QUEUE NUMBERS WHERE LOT WAITS TO COLLECT APPROP. NUM OF LOTS IN THE GROUPING SUB.

MATRIX GETLIST

MH,&MAXPR,l4 FILE=C,((MH4(7,10),10=1,14),7=1,&MAXPR)

H.MATRIX 7 INPUTS INFORMATION NEEDED DURING LOGOUT AT EACH LOGPOINT. EACH ROW REPRESENTS A LOGPOINT. INFORMATION FOR EACH LOGPOINT IS PROVIDED UNDER APPROP. COLUMNS. IMPORTANT: CARE SHOULD BE TAKEN THAT PERCENTAGES ARE GIVEN IN PARTS/1000. COLUMN 1 % REWORK COLUMN 2 % YIELD. IMPORTANT: CARE SHOULD BE TAKEN

INPUT 0 (ZERO) IF YIELD IS 100% COLUMN 3 PROCESS TYPE OF THE PRECLEANING PROCESS

STEP TO BE USED COLUMN 4 NUMBER OF (PROCESSING STEPS+1) TO BE

* * * *

* * * * * * * * * * * * * * * * * * *

*

7

8

COLUMN 5

MATRIX GETLIST

TRACKED BACK DURING REWORK PROCESS TIME OF THE PRECLEANING PROCESS STEP

MH,&LOGPT,5 FILE=D,((MH7(7,10),10=1,5),7=1,&LOGPT)

H.MATRIX 8 INPUTS INFORMATION REGARDING MACHINE MAINTENANCE AND REPAIR TIMES. EACH MACHINE IS REPRESENTED BY A ROW. INFORMATION FOR EACH IS PROVIDED UNDER APPROP. COLUMNS. DUE TO THE FACT THAT THERE ARE MORE MACHINES IN THE SYSTEM THAN MACHINES BEING MAINTAINED, THE CORRECT ROW IS REFERENCED BY USING FUNCTION MNRPR. IMPORTANT: IF MACHINE IS FREE FROM MAINT. AND/OR BREAKDOWN, INPUT A 'VERY LARGE NUMBER' FOR MTBM AND/OR MTBF. COLUMN 1 NOT USED. CAN BE USED AS A SPREAD

COLUMN 2 COLUMN 3 COLUMN 4 COLUMN 5 COLUMN 6

MATRIX GETLIST

MODIFIER FOR MTTM. PERIOD OF MAINTENANCE (MTTM) MEAN TIME BETWEEN FAILURES (MTBF) SPREAD MODIFIER FOR MTBF MEAN TIME TO REPAIR (MTTR) SPEAD MODIFIER FOR MTTR

MH,&MAINF,6 FILE=E,((MH8(7,10),10=1,6),7=1,&MAINF)

* MATRIX DEFINING FIRST PROCESS OF EACH LOOP. THIS * INFORMATION IS USED IN THE UNLINKING SUB TO RELEASE * LOTS WAITING OUTSIDE THE LOOP, FOR WANT OF SPACE IN * THE LOOP. *

*

5 MATRIX INITIAL INITIAL INITIAL INITIAL INITIAL INITIAL INITIAL

MH,7,1 MH5(1,1),1 MH5(2,1),1 MH5(3,1),10 MH5(4,1),10 MH5(5,1),10 MH5(6,1),10 MH5(7,1),10

* MATRICIES FOR DATA COLLECTION BY LOGPOINTS * FLOAT MATRIX 1 CYCLE TIMES FOR NORMAL LOTS * FLOAT MATRIX 3 CYCLE TIMS FOR HOT LOTS * COLUMN 3 THROUGHPUT * COLUMN 4 AVERAGE * COLUMN 5 VARIANCE * COLUMN 4 NUMBER OF LOTS SCRAPPED AT THE YIELD POINT

66

* * * * * * * * * * * *

1 2 3 4

* * * *

2 * *

FLOAT MATRIX 2 FOR LOTS PROCESSED COLUMN 4 AVERAGE COLUMN 5 VARIANCE COLUMN 6 LOTS SCRAPPED FLOAT MATRIX 4 FOR DATA COLLECTED LOT BY LOT COLUMN 1 NUMBER OF THE LOT PROCESSED COLUMN 2 PART TYPE IDENTIFICATION COLUMN 3 TIME FINISHED COLUMN 4 TIME SPENT IN THE SYSTEM COLUMN 5 IDENTIFICATION FOR HOT LOTS COLUMN 6 NOT USED

MATRIX MATRIX MATRIX MATRIX

ML,&LOGPT,6 ML,&LOGPT,6 ML,&LOGPT,6 ML,50,6

MATRIX FOR PARAMETER VALUE TRANSFER IN GROUPING SUBROUTINE

MATRIX MX,10,100

FUNCTION DEFINITIONS

67

* * * * * *

MTRPR USED TO REFERENCE APPR. M/C ROW IN MAINT & REP. ROUTE, SELCT, TESTT, TRANS, HERE, GOON, USED TO TRANSFER LOTS TO APPR. LOOP AT VARIOUS POINTS IN THE PROGRAM. 1, 2, ETC. SHOW THE LOOP NUMBERS REFERENCED. FUN 7 USED TO INDERECTLY SPECIFY ANOTHER FUN BY PART TYPE (EG. FUN 3 FOR PART TYPE 1).

* * * * * *

FUN 3 USED TO ACESS APPR. COLUMN NO. IN H.MATRIX 4, HENCE APPR. QUEUE NO. IN GROUPING SUBROUTINE. FUN 9 USED IN GROUPING SUBROUTINE DURING UNGROUPING. SCRAP USED TO REFERENCE APPR. B.S/V TO ACCUMULATE TOTAL NUMBER SCRAPPED BY M/C DURING BREAKDOWN.

MTRPR FUNCTION &OKAY,D88 1,1/2,2/3,3/4,4/5,5/15,6/16,7/17,8/18,9/19,10/23,11/24,12 25,13/26,14/27,15/28,16/109,17/110,18/111,19/112,20/113,21 114,22/115,23/116,24/117,25/118,26/119,27/125,28/126,29 127,30/128,31/129,32/130,33/131,34/132,35/136,36/137,37 138,38/139,39/140,40/141,41/142,42/143,43/144,44 145,45/149,46/150,47/151,48/152,49/153,50/173,51/174,52 175,53/176,54/177,55/178,56/179,57/180,58/181,59/185,60 186,61/187,62/188,63/189,64/199,65/200,66/201,67/202,68 203,69/204,70/205,71/206,72/210,73/211,74/212,75/213,76 214,77/221,78/222,79/223,80/224,81/241,82/242,83/243,84 244,85/245,86/246,87/247,88

ROUTE FUNCTION PF2,D7 1,LKLP1/2,LKLP2/3,LKLP3/4,LKLP4/5,LKLP5/6,LKLP6/7,LKLP7

SELCT FUNCTION PF2,D7 1,SLCT1/2,SLCT2/3,SLCT3/4,SLCT4/5,SLCT5/6,SLCT6/7,SLCT7

TESTT FUNCTION PF2,D7 1,TEST1/2,TEST2/3,TEST3/4,TEST4/5,TEST5/6,TEST6/7,TEST7

TRANS FUNCTION PF2,D7 1,TRAN1/2,TRAN2/3,TRAN3/4,TRAN4/5,TRAN5/6,TRAN6/7,TRAN7

HERE FUNCTION PF2,D7 1,HERE1/2,HERE2/3,HERE3/4,HERE4/5,HERE5/6,HERE6/7,HERE7

GOON FUNCTION PF2,D7 1,GOON1/2,GOON2/3,GOON3/4,GOON4/5,GOON5/6,GOON6/7,GOON7

7 FUNCTION PF1,L3 1,3/2,4/3,5

3 FUNCTION PF2,L7 1,8/2,9/3,10/4,11/5,12/6,13/7,14

9 FUNCTION XF$COUNT,D5 1,20/2,21/3,22/4,23/5,24

SCRAP FUNCTION PF8,D88 1,1/2,2/3,3/4,4/5,5/15,6/16,7/17,8/18,9/19,10/23,11/24,12 25,13/26,14/27,15/28,16/109,17/110,18/111,19/112,20/113,21 114,22/115,23/116,24/117,25/118,26/119,27/125,28/126,29 127,30/128,31/129,32/130,33/131,34/132,35/136,36/137,37 138,38/139,39/140,40/141,41/142,42/143,43/144,44 145,45/149,46/150,47/151,48/152,49/153,50/173,51/174,52 175,53/176,54/177,55/178,56/179,57/180,58/181,59/185,60 186,61/187,62/188,63/189,64/199,65/200,66/201,67/202,68 203,69/204,70/205,71/206,72/210,73/211,74/212,75/213,76 214,77/221,78/222,79/223,80/224,81/241,82/242,83/243,84 244,85/245,86/246,87/247,88

SAM FUNCTION PF8,D5 1,91/116,92/117,93/149,94/150,95

* * * *

LOOP1 LOOP2 LOOP3 LOOP4 LOOPS LOOP6 LOOP7

* * * *

1 * * *

EQUAL CARDS DEFINED TO AVOID COFLICTING ASSIGNMENT OF NUMBERS BY GPSS/H PROCESSOR

EQU 56,C EQU 57,C EQU 58,C EQU 59,C EQU 61,C EQU 62,C EQU 63,C

VARIABLE USED TO RELEASE LOT AFTER WAITING FOR A STIPULATED LENGTH OF TIME TO COLLECT LOTS.

BVARIABLE ((Q*PF15'E'2)0R(AC1'GE'PF19))

TABLE DEFNITIONS. TO COLLECT STATISTICS BY LOOP.

68

69

* LPTMl, LPTM2, .• LPTM7, CYCLE TIMES FOR NORMAL LOTS * HTTMl, HTTM2, .. HTTM7, CYCLE TIMES FOR HOT LOTS * OVERl,OVER2, •• 0VER7, LOTS PROCESSED FOR NORMAL LOTS * RTIME CYCLE TIME THROUGH SYSTEM (NORMAL LOTS) * HTIME CYCLE TIME THROUGH SYSTEM (HOT LOTS) *

LPTMl TABLE Ml,3000,500,20 LPTM2 TABLE MP9PF,l500,500,20 LPTM3 TABLE MP9PF,l500,500,20 LPTM4 TABLE MP9PF,3000,500,20 LPTM5 TABLE MP9PF,500,500,20 LPTM6 TABLE MP9PF,l000,500,20 LPTM7 TABLE MP9PF,l000,500,20 RTIME TABLE Ml,l2000,500,20 HTTMl TABLE Ml,3000,500,20 HTTM2 TABLE MP9PF,l500,500,20 HTTM3 TABLE MP9PF,l500,500,20 HTTM4 TABLE MP9PF,3000,500,20 HTTM5 TABLE MP9PF,500,500,20 HTTM6 TABLE MP9PF,l000,500,20 HTTM7 TABLE MP9PF,l000~500,20 HTIME TABLE Ml,l2000,500,20 OVERl TABLE XF$INVT1,5,10,4 OVER2 TABLE XF$INVT2,5,10,4 OVER3 TABLE XF$INVT3,5,10,4 OVER4 TABLE XF$INVT4,5,10,4 OVERS TABLE XF$INVT5,5,10,4 OVER6 TABLE XF$INVT6,5,10,4 OVER7 TABLE XF$INVT7,5,10,4

* ************************************************************

* THE MAIN SEGMENT * ************************************************************

* GENERATE 336,168,,,1,30PF

**************************************

* BEGINNING OF THE FIRST LOOP * **************************************

ASSIGN l,l,PF ASSIGN 2,l,PF ASSIGN 3,l,PF ASSIGN 9-lO,ACl,PF

* ASSIGN 5,RN2,PF TEST LE PF5,&PERCT,NEXT1 ASSIGN 5,l,PF

* NEXTl ASSIGN 4,MH*PFl(l,PF3),PF

ASSIGN 6,MH4(PF4,5),PF

PART TYPE LOOP NUMBER FIRST PROC STEP ENTRY TIME

%PERCT TURN HOT PF5=1 IF HOTLOT

PROCESS TYPE PROCESS DURATION

ASSIGN *

TEST NE *

TEST NE *

TESTl TEST E

7,MH4(PF4,l),PF

PFS,l,GOONl

PF3,l,IFITS

MH4(PF4,2),l,EXCES

MACHINE SET

HOT LOT? IF SO ENTER LOOP ENTERING LOOP?

70

M/C PROC > !LOT TO GROUPING SUB

* * * *

ENTER THE LOOP. SELECT APPR. M/C, SEIZE IF AVAILABLE IF NOT WAIT. THEN COMPLETE PROCESSING AND LEAVE.

GOON! QUEUE SLCTl SELECT E

SEIZE DEPART ADVANCE PRIORITY TEST NE TEST LE RELEASE SAVEVALUE ADVANCE SAVEVALUE TRANSFER

PF7 8PF,MH4(PF4,3),MH4(PF4,4),0,F,LKLAL PF8

*

*

*

RELEl RELEASE

TRANI TRANSFER

HEREl ASSIGN TEST GE TEST E

PF7 PF6 !,BUFFER MH4(PF4,6),0,RELE1 XB*FN$SAM,2 PF8 FN$SAM+,l,XB MH4(PF4,6) FN$SAM-,l,XB ,TRANl PF8

SBR,EXPRS,llPF

3+,l,PF MH*PFl(l,PF3),0,LOGON MH*PFl(l,PF3),0,NEXT2

TEST E PFS,l,TABl TABULATE HTTMl TRANSFER ,SAVl

TABl TABULATE LPTMl SAVl SAVEVALUE INVTl+,l,XF

ASSIGN 9,ACl,PF ************************************** * BEGINNING OF THE SECOND LOOP * **************************************

*

*

ASSIGN ASSIGN

ASSIGN TEST LE ASSIGN

2+,l,PF 3,l,PF

5,RN2,PF PF5,&PERCT,NEXT2 5,l,PF

TO UNLINKINK SUB

INC. NEXT STEP LOGOUT? N GOBACK END OF LOOP? NO GO BACK

TAB CYCLE TIME

TAB CYCLE TIME TAB INVENTORY MARK ENTRY TIME FOR NEXT LOOP

LOOP NUMBER FIRST PROC STEP


*

*

*

*

NEXT2 ASSIGN ASSIGN ASSIGN

TEST NE

TEST NE

TEST2 TEST E

4,MH*PF1(2,PF3),PF 6,MH4(PF4,5),PF 7,MH4(PF4,l),PF

PF5,l,GOON2

PF3,l,IFITS

MH4(PF4,2),l,EXCES

71

PROCESS TYPE PROCESS DURATION MACHINE SET


TO GROUING SUB

* * *


GOON2 QUEUE SLCT2 SELECT E



*

*

*

RELE2 RELEASE

TRAN2 TRANSFER

HERE2 ASSIGN TEST GE TEST E

PF7 PF6 l,BUFFER MH4(PF4,6),0,RELE2 XB*FN$SAM,2 PF8 FN$SAM+,l,XB MH4(PF4,6) FN$SAM-,l,XB ,TRAN2 PF8

SBR,EXPRS,llPF

3+,l,PF MH*PF1(2,PF3),0,LOGON MH*PF1(2,PF3),0,NEXT2

TEST E PF5,l,TAB2 TABU~ATE HTTM2 TRANSFER ,SAV2

TAB2 TABULATE LPTM2 SAV2 SAVEVALUE INVT2+,l,XF

ASSIGN 9,ACl,PF ************************************** * BEGINNING OF THE THIRD LOOP * **************************************

*

ASSIGN ASSIGN


2+,l,PF 3,l,PF

5,RN2,PF PF5,&PERCT,NEXT3 5,l,PF

TO UNLINKING SUB


TAB CYCLE TIME

TAB CYCLE TIME TAB INVENTORY MARK ENTRY TIME



*

*

*

*

* * * *

*

*

*

72

NEXT3 ASSIGN 4,MH*PF1(3,PF3},PF PROCESS TYPE ASSIGN 6,MH4(PF4,5),PF PROCESS DURATION ASSIGN 7,MH4(PF4,l),PF MACHINE SET

TEST NE PF5,l,GOON3 HOT LOT? IF SO ENTER LOOP

TEST NE PF3,l,IFITS ENTERING LOOP?

TEST3 TEST E MH4(PF4,2),l,EXCES M/C PROC > lLOT TO GROUPING SUB





RELE3 RELEASE

TRAN3 TRANSFER


PF7 PF6 !,BUFFER MH4(PF4,6),0,RELE3 XB*FN$SAM,2 PF8 FN$SAM+,l,XB MH4(PF4,6) FN$SAM-,l,XB ,TRAN3 PF8

SBR,EXPRS,llPF


TEST E PF5,l,TAB3 TABULATE HTTM3 TRANSFER ,SAV3


ASSIGN 9,ACl,PF

TO UNLINKING SUB


TAB CYCLE TIME

***************************************


* BEGINNING OF THE FOURTH LOOP * ***************************************

*

ASSIGN ASSIGN

ASSIGN

2+,l,PF 3,l,PF

5,RN2,PF


73

TEST LE PFS,&PERCT,NEXT4 %PERCT TURN HOT ASSIGN S,l,PF PFS=l IF HOTLOT

* NEXT4 ASSIGN 4,MH*PF1(4,PF3),PF PROCESS TYPE

ASSIGN 6,MH4(PF4,S),PF PROCESS DURATION ASSIGN 7,MH4(PF4,l),PF MACHINE SET

* TEST NE PFS,l,GOON4 HOT LOT? IF SO

* ENTER LOOP TEST NE PF3,l,IFITS ENTERING LOOP

* TEST4 TEST E MH4(PF4,2),l,EXCES M/C PROC > lLOT

TO GROUPING SUB * * * *





*

*

*

RELE4 RELEASE

TRAN4 TRANSFER



SBR,EXPRS,llPF


TEST E PFS,l,TAB4 TABULATE HTTM4TAB CYCLE TIME TRANSFER ,SAV4


ASSIGN 9,ACl,PF *************************************** * BEGINNING OF THE FIFTH LOOP * ***************************************

ASSIGN ASSIGN

2+,l,PF 3,l,PF

TO UNLINKING SUB




74

* ASSIGN S,RN2,PF TEST LE PFS,&PERCT,NEXTS %PERCT TURN HOT ASSIGN S,l,PF PFS=l IF HOTLOT

* NEXTS ASSIGN 4,MH*PFl(S,PF3),PF PROCESS TYPE

ASSIGN 6,MH4(PF4,S),PF PROCESS DURATION ASSIGN 7,MH4(PF4,l),PF MACHINE SET

* TEST NE PFS,l,GOONS HOT LOT? IF SO

* ENTER LOOP TEST NE PF3,l,IFITS ENTERING LOOP

* TESTS TEST E MH4(PF4,2),l,EXCES M/C PROC > lLOT

TO GROUPING SUB * * * *


GOONS QUEUE SLCTS SELECT E



*

*

*

RELES RELEASE

TRANS TRANSFER

HERES ASSIGN TEST GE TEST E

PF7 PF6 l,BUFFER MH4(PF4,6),0,RELES XB*FN$SAM,2 PF8 FN$SAM+,l,XB MH4(PF4,6) FN$SAM-,l,XB ,TRANS PF8

SBR,EXPRS,llPF

3+,l,PF MH*PFl(S,PF3),0,LOGON MH*PFl(S,PF3),0,NEXTS

TEST E PFS,l,TABS TABULATE HTTMS TRANSFER ,SAVS

TABS TABULATE LPTMS SAVS SAVEVALUE INVTS+,l,XF

ASSIGN 9,ACl,PF *************************************** * BEGINNING OF THE SIXTH LOOP * ***************************************

TO UNLINKING SUB


TAB CYCLE TIME


*

*

*

*

*

* * * *

*

*

*

ASSIGN ASSIGN


NEXT6 ASSIGN ASSIGN ASSIGN

TEST NE

TEST NE

TEST6 TEST E

2+,l,PF 3,l,PF

S,RN2,PF PFS,&PERCT,NEXT6 S,l,PF


PFS,l,GOON6

PF3,l,IFITS

MH4(PF4,2),l,EXCES

75


%PERCT TURN HOT PFS=l IF HOTLOT



M/C PROC > lLOT TO GROUPING SUB

ENTER THE LOOP. SELE~T APPR. M/C, SEIZE IF AVAILABLE IF NOT WAIT. THEN COMPLETE PROCESSING AND LEAVE.




RELE6 RELEASE

TRAN6 TRANSFER



SBR,EXPRS,llPF


TESTE PFS,l,TAB6 TABULATE HTTM6 TRANSFER ,SAV6


ASSIGN 9,ACl,PF

TO UNLINKING SUB


TAB CYCLE TIME

**************************************


76

* BEGINNING OF THE SEVENTH LOOP * **************************************

ASSIGN ASSIGN

* ASSIGN TEST LE ASSIGN

* NEXT7 ASSIGN

ASSIGN ASSIGN

* TEST NE

* TEST NE

* TEST7 TEST E

2+,l,PF 3,l,PF

S,RN2,PF PFS,&PERCT,NEXT7 S,l,PF


PFS,l,GOON7

PF3,l,IFITS

MH4(PF4,2),l,EXCES


%PERCT TURN HOT PFS=l IF HOTLOT



M/C PROC > lLOT TO GROUPING SUB

* * * *


*

*

*



RELE7 RELEASE

TRAN7 TRANSFER


TEST E TABULATE TABULATE TRANSFER

TAB7 TABULATE

PF7 8PF,MH4(PF4,3),MH4(PF4,4),0,F,LKLAL PF8 PF7 PF6 l,BUFFER MH4(PF4,6),0,RELE7 XB*FN$SAM,2 PF8 FN$SAM+,l,XB MH4(PF4,6) FN$SAM-,l,XB ,TRAN7 PF8

SBR,EXPRS,llPF


PFS,l,TAB7 HTTM7 HTIME ,SAV7 LPTM7

TO UNLINKING SUB


TAB CYCLE TIME TAB CYCLE TIME

TAB CYCLE TIME

*

* * *

* * *

*

*

*

77

SAV7 TABULATE RTIME SAVEVALUE INVT7+,l,XF

TAB CYCLE TIME TAB INVENTORY

SAVEVALUE MSAVEVALUE MSAVEVALUE MSAVEVALUE MSAVEVALUE MSAVEVALUE TEST E SAVEVALUE PRINT

FINAL TERMINATE

lOO+,l,XB 4,XB100,l,N$SAV7,ML 4,XB100,2,PFl,ML 4,XB100,3,Cl,ML 4,XB100,4,Ml,ML 4,XB100,5,PF5,ML XB100,50,FINAL lOO,O,XB 4,4,ML,Z

NUMBER OF LOT PART TYPE FINISH TIME PROCESS TIME PFS=l IF HOTLOT

PROCESSED LOTS

CHECK IF SPACE AVAILABLE IN LOOP BEFORE ENTERING

!FITS COUNT NU TEST G TEST NE TRANSFER

12PF,MH4(PF4,3),MH4(PF4,4) PF12,0,QUEUP NO SPACE JOIN Q PF5,l,FN$GOON ,FN$TESTT ELSE, GO AHEAD

SEGMENT TO LINK LOTS TO QUEUE

LKLAL LINK

QUEUP TRANSFER

LKLPl LINK LKLP2 LINK LKLP3 LINK LKLP4 LINK LKLPS LINK LKLP6 LINK LKLP7 LINK

PF7,&LINKQ$PF

,FN$ROUTE

LOOPl,&LINKQ$PF LOOP2,&LINKQ$PF LOOP3,&LINKQ$PF LOOP4,&LINKQ$PF LOOP5,&LINKQ$PF LOOP6,&LINKQ$PF LOOP7,&LINKQ$PF

JOIN MACHINE Q

IF NOSPACE IN LOOP JOIN LOOP! Q JOIN LOOP2 Q JOIN LOOP3 Q JOIN LOOP4 Q JOIN LOOPS Q JOIN LOOP6 Q JOIN LOOP7 Q

************************************************************ * *

THE GROUPING SUBROUTINE LOTS THAT ARE TO BE PROCESED TOGETHER ARE GROUPED AND PROCESSED HERE

* *

************************************************************ *

*

*

EXCES ASSIGN ASSIGN ASSIGN

TEST E

ASSIGN TEST L QUEUE

13,l,FN7,PF 15,MH4(PF4,PF13),PF 16,MH4(PF4,2),PF

MH4(PF4,7),0,REDO

17,20,PF Q*PF15,PF16 PF15

Q NUM TO WAIT NO LOTS TO GROUP

WAIT TIME LIMIT? NO, GO AHEAD

SPACE IN Q? JOIN Q

*

* * * *

*

*

*

TEST E ASSIGN ASSIGN

BEGIN ASSIGN ASSIGN LOOP DEPART

Q*PF15,PF16,GOGO 18,l,PF 19,(PF16+PF16+PF16-3),PF

PF17,MX2(PF18,PF15),PF 17-lS+,l,PF 19PF,BEGIN PF15,PF16

78

CARRY PARMETERS OF THE GROUP

SELECT APPR. M/C, WAIT IF NECESSARY, COMPLETE PROCESSING, UNGROUP RETURN TO MAIN SEGMENT

QUEUE PF7,PF16 SLCTS SELECT E 8PF,MH4(PF4,3),MH4(PF4,4),0,F,LKLAL

SEIZE PFS DEPART PF7,PF16 ADVANCE PF6 PRIORITY !,BUFFER RELEASE PFS

SPLIT (PF16-l),HAHA UNGROUP PRIORITY !,BUFFER SAVEVALUE COUNT,O,XF ASSIGN 16,0,PF TRANSFER ,FNSTRANS RETURN TO MAINSG

HAHA SAVEVALUE COUNT+,l,XF RETURN PARAMETER ASSIGN 17,1,9,PF VALUES TO MEMBER ASSIGN 3,PF*PF17,PF LOTS. ASSIGN 17+,PF16-l,PF ASSIGN 9,PF*PF17,PF ASSIGN 17+,PF16-l,PF ASSIGN 10,PF*PF17,PF ASSIGN 16,0,PF TRANSFER ,FN$TRANS

GOGO MSAVEVALUE 2,(Q(PF15)),PF15,PF3,MX MSAVEVALUE 2,(Q(PF15)+PF16-l),PF15,PF9,MX MSAVEVALUE 2,(Q(PF15)+PF16+PF16-2),PF15,PF10,MX TERMINATE

* * SEGMENT WHERE LOT WAITS IF A TIME LIMIT IS SPECIFIED * FOR WAITING TIME *

REDO TEST L Q*PF15,PF16 SPACE IN Q? QUEUE PFlS TEST E Q*PFlS,l,GOAWY ASSIGN 19,(ACl+MH4(PF4,7)),PF SPLIT l,ADDER

79

* MSAVEVALUE 2,(Q(PF15)),PF15,PF3,MX MSAVEVALUE 2,(Q(PF15)+PF16-l),PF15,PF9,MX. MSAVEVALUE 2,(Q(PF15)+PF16+PF16-2),PF15,PF10,MX

* TEST E BVl,l WAITING TIME UP? TEST L Q*PF15,2,BANG OR LOTS COLLCTED DEPART PF15 ASSIGN 16,0,PFWAITING TIME UP QUEUE PF7 GO BACK TO MAIN TRANSFER ,FN$SELCT SEGMENT

* BANG TERMINATE

* ADDER ADVANCE MH4(PF4,7)

BUFFER TERMINATE

* GOAWY BUFFER IF LOTS COLLECTD

ASSIGN 17,20,PF GROUP BY TRANS ASSIGN 18,l,PF OF PARAMETERS ASSIGN 19,(PF16+PF16+PF16-3),PF TRANSFER ,BEGIN

* ************************************************************ * THE UNLINKING SUBROUTINE. HERE WAITING LOTS ARE * * RELEASED. PRIORITY TO HOTLOTS, THEN LOT WITHIN LOOP * * FINALLY LOTS OUTSIDE LOOP. AFTER ANY ONE LOT IS * * RELEASED, THE UNLINKER RETURNS TO MAIN SEGMENT * ************************************************************ *

EXPRS UNLINK PF7,CHECK,l,5,1,UNLKA RELEASE HOT LOT TRANSFER PF,ll,l

* UNLKA UNLINK PF7,CHECK,l,,,OVER1 RELEASE NORMAL

TRANSFER PF,ll,l *

OVERl TEST E PF7,MH5(l,l),OVER2 RELEASE FROM UNLINK LOOPl,TESTl,l,,,OVER2 FIRST LOOPQ TRANSFER PF,ll,l

OVER2 TEST E PF7,MH5(2,l),OVER3 RELEASE FROM UNLINK LOOP2,TEST2,l,,,OVER3 SECOND LOOPQ TRANSFER PF,ll,l

OVER3 TEST E PF7,MH5(3,l),OVER4 RELEASE FROM UNLINK LOOP3,TEST3,l,,,OVER4 THIRD LOOPQ TRANSFER PF,ll,l

OVER4 TEST E PF7,MH5(4,l),OVER5 RELEASE FROM UNLINK LOOP4,TEST4,l,,,OVER5 FOURTH LOOPQ TRANSFER PF,ll,l

* * * *

*

OVERS TEST E UNLINK TRANSFER

OVER6 TEST E UNLINK TRANSFER

OVER7 TEST E UNLINK

OVOUT TRANSFER

PF7,MH5(5,l),OVER6 LOOP5,TEST5,l,,,OVER6 PF,ll,l PF7,MH5(6,l),OVER7 LOOP6,TEST6,l,,,OVER7 PF,ll,l PF7,MH5(7,l),OVOUT LOOP7,TEST7,1 PF,ll,l

RELEASE FROM FIFTH LOOPQ

RELEASE FROM SIXTH LOOPQ

RELEASE FROM SEVENTH LOOPQ

CHECK IF UNLINKEE REPRESENTS A GROUP. IF SO ROUTE TO THE GROUPING SUB, ELSE TO MAIN SEGMENT.

CHECK TEST LE TRANSFER

PF16,l,SLCT8 ,FN$SELCT

80

*********************************************************** * THE LOGOUT SUBROUTINE. LOTS ARE ROUTED TO REWORK * * SCRAP, NEXT LOGPOINT ETC. * *********************************************************** *

LOGON

*

* YIELD

* * * * * *

* WELL

* WEEL

*

ASSIGN 4,MH*PFl(PF2,PF3),PF NEG LOGPOINT NBR ASSIGN 4-,2*PF4,PF MAKE POSITIVE

TRANSFER .MH7(PF4,l),,REWRK %R TO REWORK TEST NE MH7(PF4,2),0,YIELD TRANSFER .MH7(PF4,2),CRAP,YIELD %S TO SCRAP

%Y TO NEXT STEP SAVEVALUE PF4+,l,XH INC GOOD LOTS

TABULATE CYCLE TIME FOR LOGPOINT ACCUMULATE SUM OF XSQR, X, ANON F.MATRIX 1 FOR NORMAL LOTS F.MATRIX 3 FOR HOT LOTS

TEST E MSAVEVALUE MSAVEVALUE MSAVEVALUE TRANSFER

MSAVEVALUE MSAVEVALUE MSAVEVALUE

ASSIGN ASSIGN TRANSFER

PF5,l,WELL 3+,PF4,l,(MP10PF*MP10PF),ML 3+,PF4,2,MP10PF,ML 3+,PF4,3,l,ML ,WEEL

l+,PF4,l,(MP10PF*MP10PF),ML l+,PF4,2,MP10PF,ML l+,PF4,3,l,ML

14,0,PF lO,ACl,PF ,FN$HERE

MARK ENTRY TIME FOR NXT LOGPOINT

81

* REWORK SEGMENT *

REWRK ASSIGN 14+,l,PF NO PRESENT RWK TEST LE PF14,&TIMES,CRAP OVERWORKED? ASSIGN 3-,MH7(PF4,4),PF ASSIGN 6,MH7(PF4,5),PF PRECLEAN PROCTM ASSIGN 4,MH7(PF4,3),PF PROCESS TYPE ASSIGN 7,MH4(PF4,l),PF MACHINE SET QUEUE PF7 TRANSFER ,FN$SELCT GOBACK TO MAIN

* SEGMENT CRAP MSAVEVALUE 2+,PF4,6,l,ML INC LOT SCRAPPED

TERMINATE BY REWK OR %S * ************************************************************ * THE MACHINE MAINTENANCE AND REPAIR SEGMENTS * * EACH MACHINE HAS AN INDIVIDUAL SEGMENT FOR * * MAINTENANCE AS WELL AS REPAIR. THE NUMBER SPECIFIES * * REFERENCE NUM OF THE MACHINE BY THE PROGRAM. * * THE LABEL 'MAINT' INVOKES THE MAINTENANCE MACRO * * THE LABEL 'REPIR' INVOKES THE REPAIR MACRO * ************************************************************ *

UNLIST MACX MAINT MACRO AGA6,15 MAINT MACRO AGA11,23 MAINT MACRO AGA12,24 MAINT MACRO AGA17,109 MAINT MACRO AGA18,110 MAINT MACRO AGA19,111 MAINT MACRO AGA28,125 MAINT MACRO AGA31,128 MAINT MACRO AGA36,136 MAINT MACRO AGA37,137 MAINT MACRO AGA40,140 MAINT MACRO AGA41,141 MAINT MACRO AGA42,142 MAINT MACRO AGA51,173 MAINT MACRO AGA55,177 MAINT MACRO AGA56,178 MAINT MACRO AGA60,185 MAINT MACRO AGA65,199 MAINT MACRO AGA70,204 MAINT MACRO AGA73,210 MAINT MACRO AGA78,221 MAINT MACRO AGA82,241 MAINT MACRO AGA86,245

UNLIST MACX *

* * *

*

REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO REPIR MACRO

UNLIST

LOTS GO

SCRAP TEST G SPLIT

TO

DUST SAVEVALUE TERMINATE

RPR6,15 RPR11,23 RPR12,24 RPR17,109 RPR18,110 RPR19,111 RPR28,125 RPR31,128 RPR36,136 RPR37,137 RPR40,140 RPR41,141 RPR42,142 RPR46,149 RPR51,173 RPR55,177 RPR56,178 RPR60,185 RPR65,199 RPR70,204 RPR73,210 RPR78,221 RPR82,241 RPR86,245 MACX

SCRAP IF MACHINE

PF16,l,DUST (PF16-l),DUST FN$SCRAP+,l,XB

82

BREAKS DOWN

INC LOTS SCRAP BY MACHINE NUM

************************************************************ * DATA COLLECTION AND TABULATION SEGMENTS * ************************************************************ *

GENERATE , , , 1, , 4PF

* * HERE COLLECTOR WAITS FOR( SAY A WEEK) COLLECTS * XSQR, X, AND N, FOR LOTS PROCESSED BY LOGPOINT

* *ADDDD ASSIGN

ADDDD ASSIGN ADVANCE

GO ASSIGN ASSIGN

GHOST ASSIGN MSAVEVALUE

l+,(&PARTS+l),PF l,l,PF &WEEK 2,&LOGPT,PF 3,(PFl*PF2),PF 4,XH*PF3,PF 2+,PF2,l,(PF4*PF4),ML

* * *

REPET

* * * * * * * * * * * * * *

NADIR

MSAVEVALUE 2+,PF2,2,PF4,ML MSAVEVALUE 2+,PF2,3,1,ML SAVEVALUE PF3,0,XH ASSIGN 3-,1,PF LOOP 2PF,GHOST TRANSFER ,ADDDD

SAME AS ABOVE ON A LOOP BASIS

GENERATE , , , 1, , OPF ADVANCE &WEEK TABULATE OVER1 TABULATE OVER2 TABULATE OVER3 TABULATE OVER4 TABULATE OVERS TABULATE OVER6 TABULATE OVER7 SAVEVALUE INVT1,0,XF SAVEVALUE INVT2,0,XF SAVEVALUE INVT3,0,XF SAVEVALUE INVT4,0,XF SAVEVALUE INVT5,0,XF SAVEVALUE INVT6,0,XF SAVEVALUE INVT7,0,XF TRANSFER ,REPET

TABULATES CYCLE TIME AND LOTS PROCESSED BY LOGPOINT AND SYSTEM YIELD BEFORE END OF SIMULATION FLOAT MATRIX 1 CYCLE TIMES FOR NORMAL LOTS FLOAT MATRIX 3 CYCLE TIMS FOR HOT LOTS COLUMN 3 THROUGHPUT COLUMN 4 AVERAGE COLUMN 5 VARIANCE COLUMN 4 NUMBER OF LOTS SCRAPPED AT THE YIELD POINT FLOAT MATRIX 2 FOR LOTS PROCESSED COLUMN 4 AVERAGE COLUMN 5 VARIANCE COLUMN 6 LOTS SCRAPPED

GENERATE ADVANCE TEST E ASSIGN

, , , 1, , 1PF &WHAT N$NADIR,&LASTLY,VASAN

GREAT MSAVEVALUE 1,&LOGPT,PF 1,PF1,4,(ML1(PF1,2)/ML1(PF1,3)),ML 1,PF1,5,(((ML1(PF1,1)*ML1(PF1,3)) -(ML1(PF1,2)*ML1(PF1,2))) /(ML1(PF1,3)*(ML1(PF1,3)-l))),ML 3,PF1,4,(ML3(PF1,2)/ML3(PF1,3)),ML

MSAVEVALUE

MSAVEVALUE

83

MSAVEVALUE 3,PF1,5,(((ML3(PFl,l)*ML3(PF1,3)) -(ML3(PF1,2)*ML3(PF1,2))) /(ML3(PF1,3)*(ML3(PF1,3)-l))),ML

MSAVEVALUE 2,PF1,4,(ML2(PF1,2)/ML2(PF1,3)),ML MSAVEVALUE 2,PF1,5,(((ML2(PFl,l)*ML2(PF1,3))

-(ML2(PF1,2)*ML2(PF1,2))) /(ML2(PF1,3)*(ML2(PF1,3)-l))),ML

LOOP lPF,GREAT SAVEVALUE STYLD,((N$FINAL*l000)/(N$FINAL+

N$DUST+N$CRAP)),XF VASAN SPLIT l,NADIR

TERMINATE 1 * * CONTROL CARDS FOR INITIAL RUN AND RERUNS *

*

* I* II

START RESET INITIAL START RESET INITIAL START RESET INITIAL START RESET INITIAL START

END

4

ML1-ML3(1-53,1-6),0 4

ML1-ML3(1-53,1-6),0 4

ML1-ML3(1-53,1-6),0 4

ML1-ML3(1-53,1-6),0 4

84

APPENDIX B

SAMPLE INPUT

Listing of the 'MISCL' file

5 53 1 250 79 10080 10080 4 100 42 44 60 63 22 18 11 63 88 1 1008 504

Listing of the 'ROUTE' file

72 2 3 4 5 6 4 -1 7 6 4 -2 8 9 3 -3 10 11 12 13

14 -4 15 -5 16 -6 17 -7 18 1 2 19 -8 20 21 20 22 -9 73 24

-10 0 0 0 0 0 0 0 0 0

74 2 4 25 4 6 -11 18 75 2 20 27 20 22 -12 10 11 12 13 -13 16 -14 28 29 -15 18 72 2 19 -16 30 31 30 22 -17 30 32 30 33 76 35 22 -18 0 0 0 0 0 0 0

10 11 12 13 14 -19 36 63 37 38 -20 39 77 35 20 41 20 22 -21 16 -22 10 11 12 13 -23 16 -24 29 -25

39 78 35 -26 10 11 12 13 -27 16 -28 29 -29 39 78 35 4 42 4 22 -30 30 32 30 22 76 35 22 -31 0

10 11 12 13 14 -32 43 37 38 -33 10 11 12 13 -34 44 37 38 -35 39 79 35 45 46 45 22 -36 48 47 48

-37 78 35 45 49 45 22 -38 10 11 12 13 -39 50 51 22 -40 39 78 35

-41 52 53 -42 54 78 35 4 55 4 22 -43 0

10 11 12 13 -44 56 71 69 70 -45 39 78 35 30 57 30 22 -46 58 59

-47 0 0 0 0 0 0 0 0 0

10 11 60 61 -48 62 63 37 64 -49 65 66 65 -50 67 53 -51 0 0 0

85

86

10 68 12 13 -52 56 71 69 70 -53 0

Listing of the 'PROCS' file

0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 1 6 7 5 0 0 0 0 0 0 0 0 0 3 1 10 10 20 0 0 0 0 0 0 0 0 0 4 1 12 12 5 0 0 0 0 0 0 0 0 0 5 3 15 15 190 0 0 57 0 0 0 0 0 0 6 1 20 20 6 0 0 0 0 0 0 0 0 0 7 2 23 24 205 0 0 58 0 0 0 0 0 0 8 1 29 30 85 0 0 0 0 0 0 0 0 0 9 1 33 33 105 0 0 0 0 0 0 0 0 0

10 1 35 46 67 0 0 0 0 0 0 0 0 0 11 1 47 52 90 0 0 0 0 0 0 0 0 0 12 1 57 68 90 0 0 0 0 0 0 0 0 0 13 1 69 73 30 0 0 0 0 0 0 0 0 0 14 1 76 79 10 0 0 0 0 0 0 0 0 0 15 1 82 83 .90 0 0 0 0 0 0 0 0 0 16 1 86 88 30 0 0 0 0 0 0 0 0 0 17 2 91 93 78 0 78 59 0 0 0 0 0 0 18 2 98 99 40 0 40 60 65 0 0 0 0 0 19 1 103 103 1 0 0 0 0 0 0 0 0 0 20 1 106 106 5 0 0 0 0 0 0 0 0 0 21 3 109 111 1380 0 0 61 0 0 0 0 0 0

6 1 20 20 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

23 1 120 120 5 0 0 0 0 0 0 0 0 0 24 3 125 125 120 0 0 0 64 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 25 2 128 128 180 0 0 0 67 0 0 0 0 0 12 1 57 62 48 0 0 0 0 0 0 0 0 0 17 2 92 94 66 0 66 0 68 76 0 0 0 0 27 1 133 133 5 0 0 0 0 0 0 0 0 0 28 4 136 137 120 0 0 0 69 0 0 0 0 0 29 2 140 142 160 0 0 0 70 79 0 0 0 0 30 1 146 146 5 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 1 154 154 5 0 0 0 0 0 0 0 0 0 33 1 248 250 132 0 0 0 0 0 0 0 0 0 17 2 92 94 90 0 90 0 0 72 80 0 93 0 34 1 167 170 20 0 0 0 0 0 0 0 0 0 35 2 173 173 40 0 40 0 0 73 81 90 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 36 2 177 178 180 0 0 0 0 75 0 0 0 0 28 4 136 137 180 0 0 0 0 78 0 0 0 0 33 1 248 250 150 0 0 0 0 0 0 0 0 0

87

33 1 248 250 156 0 0 0 0 0 0 0 0 0 37 1 182 182 5 0 0 0 0 0 0 0 0 0 38 2 185 185 180 0 0 0 0 0 83 0 0 0 39 1 190 192 92 0 0 0 0 0 0 0 0 0 40 1 195 196 5 0 0 0 0 0 0 0 0 0 41 2 199 199 180 0 0 0 0 0 85 0 0 0 17 2 92 94 10 0 10 0 0 0 86 0 0 0

1 2 1 1 30 0 30 0 0 0 87 0 0 0 42 1 204 204 100 0 0 0 0 0 0 0 0 0

6 1 20 20 10 0 0 0 0 0 0 0 0 0 43 1 207 207 40 0 0 0 0 0 0 0 0 0 44 2 210 210 150 0 0 0 0 0 88 0 0 0 45 1 215 217 . 240 0 0 0 0 0 0 0 0 0 46 2 221 221 180 0 0 0 0 0 0 92 0 0 47 1 225 226 90 0 0 0 0 0 0 0 0 0 48 1 229 229 10 0 0 0 0 0 0 0 0 0 12 1 57 68 95 0 0 0 0 0 0 0 0 0 13 1 69 73 45 0 0 0 0 0 0 0 0 0 49 1 231 232 60 0 0 0 0 0 0 0 0 0 50 1 235 235 15 0 0 0 0 0 0 0 0 0 51 1 237 237 30 0 0 0 0 0 0 0 0 0 52 1 239 239 5 0 0 0 0 0 0 0 0 0 53 2 241 241 75 0 0 0 0 0 0 0 94 0 54 1 245 245 100 0 0 0 0 0 0 0 0 0 11 1 47 52 95 0 0 0 0 0 0 0 0 0 17 2 92 94 60 0 60 0 0 0 0 89 0 95 34 1 167 170 12 0 0 0 0 0 0 0 0 0 50 1 235 235 12 0 0 0 0 0 0 0 0 0

1 1 1 1 10 20 0 0 0 0 0 0 0 0 22 1 116 117 60 20 0 0 0 0 0 0 0 0

1 1 1 1 27 20 0 0 0 0 0 0 0 0 1 1 1 1 10 27 0 0 0 0 0 0 0 0

31 1 149 149 10 11 0 0 0 0 0 0 0 0 31 1 149 149 32 20 0 0 0 0 0 0 0 0 31 1 149 149 10 20 0 0 0 0 0 0 0 0 31 1 149 149 32 5 0 0 0 0 0 0 0 0

Listing of the 'YERWK' file

0 999 0 0 0 0 998 0 0 0 0 990 0 0 0

300 994 12 6 90 0 990 0 0 0 0 999 0 0 0 0 988 0 0 0 0 998 0 0 0 0 999 0 0 0 0 990 0 0 0

88

0 999 0 0 0 0 973 0 0 0

300 993 12 5 90 0 999 0 0 0 0 999 0 0 0 0 999 0 0 0 0 999 0 0 0 0 997 0 0 0

300 994 12 6 90 0 997 0 0 0 0 988 0 0 0 0 999 0 0 0

300 992 12 5 90 0 999 0 0 0 0 999 0 0 0 0 999 0 0 0

300 994 12 5 90 0 999 0 0 0 0 999 0 0 0 0 999 0 0 0 0 994 0 0 0

300 977 12 6 90 0 985 0 0 0

300 959 12 5 90 0 997 0 0 0 0 995 0 0 0 0 997 0 0 0 0 994 0 0 0

300 998 12 5 90 0 998 0 0 0 0 991 0 0 0 0 997 0 0 0 0 990 0 0 0

300 994 12 5 90 0 997 0 0 0 0 998 0 0 0 0 981 0 0 0

300 968 60 5 95 0 990 0 0 0 0 999 0 0 0 0 995 0 0 0

300 991 12 5 90 0 991 0 0 0

Listing of the 'MNRPR' file

0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75

89

0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 190 28800 14400 380 190 0 190 28800 14400 380 190 0 190 28800 14400 380 190 0 190 28800 14400 380 190 0 190 28800 14400 380 190 0 205 28800 14400 410 205 0 205 28800 14400 410 205 0 205 28800 14400 410 205 0 205 28800 14400 410 205 0 205 28800 14400 410 205 0 205 28800 14400 410 205 0 1380 28800 14400 2720 1380 0 1380 28800 14400 2720 1380 0 1380 28800 14400 2720 1380 0 1380 28800 14400 2720 1380 0 1380 28800 14400 2720 1380 0 1380 28800 14400 2720 1380 0 1380 28800 14400 2720 1380 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 120 28800 14400 240 120 0 120 28800 14400 240 120 o. 120 28800 14400 240 120 0 180 28800 14400 240 120 0 180 28800 14400 240 120 0 180 28800 14400 240 120 0 180 28800 14400 240 120 0 180 28800 14400 240 120 0 120 28800 14400 240 120 0 120 28800 14400 240 120 0 120 28800 14400 240 120 0 120 28800 14400 240 120 0 160 28800 14400 320 160 0 160 28800 14400 320 160 0 160 28800 14400 320 160 0 160 28800 14400 320 160 0 160 28800 14400 320 160 0 160 28800 14400 320 160 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 180 28800 14400 360 180 0 180 28800 14400 360 180

90

0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 100 28800 14400 200 100 0 100 28800 14400 200 100 0 100 28800 14400 200 100 0 150 28800 14400 300 150 0 150 28800 14400 300 150 0 150 28800 14400 300 150 0 150 28800 14400 300 150 0 150 28800 14400 300 150 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 180 28800 14400 360 180 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 75 28800 14400 150 75 0 100 28800 14400 200 100 0 100 28800 14400 200 100 0 100 28800 14400 200 100

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