Rambus Investor Presentation€¦ · CONFIDENTIAL 2 This presentation contains forward-looking...

Rambus Investor Presentation

Q2 2020

2CONFIDENTIAL

This presentation contains forward-looking statements under the Private Securities Litigation Reform Act of 1995 including Rambus’ financial guidance for future periods, product and investment strategies, timing of expected product launches, demand for existing and newly-acquired technologies, the growth opportunities of the various markets we serve, the expected benefits of our merger, acquisition and divestiture activity, including the success of our integration efforts, and the effects of ASC 606 on reported revenue, amongst other things.

Such forward-looking statements are based on current expectations, estimates and projections, management’s beliefs and certain assumptions made by Rambus’ management. Actual results may differ materially. Our business is subject to a number of risks which are described more fully in our periodic reports filed with the Securities and Exchange Commission, as well risks and the potential adverse impacts related to, or arising from, the Novel Coronavirus (COVID -19). Rambus undertakes no obligation to update forward-looking statements to reflect events or circumstances after the date hereof.

Effective January 1, 2018, the Company adopted Accounting Standards Update No. 2014-09, Revenue from Contracts with Customers in ASC 606. The adoption of ASC 606 materially impacted the timing of revenue recognition for the Company's fixed-fee intellectual property licensing arrangements. The adoption of ASC 606 did not have a material impact on the Company's other revenue streams, net cash provided by operating activities, or its underlying financial position.

This presentation contains non-GAAP financial measures, including operating costs and expenses, interest and other income (expense), net and diluted net income (loss) per share. In computing these non-GAAP financial measures, stock-based compensation expenses, acquisition-related transaction costs and retention bonus expense, amortization expenses, non-cash interest expense and certain other one-time adjustments were considered. The non-GAAP financial measures should not be considered a substitute for, or superior to, financial measures calculated in accordance with GAAP, and the financial results calculated in accordance with GAAP and reconciliations from these results should be carefully evaluated. Management believes the non-GAAP financial measures are appropriate for both its own assessment of, and to show investors, how the Company’s performance compares to other periods. Reconciliation from GAAP to non-GAAP results are made available and more fully described on our website as well as the back of this deck and in the earnings release.

Safe Harbor for Forward-Looking Statements; Other Disclosures

3

Rambus at a GlanceWho We Are

• Premier silicon IP and chip provider, making data faster and safer

• Developed foundational technology for all modern computing systems

• Improving performance, capacity and security for leading SoCs and systems

2900+Patents and Applications

NASDAQ:

RMBS Employees Worldwide

~700CaliforniaHQ:

WW Offices in India, EU, Asia

Tech leadership & innovation

30 Years

Financial PerformanceRambus Offerings

Silicon IPHigh-speed Interface and Security IP

Chips Memory Interface Chips

ArchitectureLicenses

High-speed IO & DPA Countermeasures

Q120 2019

Licensing Billings $67.1M $267.2M

Contract & Other Revenue

$13.6M $60.3M

Product Revenue $30.7M $73.0M

Cash from Operations $37.3M $128.5M

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Targeting Growth Markets

Artificial Intelligence

Accurate training requires enormous amounts of data - memory bandwidth is key. Securing trainingand inference models and data now vital

Data Center

Explosion of data pushing demands on interconnects to move data faster. Value of data demands securing the communication links

Autonomous/ADAS Automotive

Real-time decisions from multiple inputs increase demand on processing and trust in the data

Edge Compute (5G)

Near edge (base stations) drive performance and far edge (gateways and routers) demand power efficiency and trust

Billions of connected endpoints make device-level security critical to enabling trust across the ecosystem

Internet of Things

Trusted device authentication is critical to global supply chain

Defense

5

Semiconductor Industry Ecosystem Built on Leading-Edge IP

Chip MakersMemory SoC

Technology Suppliers

Foundry

Cloud Providers

Markets

AI/ML Data Center Automotive Communications GovernmentIoT

System OEMs

Ecosystem Example

6

Semiconductor Solutions Built on Leading-Edge IP

2400+ issued & pending patents

Memory Interface

Chips

Foundational IP

ArchitectureLicense Silicon IP Chips

Security IP:Secure Cores, Protocols

and Provisioning

Interface IP:Memory and SerDes PHYs and Controllers

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Strong, Growing and Relevant Patent Portfolio

$40B $45B $73B0

20

40

60

80

2010 2015 2020

Industry Citations of Rambus Patents

• Growing patent portfolio in key areas:• Memory architectures• High-speed serial links• Embedded security

• Relevant portfolio regularly cited by major industry players

Source: IHS Markit and Innography, respectively

DRAM Market Increased 84%

DRAM

Mar

ket S

ize

Rambus Patent Portfolio

2900+

8

05

101520253035404550

Q2 18 Q3 18 Q4 18 Q1 19 Q2 19 Q3 19 Q4 19 Q1 20

Product Revenue ($M)

Product (~Chips) Contract & Other (~Silicon IP) Other (~RLD, Payments & Ticketing)

Products Driving GrowthRecord Q1’20 revenue for Silicon IP and Chips

Q120 Up 84% over Q119to $13.6M

Contract & Other (~Silicon IP)

Q120 > 3X revenue of Q119at $30.7M

Product (~Chips)

9

ASC 606 ASC 606 ASC 606 ASC 606 ASC 606

In Millions Q1 2019 Q2 2019 Q3 2019 Q4 2019 Q1 2020

Revenue $48.4 $58.3 $57.4 $59.9 $64.0Year over year growth from chip and Silicon IP revenue. Impacted by structure and timing of key licensing arrangements.

Total Operating Expenses1 $67.3 $64.1 $67.1 $62.3 $63.5 Managed expenses through refocus on core growth initiatives.

Operating Income (Loss)1 ($18.9) ($5.8) ($9.7) ($2.3) $0.5Operating results under ASC 606 do not reflect significant cash flow from fixed-fee licensing arrangements

Cash from Operations $28.8 $38.7 $25.6 $35.4 $37.3 Outstanding cash generation

¹Please refer to reconciliations of non-GAAP financial measures included in this presentation and in our earnings release

Continued Strong Cash Generation

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Solid Balance Sheet Supports Strategic InitiativesIn Millions Q1 2019 Q2 2020 Q3 2020 Q4 2019 Q1 2020

Total Cash & Marketable Securities

$305.9 $337.7 $338.0 $407.7 $435.4 Driven by strong cash from operations.

Total Assets $1,321.4 $1,312.2 $1,299.8 $1,339.0 $1,319.5Strong balance sheet with limited debt

$487M and $528M contract assets in Q1 2020 and Q4 2019 respectively, related to ASC 606 adoption

Stockholders’ Equity $999.9 $973.2 $961.3 $970.9 $965.7

Cash from Operations $28.8 $38.7 $25.6 $35.4 $37.3 Outstanding cash generation

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Strong Cash From OperationsLow Capital Expenditure, Consistent Return to Shareholders

• Execution of strategy and operational discipline yields excellent cash flow

• Strong cash position enables flexibility for M&A

• Returned $200M of cash to shareholders from 2015 through 2018 through Accelerated Share Repurchase programs

($M

)

51

76 77

96

117

87

129

44

69 71

87

108

76

114

- -

100

-

50 50

0.39

0.59 0.61

0.77

0.98

0.69

1.01

0.00

0.20

0.40

0.60

0.80

1.00

-

20

40

60

80

100

120

140

Cash F low from Operations Free Cash Flow Return of Capital (Share Buyback) Free Cash Flow/share

2013 2014 2015 2016 2017 2018 2019

($)

12

Rambus Investment Summary

Focusing on core strengths in semiconductor with unique expertise

Strong balance sheet and cash generation to re-invest in R&D and M&A in areas of focus

Delivering to performance-intensive, high-growth market segments including data center, edge, AI and automotive

Growing patent portfolio of interface and security IP has continued relevance

Thank you

14Certain amounts may be off $1.0M due to rounding.

Reconciliation of Non-GAAP Financial MeasuresNet Income (Loss) in Millions

Q1 2019(AC 606)

Q2 2019(ASC 606)

Q3 2019(ASC 606)

Q4 2019(ASC 606)

Q1 2020(ASC 606)

GAAP Net Loss ($27) ($37) ($17) ($10) ($8)

Adjustments:Stock-based compensation $7 $7 $7 $5 $6Acquisition-related/divestiture costs $0 $0 $3 $4 $2Amortization $5 $5 $3 $4 $5Restructuring charges and other $0 $3 $1 $5 $1Non-cash interest expense $2 $2 $2 $2 $2Impairment (recovery) on assets held for sale $0 $17 ($2) ($8) $0Escrow settlement refund $0 ($0) $0 $0 $0

. Facility restoration costs $0 $0 $0 $1 $0Change in fair value of earn-out liability $0 $0 $0 $0 ($2)Provision for (benefit from) income taxes $3 $4 ($0) ($1) ($1)

Non-GAAP Net Income (Loss) ($9) $1 ($3) $2 $5

Operating Income (Loss) in MillionsQ1 2019(AC 606)

Q2 2019(ASC 606)

Q3 2019(ASC 606)

Q4 2019(ASC 606)

Q1 2020(ASC 606)

GAAP Operating Loss ($31) ($37) ($23) ($13) ($11)

Adjustments:Stock-based compensation $7 $7 $7 $5 $6Acquisition-related/divestiture costs $0 $0 $3 $4 $2Amortization $5 $5 $3 $4 $5Restructuring and other charges $0 $3 $1 $5 $1Impairment (recovery) on assets held for sale $0 $17 ($2) ($8) $0Escrow settlement refund $0 ($0) $0 $0 $0.Facility restoration costs $0 $0 $0 $1 $0Change in fair value of earn-out liability $0 $0 $0 $0 ($2)

Non-GAAP Operating Income (Loss) ($19) ($6) ($10) ($2) $1

Depreciation $3 $3 $4 $5 $5Adjusted EBITDA ($16) ($3) ($5) $3 $5

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Revenue and Licensing Billings

¹ Licensing billings is an operational metric that reflects amounts invoiced to our patent and technology licensing customers during the period, as adjusted for certain differences.

2 Interest income associated with the significant financing component of licensing agreements as a result of the adoption of ASC 606.

ASC 606 ASC 606In Thousands Q1'19 Q2'19 Q3'19 Q4'19 FY 2019 Q1'20Royalty Revenue $24,853 $27,050 $19,448 $19,434 $90,785 $19,694Product Revenue $8,964 $16,031 $21,377 $26,600 $72,972 $30,728Contract and Other Revenue $14,567 $15,216 $16,574 $13,913 $60,270 $13,567Total $48,384 $58,297 $57,399 $59,947 $224,027 $63,989

In Thousands Q1'19 Q2'19 Q3'19 Q4'19 FY 2019 Q1'20Royalty Revenue $24,853 $27,050 $19,448 $19,434 $90,785 $19,694

Licensing Billings1 $75,460 $64,948 $63,058 $63,758 $267,224 $67,072Delta $50,607 $37,898 $43,610 $44,324 $176,439 $47,378

In Thousands Q1'19 Q2'19 Q3'19 Q4'19 FY 2019 Q1'20ASC 606 Interest Income2 $5,707 $5,288 $4,925 $4,469 $20,389 $4,368

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GAAP Non-GAAP Delta

In $ Millions Actual Actual toQ1’20 Q1’20 GAAP

Revenue $64.0 $64.0 $-

Cost of revenue 15.9 11.5 (4.4)Research and development 36.7 32.8 (3.9)Sales, general and administrative 23.2 19.1 (4.1)Change in fair value of earn-out liability (1.8) 0.0 1.8 Restructuring charges 0.8 0.0 (0.8)Total operating cost and expenses 74.8 63.5 (11.3)Operating income (loss) (10.8) 0.5 11.3Interest and other income (expense), net 3.8 5.6 1.8Income (loss) before income taxes (7.0) 6.1 13.1Provision for income taxes 1.0 1.5 0.5Net income (loss) ($8.0) $4.7 $12.7

GAAP to Non-GAAP Income Statement

Certain amounts may be off $0.1M due to rounding.

Product Overview

Silicon IP

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From chip-to-cloud, Rambus secure silicon IP helps protect the world’s most valuable resource: data. Securing electronic systems at their hardware foundation, our embedded security solutions span areas including secure co-processors, crypto accelerators, secure protocols, anti-counterfeiting and trusted provisioning.

Silicon IP: Security

Improved Profitability• Improved time-to-market and reduced inventory waste• Dynamic SKU and feature management lowers inventory costs• Reduce revenue lost to unauthorized access and counterfeits

Superior Security• Provide a robust hardware root-of-trust• Secure valuable secret keys, identity credentials, intellectual

property, and other sensitive data• Protect against cloning, counterfeiting, and reverse engineering

Managed Value Chain• Actively monitor production status, availability, and inventory levels• Validate process information through secure logs• Deploy in distributed, high-volume manufacturing

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Silicon IP: Security

Protecting semiconductors and their secrets from design and manufacturing through deployment and end-of-life

Secure Cores

Secure Co-Processors

Protocol Engines

Anti-Counterfeiting

CryptoCores

Secure Provisioning

Key and Data Injection

Device Key Management

Secure Protocols

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CryptoManager Root of Trust

Secure Processing

General Processing

CryptoManager Root of Trust

Custom RISC-V

CPU

Secure Memory

Crypto Accelerators(AES, SHA, others…)

Family of fully-programmable secure co-processors• Protects private data (keys and chip identity) with security anchored in hardware• Adapts to an evolving threat landscape• Supports new secure features and applications

Secure processing is separated from generalprocessing for greaterprotection

Purpose-built for security with defense in depth against attacks

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800G MACsec Protocol Engine• Protects data in motion with robust Layer 2 security anchored in hardware• Operates at full line-rate up to 800 Gbps supporting real-time applications• Secures the communication path from end devices to servers in the data center

Multi-channel Protocol Engine Supports 100G to 800G MACsec

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Optimized for power and area, our line-up of SerDes Interface solutions deliver maximum performance and flexibility for today’s most challenging systems.

Fully Standards-Compatible• Compliant with the latest industry-standard specifications• Support for multi-modal functionality

Enhanced Design Flexibility• Support for multiple packaging options• Enhanced margin and yield

Reduced Power• Improved power efficiency• Lower signaling and stand-by power

Improved Performance• Increased data rates• Improved bandwidth• Higher capacity

Silicon IP: SerDes PHYs and Controllers

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High-Speed SerDes Solutions

LeadCustomers

SerDes PHY and digital controller solutions

• PCIe 4/3/2• CEI 11/6• XFI/XAUI• SATA• SAS

16G28nm & 14nm

• CEI-28/25/11• 100/10GbE• FC28 • XFI/XAUI

28G14nm

• PCIe 5• CXL (PHY)• PCIe 4/3/2

PCIe 57nm

LEAD CUSTOMERS

112G7nm

Integrated tools for easy bring-up and characterization

• Easy-to-use PC Interface• Interface to 3rd

party software• Pre-defined test scripts• PHY control settings• External instrument

control• System characteristics

and analysisLabStation Platform

• CEI-112G LR• CEI-112G XSR• CEI-56/28/25• 800/400/200/

100GbE• PAM-4/NRZ PCIe digital controllers

LEAD CUSTOMERS

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Complete PCIe 5.0 Interface

PCIe 5 Interface Subsystem

Co-validated PCIe 5 PHYand Controller • Eases SoC integration effort• Reduces design risk• Speeds time to market

Features• Backward compatible to PCIe 4/3/2• Supports Compute Express Link

(CXL)• X1, X2, X4, X8 and X16 lane

configuration support• Supports >36dB of channel

insertion loss• Available in 7nm

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With their reduced power consumption and industry-leading data rates, our line-up of enhanced memory interface solutions support a broad range of industry standards with improved margin and flexibility.

Silicon IP: Memory PHYs and Controllers

Fully Standards-Compatible• Compliant with the latest JEDEC and industry-standard specifications• Support for multi-modal functionality

Enhanced Design Flexibility• Support for multitude packaging options• Enhanced margin and yield

Reduced Power• Improved power efficiency• Lower signaling and stand-by power

Improved Performance• Increased data rates• Improved bandwidth• Higher capacity

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Memory Interface SolutionsMemory PHY and digital controller solutions

• 3200 Mbps• x16 to

x72-bits• 1-4 Ranks• DFI 4.0

DDR4/328nm & 14nm

• 2000 Mbps• 1024-bit• 2.5D design

architecture

HBM214nm

DDR5& HBM3

ROADMAP

GDDR6

Integrated tools for easy bring-up and characterization

• Easy-to-use PC Interface• Interface to 3rd

party software• Pre-defined test scripts• PHY control settings• External instrument

control• System characteristics

and analysisLabStation Platform

• 12-18 Gbps• 2x 16-bit

channels

Memory digital controllers

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Applications: • AI/ML• Automotive• Graphics• Networking

Features:• JEDEC standard compliant• 7nm process node• 72 GB/s maximum bandwidth• Speed Bins: 12, 14, 16, 18 Gbps• Supported DRAM: 8, 12, 16 Gbit• ASIC Interface: DFI style• Supports clam shell mode• All training and calibration modes support

Complete GDDR6 Interface

GDDR6 18 Gbps Transmit Eye

GDDR6 Memory Interface Subsystem(Controller + PHY)

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Complete HBM2E Interface

HBM2EInterface

Applications • AI/ML• Graphics• Networking

Features• JEDEC standard compliant• 7nm process node• 410 GB/s maximum bandwidth• Speed Bins up to 3.2 Gbps• Support for stacks of 2, 4, 8 or 12 DRAM

HBM2E Memory Interface Subsystem(Controller & PHY)

Memory Interface Chips

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Built for speed, power efficiency and reliability, the DDRnmemory interface chips for RDIMM, LRDIMM and NVDIMM server modules deliver top-of-the-line performance and the capacity needed to meet the growing demands on enterprise and data center systems.

Industry-leading Performance• Fully-compliant with the latest JEDEC standards• Operational speeds up to 3200 Mbps

Enhanced Margin• Wide margin I/O design with advanced programmability• Exceed JEDEC reliability standards for ESD and EOS

Optimized Power• Advanced power management• Frequency-based, low-power optimization

Superior Debug and Serviceability• Integrated tools for bring-up and debug• Works out-of-the-box with no BIOS

changes required


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Validated solutions with partners

Enabling performance and capacity in server DIMMs

• Consistent with JEDEC direction

DDR5DB & RCD

UNDER DEVELOPMENT

• JEDEC Compliant

• Speeds up to 3200 Mbps

• Ongoing qualifications

NVDDR4 NVRCD

AVAILABLE IN PRODUCTION

• JEDEC Compliant


• Multiple OEM qualifications

DDR4DB & RCD


• JEDEC Compliant


• Multiple OEM qualifications

DDR3DB & RCD


Smart tools for easy integration and reduced time to market

LabStation Platform and Buffer BIOS Integration Tool

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DDR DIMMs Boost Capacity and Bandwidth

Memory Interface Chips = RCD + DB

DIMM Memory Interface chips reduce the number of loads to enable higher system capacity and performance

DDR5 Registered DIMM (RDIMM)

DDR5 Load Reduced DIMM (LRDIMM)

Data Buffer (DB)

RCD DRAM DRAM DRAM DRAM DRAM

DRAM DRAM DRAM DRAM DRAM

DB DB DB DBDB



DB DB DB DBDB





RCD

Register Clock Driver (RCD)

RCD

Thank you

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