Micro Controller assignment

8/4/2019 Micro Controller assignment

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Q.NO.1: Why microcontrollers are more in use than microprocessors?

Ans: Microprocessors are essential to many of the products we use every daysuch as TVs, cars, radios, home appliances and of course, computers.Microprocessors are the core of a computer, but they are used alsoin many other

applications (for example embedded devices). The biggest chunk of the digitalbusiness comes from processors butprocessors are only 2% of allsemiconductors market. Thirty percent of the world's semiconductor sales comefrom microprocessors, DSPs, microcontrollers, and programmable peripheralchips. A tiny 2% sliver of the market is all that processors contribute, but theygenerate a whopping 30% of the dough. There is difference how differentmicrocontrollers are sold. In the processor arena, it's the 4-bit microcontrollersthat are the cheapest.The small 8-bit chips (little old 8051s and 6805s) are thebest-selling type of processor. This kind of smallprocessors are found embeddedin a wide varierty of electronics devices, ranging from small gadgets and homeequipment control to car electronics.Those small controllers areflying off the

shelves at the rate of more than 3 billion new chips per year(more than half of themicroprocessor sale per units). But they're not very expensive, so they're lessthan 15% of the fiscal tonnage.At the opposite end of the scale are-big surprise-32-bit microprocessors. This category includes PC processors like Pentium 4 andAthlon, of course, but also dozens of embedded processors such as PowerPC,68k, MIPS, and ARM chips. Most (98% or so) 32-bit processors are used inembedded systems, not PCs.

Von-Neuman Architecure: Microcontrollers based on the Von-Neumanarchitecture have a single "data" bus that is used to fetch both instructions anddata. Program instructions and data are stored in a common main memory.

When such a controller addresses main memory, it first fetches an instruction,and then it fetches the data to support the instruction (if such data is needed).

Harvard Architecture: Microcontrollers based on the Harvard Architecture haveseparate data bus and an instruction bus. This means that data and instructionsare stored into separate memories that are accessed separately.

CISC (Complex Instruction Set Computer): Almost all of today's microcontrollersare based on the CISC concept. The typical CISC microcontroller has well over80 instructions, many of them very powerful and very specialized for specificcontrol tasks.

RISC (Reduced Instruction Set Computer): RISC microcontroller has smallernumber of commands than CISC microcontroller, and those commanda aregenerally simple (do less work per command). By implementing fewerinstructions, the chip designed is able to dedicate some of the precious siliconreal-estate for performance enhancing features. Benefits are uually s amller chipand lower power consumption. The industry trend for microprocessor design isfor RISC designs.


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Von-Neuman Architecure: Microcontrollers based on the Von-Neumanarchitecture have a single "data" bus that is used to fetch both instructions anddata. Program instructions and data are stored in a common main memory.When such a controller addresses main memory, it first fetches an instruction,and then it fetches the data to support the instruction (if such data is needed).

Harvard Architecture: Microcontrollers based on the Harvard Architecture haveseparate data bus and an instruction bus. This means that data and instructionsare stored into separate memories that are accessed separately.

CISC (Complex Instruction Set Computer): Almost all of today's microcontrollersare based on the CISC concept. The typical CISC microcontroller has well over80 instructions, many of them very powerful and very specialized for specificcontrol tasks.

RISC (Reduced Instruction Set Computer): RISC microcontroller has smallernumber of commands than CISC microcontroller, and those commanda aregenerally simple (do less work per command). By implementing fewerinstructions, the chip designed is able to dedicate some of the precious siliconreal-estate for performance enhancing features. Benefits are uually s amller chipand lower power consumption. The industry trend for microprocessor design isfor RISC designs.

Q.NO.2: What are the minimum hardware components required for 8051 towork with its internal ROM? Also show their connections.

ANS:

PART-B

Q.NO.1.Draw the internal memory map of 8051 microcontroller.

ANS. The 8051 has three very general types of memory. To effectively program

the 8051 it is necessary to have a basic understanding of these memory types.


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The memory types are illustrated in the following graphic. They are: On-ChipMemory, External Code Memory, and External RAM.

On-Chip Memory refers to any memory (Code, RAM, or other) that physicallyexists on the microcontroller itself. On-chip memory can be of several types, butwe'll get into that shortly.

External Code Memory is code (or program) memory that resides off-chip. This isoften in the form of an external EPROM.

External RAM is RAM memory that resides off-chip. This is often in the form of

standard static RAM or flash RAM.

Memory and I/OThe 8051 family can address bytes in separate 64Kbyte code (read only) and64Kbyte data (read/write) spaces, these may be internal to the chip or external

or a combination of the two. It is possible to wire up a system so that these dataspaces overlap giving a single 64K space - this keeps the design simple and alsoallows a debug monitor to download code and set software breakpoints into theRAM space greatly simplifying debugging in the absence of an ICE.

If it is to be used off-chip memory is accessed via up to 20 pins. Up to 8 addresshigh pins and then always 8 pins that are used for both the 8 address low signalsduring the address setup phase and for the 8 data signals during the datatransfer phase. 4 pins are used for control.

Internal MemoryThe original 8031/8051 chip provides 128 bytes of on-chip R/W memory, the8052 has increased this to 256 bytes. This memory is used to provide:-

Four banks of eight 8 bit Registers ( the active bank being selected by two bits inthe PSW)

16 Bytes (128 bits) for which individual bits may be set, tested and cleared with asingle instruction

Variable space - especially if no off-chip RAM is included in the design


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A stack which grows upwards and whose size is limited to the lesser of theremaining internal memory or 256.

this stack may not extend to off-chip memory and is used as a return stackfor function calls and for interrupt handling

Many C compilers also use the stack for function arguments in which case

the basic allowance is soon used upTwo of these registers R0 and R1 have special properties as they can be usedas pointers into memory .

I/O:I/O ports and peripherals will appear as one or more registers in the 128 SpecialFunction Register (SFR) space. Single instructions can read write registers orset/clear/test single bits in all the standard 8051 chips I/O registers

The basic 8051 has a UART, four 8 bit I/O registers and two 16 bit internalcounters ( which have a number of ways in which they will operate). In order to

minimise pin count some of the I/O bits have multiple but exclusive functions, forexample:

18 bits are used to create the external memory and data bus if required.

2 bits provide UART signals if used and 4 bits may be inputs for 2 externalinterrupts and 2 counts. Hence a system that required all these resources wouldbe left with only 8 bits of spare I/O.


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You may interface your applications registers directly to the chips I/O ports ormay memory map them using the multiplexed address and data bus but if thatbus is not required for RAM/ROM then its only worth doing this if you need tointerface more than the 18 bits that the bus consumes.

Q.NO.2. What are the addressing modes of 8051? How many types of

instructions are their?

ANS. Each of these addressing modes provides important flexibility.

Immediate Addressing

Immediate addressing is so-named because the value to be stored in memoryimmediately follows the operation code in memory. That is to say, the instructionitself dictates what value will be stored in memory.

For example, the instruction:

MOV A,#20h

This instruction uses Immediate Addressing because the Accumulator will beloaded with the value that immediately follows; in this case 20 (hexidecimal).

Immediate addressing is very fast since the value to be loaded is included in theinstruction. However, since the value to be loaded is fixed at compile-time it is notvery flexible.

Direct Addressing

Direct addressing is so-named because the value to be stored in memory isobtained by directly retrieving it from another memory location. For example:

MOV A,30h

This instruction will read the data out of Internal RAM address 30 (hexidecimal)and store it in the Accumulator.

Direct addressing is generally fast since, although the value to be loaded isntincluded in the instruction, it is quickly accessable since it is stored in the 8051sInternal RAM. It is also much more flexible than Immediate Addressing since the


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value to be loaded is whatever is found at the given address--which may bevariable.

Also, it is important to note that when using direct addressing any instructionwhich refers to an address between 00h and 7Fh is referring to Internal Memory.

Any instruction which refers to an address between 80h and FFh is referring tothe SFR control registers that control the 8051 microcontroller itself.

The obvious question that may arise is, "If direct addressing an address from 80hthrough FFh refers to SFRs, how can I access the upper 128 bytes of InternalRAM that are available on the 8052?" The answer is: You cant access themusing direct addressing. As stated, if you directly refer to an address of 80hthrough FFh you will be referring to an SFR. However, you may access the8052s upper 128 bytes of RAM by using the next addressing mode, "indirectaddressing."

Indirect Addressing

Indirect addressing is a very powerful addressing mode which in many casesprovides an exceptional level of flexibility. Indirect addressing is also the only wayto access the extra 128 bytes of Internal RAM found on an 8052.

Indirect addressing appears as follows:

MOV A,@R0

This instruction causes the 8051 to analyze the value of the R0 register. The

8051 will then load the accumulator with the value from Internal RAM which isfound at the address indicated by R0.

For example, lets say R0 holds the value 40h and Internal RAM address 40hholds the value 67h. When the above instruction is executed the 8051 will checkthe value of R0. Since R0 holds 40h the 8051 will get the value out of InternalRAM address 40h (which holds 67h) and store it in the Accumulator. Thus, theAccumulator ends up holding 67h.

Indirect addressing always refers to Internal RAM; it never refers to an SFR.Thus, in a prior example we mentioned that SFR 99h can be used to write a

value to the serial port. Thus one may think that the following would be a validsolution to write the value 1 to the serial port:

MOV R0,#99h ;Load the address of the serial portMOV @R0,#01h ;Send 01 to the serial port -- WRONG!!

This is not valid. Since indirect addressing always refers to Internal RAM thesetwo instructions would write the value 01h to Internal RAM address 99h on an


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8052. On an 8051 these two instructions would produce an undefined resultsince the 8051 only has 128 bytes of Internal RAM.

External Direct

External Memory is accessed using a suite of instructions which use what I call"External Direct" addressing. I call it this because it appears to be directaddressing, but it is used to access external memory rather than internalmemory.

There are only two commands that use External Direct addressing mode:

MOVX A,@DPTRMOVX @DPTR,A

As you can see, both commands utilize DPTR. In these instructions, DPTR must

first be loaded with the address of external memory that you wish to read orwrite. Once DPTR holds the correct external memory address, the first commandwill move the contents of that external memory address into the Accumulator.The second command will do the opposite: it will allow you to write the value ofthe Accumulator to the external memory address pointed to by DPTR.

External Indirect

External memory can also be accessed using a form of indirect addressing whichI call External Indirect addressing. This form of addressing is usually only used inrelatively small projects that have a very small amount of external RAM. An

example of this addressing mode is:

MOVX @R0,A

Once again, the value of R0 is first read and the value of the Accumulator iswritten to that address in External RAM. Since the value of @R0 can only be 00hthrough FFh the project would effectively be limited to 256 bytes of ExternalRAM. There are relatively simple hardware/software tricks that can beimplemented to access more than 256 bytes of memory using External Indirectaddressing; however, it is usually easier to use External Direct addressing if yourproject has more than 256 bytes of External RAM.

Q.NO.3:If external memory (ROM) have to be used with 8051 then how much

memory can be connected and why?


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ANS.: When the 8051 was introduced the only memory options available were4K of ROM or EEPROM and 128 bytes on-chip RAM. Technology has moved onallowing Flash memory of 64K or more and with RAM of 2K or 4K beingcommon.

Code Memory

Code memory is the memory that holds the actual 8051 program that is to berun. This memory is limited to 64K and comes in many shapes and sizes: Codememory may be found on-chip, either burned into the microcontroller as ROM orEPROM. Code may also be stored completely off-chip in an external ROM or,more commonly, an external EPROM. Flash RAM is also another popularmethod of storing a program. Various combinations of these memory types mayalso be used--that is to say, it is possible to have 4K of code memory on-chip and64k of code memory off-chip in an EPROM.

When the program is stored on-chip the 64K maximum is often reduced to 4k, 8k,or 16k. This varies depending on the version of the chip that is being used. Eachversion offers specific capabilities and one of the distinguishing factors from chipto chip is how much ROM/EPROM space the chip has.

However, code memory is most commonly implemented as off-chip EPROM.This is especially true in low-cost development systems and in systemsdeveloped by students.

Programming Tip: Since code memory is restricted to 64K, 8051programs are limited to 64K. Some assemblers and compilers offer

ways to get around this limit when used with specially wiredhardware. However, without such special compilers and hardware,programs are limited to 64K.

External RAM

As an obvious opposite of Internal RAM, the 8051 also supports what is calledExternal RAM.

As the name suggests, External RAM is any random access memory which isfound off-chip. Since the memory is off-chip it is not as flexible in terms of

accessing, and is also slower. For example, to increment an Internal RAMlocation by 1 requires only 1 instruction and 1 instruction cycle. To increment a 1-byte value stored in External RAM requires 4 instructions and 7 instructioncycles. In this case, external memory is 7 times slower!

What External RAM loses in speed and flexibility it gains in quantity. WhileInternal RAM is limited to 128 bytes (256 bytes with an 8052), the 8051 supportsExternal RAM up to 64K.


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Programming Tip: The 8051 may only address 64k of RAM. Toexpand RAM beyond this limit requires programming and hardwaretricks. You may have to do this "by hand" since many compilers andassemblers, while providing support for programs in excess of 64k, donot support more than 64k of RAM. This is rather strange since it has

been my experience that programs can usually fit in 64k but oftenRAM is what is lacking. Thus if you need more than 64k of RAM,check to see if your compiler supports it-- but if it doesn't, be preparedto do it by hand.

On-Chip Memory

As mentioned at the beginning of this chapter, the 8051 includes a certainamount of on-chip memory. On-chip memory is really one of two types: InternalRAM and Special Function Register (SFR) memory. The layout of the 8051'sinternal memory is presented in the following memory map:

As is illustrated in this map, the 8051 has a bank of 128 bytes of Internal RAM.This Internal RAM is found on-chip on the 8051 so it is the fastest RAM available,and it is also the most flexible in terms of reading, writing, and modifying itscontents. Internal RAM is volatile, so when the 8051 is reset this memory is

cleared.

The 128 bytes of internal ram is subdivided as shown on the memory map. Thefirst 8 bytes (00h - 07h) are "register bank 0". By manipulating certain SFRs, aprogram may choose to use register banks 1, 2, or 3. These alternative registerbanks are located in internal RAM in addresses 08h through 1Fh. We'll discuss"register banks" more in a later chapter. For now it is sufficient to know that they"live" and are part of internal RAM.


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Bit Memory also lives and is part of internal RAM. We'll talk more about bitmemory very shortly, but for now just keep in mind that bit memory actuallyresides in internal RAM, from addresses 20h through 2Fh.

The 80 bytes remaining of Internal RAM, from addresses 30h through 7Fh, may

be used by user variables that need to be accessed frequently or at high-speed.This area is also utilized by the microcontroller as a storage area for theoperating stack. This fact severely limits the 8051s stack since, as illustrated inthe memory map, the area reserved for the stack is only 80 bytes--and usually itis less since this 80 bytes has to be shared between the stack and uservariables.

Micro Controller assignment

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