IIUM ELECTRONICS ECE 1231 MID-TERM EXAMINATION SEMESTER III, 2008/2009 SESSION
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Transcript of IIUM ELECTRONICS ECE 1231 MID-TERM EXAMINATION SEMESTER III, 2008/2009 SESSION
2Midterm Examination Semester III 2009/2010
INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIAMID-TERM EXAMINATION
SEMESTER III, 2009/2010 SESSIONKULLIYYAH OF ENGINEERING
Course Code: ECE 1231 Course Title: Electronics
Time
: 8:00 - 9:30 pm Date: 25-May-2010Duration: 1 Hour 30 MinutesINSTRUCTIONS TO CANDIDATESDO NOT OPEN UNTIL YOU ARE ASKED TO DO SO
Do not use your own sheet.
A total mark of this examination is 60.
This examination is worth 30% of the total assessment. Answer ALL questions.Any form of cheating or attempt to cheat is a serious offence which may lead to dismissal.Question 1Question 2Question 3Total Marks
Marks20202060
Marks Obtained
Q.1 [20 marks](a) Consider a pn junction at K in which A and . Find the forward-bias voltage to produce a current of 150 A. (5 marks)(b) Determine the intrinsic carrier concentration in Germanium at T = 450K. Also calculate the built-in voltage for a Germanium pn junction, if Na = 1015 cm-3 in the p-region and Nd = 1018 cm -3 in the n-region, given that Boltzmans constant k = 86 x 10 -6, coefficient for Germanium B = 1.66 x 1015 cm -3K-3/2 and Eg = 0.66 eV. (9 marks)
(c) In the voltage regulator circuit in Fig. 1(c), V, V, , and . Determine , , and . (6 marks)
Fig. 1(c)Q.2 [20 marks](a) The output current of a pn junction diode used as a solar cell can be expressed as
A
The short-circuit current is defined as ISC = ID when VD = 0 and the open-circuit voltage is defined as VOC = VD when ID = 0. Calculate the values of ISC and VOC.(6 marks)
(b) A silicon pn junction at T = 300 K is doped at Nd = 1015 cm-3 and Na = 1018 cm-3. The zero-bias junction capacitance is Cjo = 0.25 pF. Find the junction capacitance, Cj. When an inductance of 2.5 mH is placed across the pn junction, resonance occurs at fr = . Calculate the resonance frequency, fr if VR = 1 V. (8 marks)(c) Consider the circuit in Fig. 2(c). The output of a diode OR logic gate is connected to the input of a second diode OR logic gate. Assume for each diode. Determine the output and for: (i) ; (ii) V, V; and (iii) V.
(6 marks)
Fig. 2(c)Q.3 [20 marks](a) Fig. 3(a) shows a full-wave rectifier circuit with an input supply frequency of 50 Hz. The rms value of vs = 10.5 V. Assume each diode turn-on voltage V = 0.6 V. What is the maximum value of Vo? If output resistor R = 160 , determine the value of the filter capacitor so that the ripple voltage is not more than 0.35 V. (12 marks)
Fig. 3(a)(b) For the diode clipper circuit in Fig. 3(b), plot versus time over two periods for sinusoidal input signal. Assume vI = 15 sin t, VB1 = 5 V, vB2 = 3 V and V = 0 for each diode. (8 marks)
Fig. 3(b)
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