DIGITAL LOGIC DESIGN

BY, KSVKSRIKANTH

Table of Contents          Chapter 1   -     Introduction to Digital Concepts

        Chapter 2     -   Number System and Codes

        Chapter 3   -   Logic Gates

        Chapter 4   -   Boolean Algebra

        Chapter 5   -   Combinational logic circuit Design

        Chapter 6   -   Sequential logic Circuit Design

        Chapter 7     - Registers and Counters

DIGITAL LOGIC DESIGN

Chapter 1: Introduction to digital concepts

1-1 Numerical Representations

1-2 Advantages and Limitations of Digital Techniques

1-3 Digital Number System

1-4 Representing Binary Quantities

1-5 Floating Point Representation

1.1 Numerical Presentation

 In science, technology, business, and, in fact, most other fields of endeavor, we are constantly dealing with quantities. Quantities are measured, monitored, recorded, manipulated arithmetically, observed, or in some other way utilized in most physical systems. It is important when dealing with various quantities that we be able to represent their values efficiently and accurately. There are basically two ways of representing the numerical value of quantities: analog and digital.

Analog Representation

In analog representation a quantity is represented by a voltage, current, or meter movement that is proportional to the value of that quantity. Analog quantities such as those cited above have an important characteristic: they can vary over a continuous range of values.

 Below is a diagram of analog voltage vs time:

 

Digital Representation

In digital representation the quantities are represented not by proportional quantities but by symbols called digits. As an example, consider the digital watch, which provides the time of day in the form of decimal digits which represent hours and minutes (and sometimes seconds). As we know, the time of day changes continuously, but the digital watch reading does not change continuously; rather, it changes in steps of one per minute (or per second). In other words, this digital representation of the time of day changes in discrete steps, as compared with the representation of time provided by an analog watch, where the dial reading changes continuously.

Below is a diagram of digital voltage vs time:

 The major difference between analog and digital quantities, then, can be simply stated as follows:

Analog=continuous Digital = discrete (step by step)  

1.2 Advantages and Limitations of Digital Techniques

Advantages

Easier to design. Exact values of voltage or current are not important, only the range (HIGH or LOW) in which they fall.

Information storage is easy. Accuracy and precision are greater. Operation can be programmed. Analog systems can also be programmed, but

the variety and complexity of the available operations is severely limited. Digital circuits are less affected by noise. As long as the noise is not large

enough to prevent us from distinguishing a HIGH from a LOW. More digital circuitry can be fabricated on IC chips.

Limitations

There is really only one major drawback when using digital techniques:

The real world is mainly analog. Most physical quantities are analog in nature, and it is these quantities that are often the inputs and outputs that are being monitored, operated on, and controlled by a system.

To take advantage of digital techniques when dealing with analog inputs and outputs, three steps must be followed:

1. Convert the real-world analog inputs to digital form. (ADC)2. Process (operate on) the digital information.3. Convert the digital outputs back to real-world analog form. (DAC)

The following diagram shows a temperature control system that requires analog/digital conversions in order to allow the use of digital processing techniques.

1.3 Digital Number System

Many number systems are in use in digital technology. The most common are the decimal, binary, octal, and hexadecimal systems. The decimal system is clearly the most familiar to us because it is a tool that we use every day. Examining some of its characteristics will help us to better understand the other systems.

 Decimal System

Decimal System The decimal system is composed of 10 numerals or symbols. These 10 symbols are 0, 1, 2, 3, 4, 5, 6, 7, 8, 9; using these symbols as digits of a number, we can express any quantity. The decimal system, also called the base-10 system because it has 10 digits.

103 102 101 100   10-1 10-2 10-3

=1000 =100 =10 =1 . =0.1 =0.01 =0.001

Most Significant Digit

     Decimal point

   Least Significant Digit

Binary System

In the binary system, there are only two symbols or possible digit values, 0 and 1. This base-2 system can be used to represent any quantity that can be represented in decimal or other number system.

23 22 21 20   2-1 2-2 2-3

=8 =4 =2 =1 . =1/2 =1/4 =1/8

Most Significant Bit

     Binary point

    Least Significant Bit

 Binary Counting

The Binary counting sequence is shown in the table:

 

1.4 Representing Binary Quantities

In digital systems the information that is being processed is usually presented in binary form. Binary quantities can be represented by any device that has only two operating states or possible conditions. Eg. a switch has only open or closed. We arbitrarily (as we define them) let an open switch represent binary 0 and a closed switch represent binary 1. Thus we can represent any binary number by using series of switches.

Typical Voltage Assignment

Binary 1: Any voltage between 2V to 5VBinary 0: Any voltage between 0V to 0.8VNot used: Voltage between 0.8V to 2V, this may cause error in a digital circuit.

 

We can see another significant difference between digital and analog systems. In digital systems, the exact value of a voltage is not important; eg, a voltage of 3.6V means the same as a voltage of 4.3V. In analog systems, the exact value of a voltage is important.

1-5 Floating point Representation

Floating Point Numbers

A real number or floating point number is a number which has both an integer and fractional part. Examples for real real decimal numbers are 123.45, 0.1234, -0.12345, etc. Examples for a real binary numbers are 1100.1100, 0.1001, -1.001, etc. In general, floating point numbers are expressed in exponential notation.

For example the decimal number 30000.0 can be written as 3 x 104 , 312.45 can be written as 3.1245 x 102.

Similarly, the binary number 1010.001 can be written as 1.010001 x 103.

The general form of a number N can b expressed as

N = ± m x b±e

Where m is mantissa, b is the base of number system and e is the exponent. A floating point number is represented by two parts. The first part, called mantissa, of the number is a signed fixed point number and the second part, called exponent, specifies the decimal or binary position.

Binary Representation of Floating Point Numbers

A floating point binary number is also represented as in the case of decimal numbers. That's means the mantissa and exponent are expressed using signed magnitude notation in which one bit is reserved for sign bit.

Consider a 16-bit word is used to store the floating point numbers, Assume that the 9 bits are reserved for mantissa and 7-bits for exponent and also assume that the mantissa part is represented in fraction system. That implies, the assumed binary point is immediate right of sign bit of mantissa.

Example

A binary number 1101.01 is represented as

Mantissa = 110101 (1101.01)2 = 0.110101 X 24

Exponent = (4)10  Expand mantissa to 8 bits we get , 11010100Binary representation of exponent (4)10 = 000100

 

DIGITAL LOGIC DESIGN

Chapter 2: Number   Systems and Codes 2-1   Binary-to-Decimal Conversion

2-2    Decimal-to-Binary Conversion

2-3    Octal Numbers

2-4    Hexadecimal Number System

2-5    Binary codes-BCD, Gray, ASCII, EBCDIC Error detection codes

2-6 Binary numbers Addition, Multiplication and Subtraction

2.1 Binary-To-Decimal Conversion

Introduction

The binary number system is the most important one in digital systems, but several others are also important. The decimal system is important because it is universal used to represent quantities outside a digital system. This means that there will be situations where decimal values have to be converted to binary values before they are entered into the digital system.

In additional to binary ans decimal, two other number systems find wide-spread applications in digital systems. The octal (base-8) and hexadecimal (base-16) number systems are both used for the same purpose- to provide an efficient means for representing large binary system.

This chapter will show you how to perform these conversions.

Any binary number can be converted to its decimal equivalent simply by summing together the weights of the various positions in the binary number which contain a 1.

1 1 0 1 1 2 (binary)24+23+0+21+20 = 16+8+0+2+1  = 2710 (decimal)

and

1 0 1 1 0 1 0 1 2 (binary)27+0+25+24+0+22+0+20 = 128+0+32+16+0+4+0+1  = 18110 (decimal)

 

You should noticed the method is find the weights (i.e., powers of 2) for each bit position that contains a 1, and then to add them up.

2.2 Decimal-To-Binary Conversion

 There are 2 methods:

(A) Reverse of Binary-To-Digital Method

45 10= 32 + 0 + 8 + 4 +0 + 1 = 25+0+23+22+0+20

  = 1 0 1 1 0 12

(B) Repeat Division

This method uses repeated division by 2. Eg. convert 2510 to binary

25/ 2 = 12+ remainder of 1 1 (Least Significant Bit)12/ 2 = 6 + remainder of 0 06 / 2 = 3 + remainder of 0 03 / 2 = 1 + remainder of 1 11 / 2 = 0 + remainder of 1 1 (Most Significant Bit)Result 2510 = 1 1 0 0 12

The Flow chart for repeated-division method is as follow:          

2.3 Octal Number System:  The octal number system has a base of eight, meaning that it has eight possible digits: 0,1,2,3,4,5,6,7.  

83 82 81 80   8-1 8-2 8-3

=512 =64 =8 =1 . =1/8 =1/64 =1/512

Most Significant Digit

     Octal point

   Least Significant Digit

Octal to Decimal Conversion

eg. 24.68 = 2 x (81) + 4 x (80) + 6 x (8-1) = 20.7510

 Binary-To-Octal / Octal-To-Binary Conversion

Octal Digit 0 1 2 3 4 5 6 7

Binary Equivalent 000 001 010 011 100 101 110 111

Each Octal digit is represented by three bits of binary digit.

eg. 100 111 0102 = (100) (111) (010)2 = 4 7 28

  Repeat Division

This method uses repeated division by 8. Eg. convert 17710 to octal and binary:177/8 = 22+ remainder of 1 1 (Least Significant Bit)22/ 8 = 2 + remainder of 6 62 / 8 = 0 + remainder of 2 2 (Most Significant Bit)Result 17710 = 2618

  Convert to Binary = 0101100012

2.5 Binary codes-BCD, Gray, ASCII, EBCDIC Error detection codes: Binary Coded Decimal° Binary coded decimal (BCD) represents each decimal digit with four bits• Ex. 0011 0010 1001 = 32910

            3       2        9° This is NOT the same as 0011001010012

° Why do this? Because people think in decimal.  0000   0  0001   1

  0010   2  0011   3  0100   4  0101   5   0110   6   0111   7   1000   8   1001   9

Putting It All Together DECIMAL BINARY OCTAL HEXADECIMAL BCD0 0 0 0 00001 1 1 1 00012 10 2 2 00103 11 3 3 00114 100 4 4 01005 101 5 5 01016 110 6 6 01107 111 7 7 01118 1000 10 8 10009 1001 11 9 100110 1010 12 A 101011 1011 13 B 101112 1100 14 C 110013 1101 15 D 110114 1110 16 E 111015 1111 17 F 1111° BCD not very efficient° Used in early computers (40s, 50s)° Used to encode numbers for seven segment displays.° Easier to read?

Gray Code° Gray code is not a number system.• It is an alternate way to represent four bit data° Only one bit changes from one decimal digit to the next° Useful for reducing errors in communication.

° Can be scaled to larger numbers. 

DECIMAL NUMBERS

BINARY GRAY CODE

0 0000 00001 0001 00012 0010 00113 0011 00104 0100 01105 0101 01116 0110 01017 0111 01008 1000 11009 1001 110110 1010 111111 1011 111012 1100 101013 1101 101114 1110 100115 1111 1000

  ASCII Code° American Standard Code for Information Interchange° ASCII is a 7-bit code, frequently used with an 8th bit for error detection (more about that in a bit).                             ° ASCII Codes° A – Z (26 codes), a – z (26 codes)° 0-9 (10 codes), others (@#$%^&*….)° Transmission susceptible to noise° Typical transmission rates (1500 Kbps, 56.6 Kbps)° How to keep data transmission accurate?

Parity Codes (Error detection codes)

° Parity codes are formed by concatenating a parity bit, P to each code word of C.° In an odd-parity code, the parity bit is specified so that the total number of ones is odd.° In an even-parity code, the parity bit is specified so that the total number of ones is even.                                         

                                                                        

p Information Bits                                  1 1 0 0 0 0 1 1                                                                                                                                 Added even parity bit  0 1 0 0 0 0 1 1 Added odd parity bitParity Code Example° Concatenate a parity bit to the ASCII code for the characters 0, X, and = to produce both odd-parity and even-parity codes. 

Character 

ASCII 

Odd-ParityASCII  

Even-ParityASCII 

0 0110000 10110000 00110000X 1011000 01011000 11011000= 0111100 10111100 00111100  Binary Data Storage• Binary cells store individual bits of data• Multiple cells form a register.• Data in registers can indicate different values• Hex (decimal)• BCD• ASCII Binary Cell0 0 1 0 1 0 1 1 Register Transfer° Data can move from register to register.° Digital logic used to process dataRegister A Register BRegister C

2.6 Binary numbers Addition, Multiplication, and Subtraction Binary Addition° Binary addition is very simple.° This is best shown in an example of adding twoBinary numbers…1 1 1 1 1 1     carries   1 1 1 1 0 1  + 1 0 1 1 1---------------------1 0 1 0 1 0 0--------------------- Binary Subtraction° We can also perform subtraction (with borrows in place of carries).° Let’s subtract (10111)2 from (1001101)2…       1     10   0 10 10 0 0 10        borrows    1  0 0  1 1  0  1-       1  0 1  1  1------------------------      1 1  0 1  1  0------------------------   Binary Multiplication ° Binary multiplication is much the same as decimal multiplication, except that the multiplication operations are much simpler…  1 0 1 1 1X   1 0 1 0         ( Multiplication) -----------------------      0 0 0 0 0    1 0 1 1 1  0 0 0 0 0

1 0 1 1 1-----------------------1 1 1 0 0 1 1 0-----------------------

 

DIGITAL LOGIC DESIGN

Chapter - 3: Logic gates3-1   Boolean Variables & Truth Tables

3-2   OR Operation

3-3   AND Operation

3-4   NOT Operation

3-5   NOR Operation

3-6   NAND Operation

3.7     XOR Operation gates

3.8   XNOR Operation gates

3.1 Boolean Variables & Truth Tables

Boolean algebra differs in a major way from ordinary algebra in that Boolean constants and variables are allowed to have only two possible values, 0 or 1.

Boolean 0 and 1 do not represent actual numbers but instead represent the state of a voltage variable, or what is called its logic level.

Some common representation of 0 and 1 is shown in the following diagram.

Logic 0 Logic 1

False True

Off On

Low High

No Yes

Open Switch Close Switch

In Boolean algebra, there are three basic logic operations: OR, AND and NOT.These logic gates are digital circuits constructed from diodes, transistors, and resistors connected in such a way that the circuit output is the result of a basic logic operation (OR, AND, NOT) performed on the inputs.

Gate Delay Real gates have delay. In other words, if you change the value of the inputs, say from 0 and 0 to 0 and 1, then the output takes some small amount of time before it changes. This delay is called gate delay.

This delay is due to the fact that information can travel at most, the speed of light, and in reality, the time it takes to do the computation is not infinitely quick.

This delay limits how fast the inputs can change and yet the output have meaningful values. It also allows certain kinds of circuits to be created that don't follow the rules from the previous section. In particular, flip flops (to be discussed later) can be generated from gates that use cycles.

Truth Table

A truth table is a means for describing how a logic circuit's output depends on the logic levels present at the circuit's inputs.

In the following two-inputs logic circuit, the table lists all possible combinations of logic levels present at inputs A and B along with the corresponding output level X.

                      

When either input A OR B is 1, the output X is 1. Therefore the "?" in the box is an OR gate.

3.2 OR Operation:

The expression X = A + B reads as "X equals A OR B".

The + sign stands for the OR operation, not for ordinary addition.

The OR operation produces a result of 1 when any of the input variable is 1.

The OR operation produces a result of 0 only when all the input variables are 0.

            

3.3 AND Operation

The expression X = A * B reads as "X equals A AND B". The multiplication sign stands for the AND operation, same for ordinary multiplication of 1s and 0s.

The AND operation produces a result of 1 occurs only for the single case when all of the input variables are 1.

The output is 0 for any case where one or more inputs are 0

              

               

  An example of three input AND gate and its truth table is as follows:

                  

                              

With the AND operation, 1*1 = 1, 1*1*1 = 1 and so on.

3.4 NOT Operation:

The NOT operation is unlike the OR and AND operations in that it can be performed on a single input variable. For example, if the variable A is subjected to the NOT operation, the result x can be expressed as

x = A'

where the prime (') represents the NOT operation. This expression is read as:

x equals NOT A

x equals the inverse of A

x equals the complement of A

Each of these is in common usage and all indicate that the logic value of x = A' is opposite to the logic value of A.

The truth table of the NOT operation is as follows:

                   

 1' = 0 because NOT 1 is 0

0' = 1 because NOT 0 is 1

The NOT operation is also referred to as inversion or complementation, and these terms are used interchangeably.

3.5 NOR Operation:

NOR and NAND gates are used extensively in digital circuitry. These gates combine the basic operations AND, OR and NOT, which make it relatively easy to describe then using Boolean Algebra.

NOR is the same as the OR gate symbol except that it has a small circle on the output. This small circle represents the inversion operation. Therefore the output expression of the two input NOR gate is:

X = ( A + B )'

                         

                              

An example of three input OR gate can be constructed by a NOR gate plus a NOT gate:

                               

3.6 NAND Operation:

NAND is the same as the AND gate symbol except that it has a small circle on the output. This small circle represents the inversion operation. Therefore the output expression of the two input NAND gate is:

X = ( AB )'

                       

                        

3.7 XOR Operation gates:  XOR gates have two bits of input and a single bit of output.

The output of XOR gate is 1 only if the inputs have opposite values. That is, when one input has value 0, and the other has value 1.. Otherwise, the output is 0.

This is called exclusive-or. The definition of OR2 is inclusive-or, where the output is 1 if either input is 1, or if both inputs are 1.

XOR can be defined using AND, OR, and NOT.

x XOR y == ( x AND (NOT y) ) OR ( (NOT x) AND y ) == x\y + y\x

Here's a diagram of the XOR gate.

                                              

If you look carefully at the drawing of the gate, there is a second arc behind the first one near the inputs. Since this second arc is hard to see, it's usually a good idea to write the word "XOR" inside the gate.

The truth table defines the behavior of this gate.                                  

  x1     x0     z  

0 0 0

0 1 1

1 0 1

1 1 0

The function implemented by XOR gates has interesting properties:

The function is symmetric. Thus, x (+) y == y (+) x. This can be verified by using truth tables. (We use (+) to denote logical XOR--ideally, we'd draw it with a + sign inside a circle, but HTML doesn't seem to have a symbol for this).

The function is associative. Thus, [ x (+) y ] (+) z == x (+) [ y (+) z ]. This can be verified by using truth tables.

3.8 XNOR Operation gates : XNOR2 gates have two bits of input and a single bit of output.

                                       

The output of XNOR gate is the negation of XOR2 and has 1 when both inputs are the same.

If you look carefully at the drawing of the gate, there is a second arc behind the first one near the inputs. Since this second arc is hard to see, it's usually a good idea to write the word "XNOR" inside the gate.

The truth table defines the behavior of this gate.

   x1     x0     z  

0 0 0

0 1 1

1 0 1

1 1 0

The function implemented by XNOR gates has interesting properties:

The function is symmetric. Thus, x XNOR y == y XNOR x. This can be verified by using truth tables.

The function is associative. Thus, (x XNOR y) XNOR z == x XNOR (y XNOR z). This can be verified by using truth tables.

DIGITAL LOGIC DESIGN

Chapter -4: Boolean Algebra 4-1   Describing Logic Circuits Algebraically

4-2   Evaluating Logic Circuit Outputs

4-3   Implementing Circuits from Boolean Expression

4-4   Boolean Theorems

4-5   DeMorgan's Theorems

4-6   Boolean function simplification &Canonical forms                                           4-7   K-Map (Karnaugh maps )Rules and Simplification          4.8 Rules for Tabular method (Quine Mc Cluskey method) 4.9   Realization of above Boolean   expression   using logic gates

4-10   Universality of NAND and NOR Gates

4-11   Alternate Logic-Gate Representations

4-12   Logic Symbol Interpretation

4.1 Describing Logic Circuits Algebraically:

 Any logic circuit, no matter how complex, may be completely described using the Boolean operations, because the OR gate, AND gate, and NOT circuit are the basic building blocks of digital systems.  

This is an example of the circuit using Boolean expression:

                                  

 

If an expression contains both AND and OR operations, the AND operations are performed first (X=AB+C : AB is performed first), unless there are parentheses in the expression, in which case the operation inside the parentheses is to be performed first (X=(A+B)+C : A+B is performed first).

 

Circuits containing Inverters

Whenever an INVERTER is present in a logic-circuit diagram, its output expression is simply equal to the input expression with a prime (') over it.

                        

4.2 Evaluating Logic Circuit Outputs:

 Once the Boolean expression for a circuit output has been obtained, the output logic level can be determined for any set of input levels.  This are two examples of the evaluating logic circuit output:

Let A=0, B=1, C=1, D=1

X = A'BC (A+D)'  = 0'*1*1* (0+1)'  = 1 *1*1* (1)'  = 1 *1*1* 0  = 0

 Let A=0, B=0, C=1, D=1, E=1

X = [D+ ((A+B)C)'] * E  = [1 + ((0+0)1 )'] * 1  = [1 + (0*1)'] * 1  = [1+ 0'] *1  = [1+ 1 ] * 1  = 1 

In general, the following rules must always be followed when evaluating a Boolean expression:

1. First, perform all inversions of single terms; that is, 0 = 1 or 1 = 0.

2. Then perform all operations within parentheses.

3. Perform an AND operation before an OR operation unless parentheses indicate otherwise.4. If an expression has a bar over it, perform the operations of the expression first and then invert the result.

 Determining Output Level from a Diagram

The output logic level for given input levels can also be determined directly from the circuit diagram without using the Boolean expression.

                       

                       

4.3 Implementing Circuits From Boolean Expression:

 If the operation of a circuit is defined by a Boolean expression, a logic-circuit diagram can he implemented directly from that expression.

Suppose that we wanted to construct a circuit whose output is y = AC+ BC' + A'BC. This Boolean expression contains three terms (AC, BC', A'BC), which are OR ed together. This tells us that a three-input OR gate is required with inputs that are equal to AC, BC', and A'BC, respectively.

Each OR-gate input is an AND product term, which means that an AND gate with appropriate inputs can be used to generate each of these terms. Note the use of Inverters to produce the A' and C' terms required in the expression.

                 

4.4 Boolean Theorems:

Investigating the various Boolean theorems (rules) can help us to simplify logic expressions and logic circuits.

 

Multivariable Theorems:

The theorems presented below involve more than one variable:

(9) x + y = y + x (commutative law)(10) x * y = y * x (commutative law)(11) x+ (y+z) = (x+y) +z = x+y+z (associative law)(12) x (yz) = (xy) z = xyz (associative law)(13a) x (y+z) = xy + xz(13b) (w+x)(y+z) = wy + xy + wz + xz(14) x + xy = x [proof see below](15) x + x'y = x + y

Proof of (14)

x + xy = x (1+y)  = x * 1 [using theorem (6)]  = x [using theorem (2)] Duality° The principle of duality is an important concept. This says that if an expression is valid in Boolean algebra, the dual of that expression is also valid.° To form the dual of an expression, replace all + operators with. Operators, all. operators with + operators, all ones with zeros, and all zeros with ones.° Form the dual of the expression a + (bc) = (a + b)(a + c)° Following the replacement rules… a(b + c) = ab + ac° Take care not to alter the location of the parentheses if they are present.   Involution° This theorem states: a’’ = a° Remember that aa’ = 0 and a+a’=1.• Therefore, a’ is the complement of a and a is also the complement of a’.• As the complement of a’ is unique, it follows that a’’=a.° Taking the double inverse of a value will give the initial value. Absorption° This theorem states: a + ab = a       a(a+b) = a° To prove the first half of this theorem: a + ab = a . 1 + ab= a (1 + b)= a (b + 1)= a (1)a + ab= a

4.5 De Morgan's Theorem:

DeMorgan's theorems are extremely useful in simplifying expressions in which a product or sum of variables is inverted. The two theorems are:

(16) (x+y)' = x' * y'

(17) (x*y)' = x' + y'

Theorem (16) says that when the OR sum of two variables is inverted, this is the same as inverting each variable individually and then AND ing these inverted variables.

Theorem (17) says that when the AND product of two variables is inverted, this is the same as inverting each variable individually and then OR ing them.

Example

X = [(A'+C) * (B+D')]'  = (A'+C)' + (B+D')' [by theorem (17)]  = (A''*C') + (B'+D'') [by theorem (16)]  = AC' + B'D

Three Variables DeMorgan's Theorem

(18) (x+y+z)' = x' * y' * z'

(19) (xyz)' = x' + y' + z'

Implications of DeMorgan's Theorem

For (16): (x+y)' = x' * y'

                               

For (17): (x*y)' = x' + y'

                                     

4.6 Boolean function simplification Canonical forms: Minterms and Maxterms:Overview° Expressing Boolean functions° Relationships between algebraic equations, symbols, and truth tables° Simplification of Boolean expressions°Canonical forms: Minterms and Maxterms° AND-OR representations

• Product of sums• Sum of products

Boolean Functions° Boolean algebra deals with binary variables and logic operations.° Function results in binary 0 or 1

F = x(y+z’) , Given algebraic equation  equation implemented with circuit diagram and  truth table 

                                      TRUTH TABLEX Y Z F0 0 0 00 0 1 00 1 0 00 1 1 01 0 0 11 0 1 01 1 0 11 1 1 1

 Boolean Functions° Boolean algebra deals with binary variables and logic operations.° Function results in binary 0 or 1EX: G = xy +yz   Implement with logic circuit diagram and truth table

   XYZ XY Yz G=xy+yz000 0 0 0001 0 0 0010 0 0 0011 0 1 1100 0 0 0101 0 0 0110 1 0 1111 1 1 1 We will learn how to transition between equation, symbols, and truth table.  Representation Conversion° Need to transition between Boolean expression, truth table, and circuit (symbols).° Converting between truth table and expression is easy.° Converting between expression and circuit is easy.° More difficult to convert to truth table.

  Truth Table to Expression° Converting a truth table to an expression• Each row with output of 1 becomes a product term• Sum product terms together. 

  xyz + xyz’ + x’yz Any Boolean Expression can be represented in sum of products form! Equivalent Representations of Circuits° All three formats are equivalent° Number of 1’s in truth table output column equals AND terms for Sum-of-Products (SOP) G = xyz + xyz’ + x’yz

 Reducing Boolean Expressions

X Y Z G0 0 0 00 0 1 00 1 0 00 1 1 01 0 0 1

1 0 1 01 1 0 1

1 1 1 1

° Is this the smallest possible implementation of this expression? No!° Use Boolean Algebra rules to reduce complexity while preserving functionality.° Step 1: Use Theorem 1 (a + a = a)

• So xyz + xyz’ + x’yz = xyz + xyz + xyz’ + x’yz° Step 2: Use distributive rule a(b + c) = ab + ac

• So xyz + xyz + xyz’ + x’yz = xy(z + z’) + yz(x + x’)° Step 3: Use Postulate 3 (a + a’ = 1)

• So xy(z + z’) + yz(x + x’) = xy.1 + yz.1° Step 4: Use Postulate 2 (a . 1 = a)

• So xy.1 + yz.1 = xy + yz = xyz + xyz’ + x’yzG = xyz + xyz’ + x’yzReduced Hardware Implementation° Reduced equation requires less hardware!° Same function implemented! 

X Y Z G0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1

  

 G = xyz + xyz’ + x’yz = xy + yz Minterms and Maxterms° Each variable in a Boolean expression is a literal° Boolean variables can appear in normal (x) or complement form (x’)° Each AND combination of terms is a minterm

° Each OR combination of terms is a maxtermFor example:Mintermsx y z               Minterm0 0 0              x’y’z’       m00 0 1              x’y’z        m1------                -----         ---1 0 0              xy’z’        m4-------1 1 1              xyz         m7 For example:Maxtermsx y z             Maxterm0 0 0            x+y+z M00 0 1            x+y+z’ M1…1 0 0            x’+y+z M4…1 1 1           x’+y’+z’ M7 Representing Functions with Minterms° Minterm number same as row position in truth table (starting from top from 0)° Shorthand way to represent functions 

 X Y Z G0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1

 G=xyz +xyz’ +x’yzG = m7 + m6 + m3 = Σ(3, 6, 7) 

 Complementing Functions° Minterm number same as row position in truth table (starting from top from 0)° Shorthand way to represent functions 

X Y Z G G’0 0 0 0 10 0 1 0 10 1 0 0 10 1 1 1 01 0 0 0 11 0 1 0 11 1 0 1 01 1 1 1 0

 G=xyz +xyz’ +x’yzG’ = (xyz + xyz’ + x’yz)’ = G’ Can we find a simpler representation? Complementing Functions° Step 1: assign temporary names

• b + c -> z                                          G = a + b + c• (a+ z)’ = G’                                       G’ = (a + b + c)’

° Step 2: Use DeMorgans’ Law• (a + z)’ = a’ . z’

° Step 3: Re substitute (b+c) for z• a’ . z’ = a’ . (b + c)’

° Step 4: Use DeMorgans’ Law               G = a + b + c• a’ . (b + c)’ = a’ . (b’. c’)                              G’ = a’ . b’ . c’ = a’b’c’

° Step 5: Associative rule• a’ . (b’. c’) = a’ . b’ . c’

                                                            Complementation Example° Find complement of F = x’z + yz

• F’ = (x’z + yz)’° DeMorgan’s

• F’ = (x’z)’ (yz)’° DeMorgan’s

• F’ = (x’’+z’) (y’+z’)° Reduction -> eliminate double negation on x

• F’ = (x+z’) (y’+z’)This format is called product of sums Conversion Between Canonical Forms° Easy to convert between minterm and maxterm representations° For maxterm representation, select rows with 0’s 

                                   G = xyz + xyz’ + x’yz                                    G = m7 + m6 + m3 = Σ(3, 6, 7)                                    G = M0M1M2M4M5 = Π(0,1,2,4,5)                                    G = (x+y+z)(x+y+z’)(x+y’+z)(x’+y+z)(x’+y+z’)

4-7   K-Map (Karnaugh maps )Rules and Simplification:  Minimization with Karnaugh Maps Overview° K-maps: an alternate approach to representing Boolean functions° K-map representation can be used to minimize Boolean functions° Easy conversion from truth table to K-map to minimized SOP representation.° Simple rules (steps) used to perform minimization° Leads to minimized SOP representation.

• Much faster and more more efficient than previous minimization techniques with Boolean algebra.• All rows of truth table represented with a square• Each square represents a minterm

° Easy to convert between truth table, K-map, and SOP• Unoptimized form: number of 1’s in K-map equals number of minterms (products) in SOP• Optimized form: reduced number of minterms

X Y Z G0 0 0 0 0 0 1 00 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1

Karnaugh Maps - Rules of SimplificationThe Karnaugh map uses the following rules for the simplification of expressions by grouping together adjacent cells containing ones

Groups may not include any cell containing a zero

                  Groups may be horizontal or vertical, but not diagonal.

                   Groups must contain 1, 2, 4, 8, or in general 2n cells.

That is if n = 1, a group will contain two 1's since 21 = 2. If n = 2, a group will contain four 1's since 22 = 4.

              

Each group should be as large as possible.

                Each cell containing a one must be in at least one group.

            Groups may overlap.

             Groups may wrap around the table. The leftmost cell in a row may be grouped with the

rightmost cell and the top cell in a column may be grouped with the bottom cell.

         

There should be as few groups as possible, as long as this does not contradict any of the previous rules.

          Summary:

1. No zeros allowed. 2. No diagonals. 3. Only power of 2 number of cells in each group.

4. Groups should be as large as possible. 5. Every one must be in at least one group.

6. Overlapping allowed. 7. Wrap around allowed.

8. Fewest number of groups possible.

Karnaugh MapsA Karnaugh map is an array containing 2k cells where k is the number of variables in the DNF expression to be minimized.  Each cell of the Karnaugh map corresponds to one row of the truth table, or one assignment of truth values to the variables of the expression.  The cells of a Karnaugh map are arranged so that conjunctions which differ on only one variable are adjacent to each other.

2-Variable Karnaugh MapsA 2-variable Karnaugh map has four cells.  The map looks like this:

                                  The cells on the top row represent the conjunctions (x and y) and (not x and y).  The cells on the bottom row represent (x and not y) and (not x and not y).

When given a DNF to be minimized, put a 1 in each cell of the Karnaugh map for which there is a conjunction in the DNF.  Then group the cells into groups which contain a power of two cells; that is, make groups of size 2 or 4.  When we get to larger Karnaugh maps you will be able to make groups of size 8 or 16.  Members of groups must to adjacent to one another either

horizontally or vertically, and groups must be rectangular in shape.  L-shaped groups are not allowed.

Let's use a Karnaugh map to minimize the following DNF:   _   _     _ _ x y + x y + x y

Here is the Karnaugh map with the appropriate 1's placed in cells and then grouped:

The only group that we can make that has the upper right cell in it is the pair in the second column.  And the only group that contains the lower left cell is the pair in the second row.   Note that we can use the lower right cell in both groups.

Once you have grouped cells, you can determine the minimized logical expression.  Each group reduces to one conjunction in the minimized expression.  A group reduces to a conjunction containing just those literals that remain the same for every cell in the group.  For example, the group in the above Karnaugh map that contains the two cells in the second column reduces to the expression "not x" because both of its members have a "not x" in their DNF conjunctions.   The group consisting of both cells in the bottom row reduces to "not y".  Thus the minimized logical expression is

_   _ x + y

3-Variable Karnaugh mapsHere is a 3-variable Karnaugh map:

         In this map, the largest possible group size is 8.  A group of size 8, of course, reduces to true.  We can also make groups of size 4 or 2.  It is important to understand that the leftmost column in this Karnaugh map is considered to be adjacent to the rightmost column.  Thus we can create groups like this one of size 4:

        That group reduces to the expression y.

When grouping 1's, the object is to get every 1 into as large a group as possible.  Sometimes it is not possible to put a cell into a group; in that case, the minimized expression will contain one conjunction for that cell all by itself.  As before, if it helps make larger groups we can put a cell in more than one group.

Use a Karnaugh map to minimize the following DNF:

         _     _ _         _   _ _ _   _   _ x y z + x y z + x y z + x y z + x y z + x y z

Here is the Karnaugh map:

       

The reduced expressions       _   _ _ x z + y + x z

The worst case situation when attempting to minimize a DNF is to end up with a Karnaugh map that looks like a checkerboard.  In such a case, no minimization is possible.

4-Variable Karnaugh MapsA 4-variable Karnaugh map looks like this:

       In a map of this size, we can have groups of size 16, 8, 4, or 2. You must realize that the leftmost column is considered to be adjacent to the rightmost column and that the top row is adjacent to the bottom row.  Here are some 4-variable Karnaugh maps and the resulting

Chapter 5 – Combinational logic circuit Design5.1     Overview

5.2     Half Adder and Full Adder

5.3     Code converters         5.4     BCD to Seven Segment Display decoder  5.5     Exclusive-OR and Exclusive-NOR Circuits                           5.6     Decoders and Encoders          5.7     Multiplexers Demultiplexers

 5.8     Multilevel NAND   and NOR gates  

5.1 Overview       ° Addition and subtraction of binary data is fundamental      • Need to determine hardware implementation      ° Represent inputs and outputs      • Inputs: single bit values, carry in       • Outputs: Sum, Carry      ° Hardware features      • Create a single-bit adder and chain together      ° Same hardware can be used for addition and subtraction with minor changes      ° Dealing with overflow      • What happens if numbers are too big?

5.2 Half Adder and Full Adder Half Adder

At this point it would be useful to review the section on Binary Addition.A half adder performs a relatively simple task. It takes in two 1-bit numbers, and adds them. If the digit is supposed to be a 1 then the input is on (as is standard in all these devices). It has two outputs: 

A0   B0 S0 C10       0 0 00       1 1 01      0 1 01      1 0 1

 

From figure

As we can see the truth table given for this has a direct link to the rules for adding Binary numbers. The implementation of a Half Adder from basic logic elements is very easy to work out from the Truth Table; we want the sum to be On when either but not both of the inputs are on, and we want a carry when both inputs are on.

Dec     Binary 1       1+1      +1----    ---2       10 Full Adder° Full adder includes carry in CiNotice interesting pattern in Karnaugh map.Half Adders are all right as long as you only want to add single bit numbers. But if we want to add numbers with more than one bit in them then we need a logic element which adds but also has a 'carry in' (Think about it: where does the carry out from each element go to?) So that is why we have the (single bit) Full Adder. The following diagram shows it's Truth Table and it's implementation

  

           

Ci Ai  Bi Si Ci +10   0  0 0 00   0  1 1 00   1  0 1 00   1  1 0 11   0  0 1 01   0  1 0 11   1  0 0 11   1  1 1 1