Design and Implementation of VLSI Systems(EN1600)lecture05

Sherief RedaDivision of Engineering, Brown University

Spring 2008

[sources: Weste/Addison Wesley]

Summary of Terminology• body• diffusion (n/p)• source• drain • well• tap• contact• metal track• via• polysilicon gate length/width• gate oxide• channel

All these structures must obey the dimensions and separation rules dictated by the process fabrication facility

Process design rules

• Design rules change from fab to fab

• Fab examples: IBM, Intel, TI, TSMC, UMC, MOSIS

• Design rules change according to the process technology

Lambda rules

• Feature Size: minimum distance between source and drain of transistor

• Feature size = 2λ (@ 90nm feature size λ=45)

• According to Moore’s Law, how much does the feature size scale by every ~2 years?

Design rules and gate layout

• Lambda rules are conservative

More design rules

More and more design rules

Inverters with taps

Layout of a 3-input NAND gate

Stick diagrams

• No need to be drawn to scale

Pitch of routing tracks

Gate area estimation