Analog Correlator Spectrometer - DTU Electronic …etd.dtu.dk/thesis/193299/oersted_dtu2871.pdf ·...

Analog Correlator Spectrometer

Author: Chen Chen

Supervisors:Prof. Victor Krozer

Asst. Prof.Tom K. Johansen

Technical University of Denmark

A thesis submitted for the degree of

Master of Science

October 2006

ThesisFigs/DTU.eps

Declaration

I declare that this thesis is my own work and effort and that it has not

been submitted anywhere for any award. Information derivedfrom the

published or unpublished work of others has been acknowledged in the

text and a list of references is given.

I would like to dedicate this thesis to my loving parents ...

Acknowledgements

I want to express my appreciation to my supervisor Victor Krozer for his

kind help and guidance in my thesis work.

And I also want to give my thanks to my friends Tang Meng, Marcoand

Boris for their support and encouragement through my thesisstudy.

Abstract

Recently for ultra broadband spectrometers for radio astronomy and chem-

ical recognition. In contrast to other techniques these offer very wide band

operation together with integration capabilities. However, there have been

little work presented around the efficiency of such correlators and their

frequency limitation.

In this thesis, different strategies for the implementation of analog correla-

tors spectrometer are investigated, it seems that bandwidth is a great chal-

lenge for the spectrometer design. Although acousto-optical spectrometer,

digital correlator and so on have some advantages listed in chapter one.

But considering the bandwidth limitation and based on thesediscussions,

analog correlator is chosen as the technology for an ultra wide-band spec-

trometer.

The most important and difficult part in analog correlator design is the

delay stages, active analog delay circuit are chosen to be implemented.

Based on the study of signal processing theory and HBT’s circuit model

in high frequency, It is found that the constant gain and delay time are the

challenges we may meet in the circuit design and some countermeasures

are discussed.

A Gilbert-core multiplier is adopted to realize the multiplication function

in the analog correlator circuit and it is introduced brieflyin Chapter 5.

The prototype circuit’s schematic and simulation result are presented at

last.

Contents

Nomenclature x

1 Introduction 1

1.1 General introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Spectrometer types . . . . . . . . . . . . . . . . . . . . . . . . . . .2

1.2.1 Filter banks . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2.2 Acousto-optical spectrometer(AOS) . . . . . . . . . . . . . .4

1.2.3 Correlator spectrometer . . . . . . . . . . . . . . . . . . . .5

1.2.4 Digital correlator . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2.5 Analog correlator . . . . . . . . . . . . . . . . . . . . . . . . 8

1.2.6 Requirements and selection . . . . . . . . . . . . . . . . . .9

2 Analog Correlator Technology 11

2.1 Correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

2.1.1 Signal and Correlation . . . . . . . . . . . . . . . . . . . . .12

2.1.2 Fourier series and Fourier Transform . . . . . . . . . . . . .15

2.1.3 Power spectrum . . . . . . . . . . . . . . . . . . . . . . . . .19

2.2 Analog Correlator Circuit . . . . . . . . . . . . . . . . . . . . . . . .20

2.2.1 Spectrum’s bandwidth and resolution . . . . . . . . . . . . .20

2.3 Types of delay circuit and selection . . . . . . . . . . . . . . . . .. . 23

2.3.1 Specification . . . . . . . . . . . . . . . . . . . . . . . . . .23

2.3.2 Transmission line in WASP2 . . . . . . . . . . . . . . . . . .24

2.3.3 Delay lines using varactors . . . . . . . . . . . . . . . . . . .24

2.3.4 Distributed MEMS . . . . . . . . . . . . . . . . . . . . . . . 26

2.3.5 Active analog delay . . . . . . . . . . . . . . . . . . . . . . .28

v

CONTENTS

2.3.6 Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

3 Active analog delay circuit 31

3.1 Laplace domain expression of all pass function . . . . . . . .. . . . 31

3.1.1 All-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.1.2 All-pass transfer function . . . . . . . . . . . . . . . . . . . .32

3.2 HBT and its circuit model . . . . . . . . . . . . . . . . . . . . . . . .33

3.2.1 Device introduction and structure . . . . . . . . . . . . . . .33

3.2.2 Device Operation . . . . . . . . . . . . . . . . . . . . . . . .34

3.2.3 HBT Modeling . . . . . . . . . . . . . . . . . . . . . . . . . 38

3.2.4 First order all-pass function realized by HBT . . . . . . .. . 41

3.2.5 Emitter degeneration resistance . . . . . . . . . . . . . . . .43

3.2.6 Miller effect . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

4 Delay Stage Design Consideration 48

4.1 The gain of delay stage . . . . . . . . . . . . . . . . . . . . . . . . .48

4.1.1 DFT and Windows . . . . . . . . . . . . . . . . . . . . . . .48

4.1.2 Nonconstant gain . . . . . . . . . . . . . . . . . . . . . . . .53

4.1.3 Emitter follower . . . . . . . . . . . . . . . . . . . . . . . . 56

4.2 Nonconstant time delay . . . . . . . . . . . . . . . . . . . . . . . . .59

5 Multiplier 67

5.1 Multiplier’s function . . . . . . . . . . . . . . . . . . . . . . . . . . 67

5.2 Bipolar Differential pair . . . . . . . . . . . . . . . . . . . . . . . . . 68

5.3 Gilbert cell multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . 71

6 Analog correlator schematics, simulation and Layout 74

6.1 Circuit Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . .74

6.1.1 Active delay stage . . . . . . . . . . . . . . . . . . . . . . .74

6.1.2 Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

6.1.3 Cascade stages . . . . . . . . . . . . . . . . . . . . . . . . .77

6.2 Simulation results and analyze . . . . . . . . . . . . . . . . . . . . .77

6.2.1 Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

6.2.2 Active delay stages’ simulation and analyze . . . . . . . .. . 78

vi

CONTENTS

6.2.3 Time delay . . . . . . . . . . . . . . . . . . . . . . . . . . .80

6.2.4 Transient simulation . . . . . . . . . . . . . . . . . . . . . .81

6.2.5 Power Consumption . . . . . . . . . . . . . . . . . . . . . .82

6.3 Power spectrum recovery . . . . . . . . . . . . . . . . . . . . . . . .83

6.4 layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

7 Conclusions 89

A High frequency response of emitter follower 91

References 94

vii

List of Figures

1.1 Block diagram of a heterodyne spectrometer . . . . . . . . . . .. . . 1

1.2 Schematic view of Filter banks . . . . . . . . . . . . . . . . . . . . . 3

1.3 Schematic view of Acousto-optical spectrometer (Group(1996)) . . . 4

1.4 Schematic view of Digital correlator . . . . . . . . . . . . . . . .. . 7

1.5 Schematic view of a WASP analog lag correlator segment.(Harris &

Zmuidzinas(2001)) . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1 correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

2.2 Correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

2.3 Schematics of Analog correlator . . . . . . . . . . . . . . . . . . . .21

2.4 Delay lines using Ferroelectric varactor [Dan Kuylenstierna & Spar-

tak Gevorgian(Ericsson AB, Molndal, Sweden)]. . . . . . . . . . . . 26

2.5 Measured (0V[o], 20V[]) and modeled(0V[-], 20V[- -] results of time

delay.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2.6 Periodic structure representation of a DMTL (white: first metal, light

grey: second metal, dark grey: slots, black: anchoring)[Julien Perruisseau-

Carrier & Skrivervik(2006)]. . . . . . . . . . . . . . . . . . . . . . . 28

2.7 Measured and modeled absolute phase shift and differential delay of

the DMTL [Julien Perruisseau-Carrier & Skrivervik(2006)]. . . . . . 29

2.8 active analog delay stage and small signal model [Buckwalter & Ha-

jimiri (2000)] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3.1 All-pass filter function . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.2 Cross-sectional view of a silicon-germanium heterojunction bipolar

transistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

viii

LIST OF FIGURES

3.3 The four regions of operation of a bipolar transistor . . .. . . . . . . 36

3.4 The three circuit configurations of a bipolar transistor; (a) common

emitter; (b) common base; (c) common collector . . . . . . . . . . .. 38

3.5 HBT small signal model . . . . . . . . . . . . . . . . . . . . . . . .38

3.6 Common emitter circuit and its small signal model . . . . . .. . . . 42

3.7 A common emitter configuration with emitter resistance .. . . . . . . 43

3.8 Determining the high-frequency response of delay stage(a) equivalent

circuit (b) simplified equivalent . . . . . . . . . . . . . . . . . . . . 45

4.1 (a) infinite duration input signal; (b) rectangular window due to finite-

time sample interval; (c) product of rectangular window andinfinite-

duration input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

4.2 Rectangular function in time domain and Sinc function infrequency

domain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4.3 Convolution in the frequency domain . . . . . . . . . . . . . . . . .. 52

4.4 autocorrelation of rectangular window . . . . . . . . . . . . . .. . . 54

4.5 (a): Rectangular window in time domain; (b) Triangle window in time

domain; (c) Triangle window in frequency domain. . . . . . . . . .. 55

4.6 Plot of gain vs delay stage number: in the top plot,gain= 1± 0.01; in

the bottom,gain= 1± 0.001 . . . . . . . . . . . . . . . . . . . . . . 56

4.7 Windows’ function envelope when gain pers tage= 1± 0.001 . . . . . 57

4.8 Windows’ function envelope when gain per stage= 1± 0.005 . . . . . 58

4.9 Window’ envelope curves according to various stage numbers . . . . 59

4.10 Equivalent circuit of input and output port . . . . . . . . . .. . . . . 60

4.11 (a)Emitter follower (b) High-frequency equivalent circuit . . . . . . . 61

4.12 An equivalent T model circuit of emitter follower . . . . .. . . . . . 62

4.13 (a) time delay vs frequency plot (b) phase shift vs frequency plot . . . 65

4.14 An example for frequency’s overlap . . . . . . . . . . . . . . . . .. 66

5.1 Differential Pair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

5.2 Differential pair multiplier . . . . . . . . . . . . . . . . . . . . . . . 70

5.3 Gilbert Cell Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . 73

6.1 Time delay stage’s schematics . . . . . . . . . . . . . . . . . . . . .75

ix

LIST OF FIGURES

6.2 Schematics of Gilbert core multiplier . . . . . . . . . . . . . . .. . . 76

6.3 Schematics of cascade stages . . . . . . . . . . . . . . . . . . . . . .77

6.4 The multiplication gain plot . . . . . . . . . . . . . . . . . . . . . . .78

6.5 Plots of input and output of one delay stage . . . . . . . . . . . .. . 79

6.6 Plot of gain for one stage and twenty stages . . . . . . . . . . . .. . 80

6.7 (a) Input impedance of common-emitter (b) output impedance of source

follower . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

6.8 (a) Phase shift plot (b) Time delay plot . . . . . . . . . . . . . . .. . 82

6.9 Voltage swing in transient simulation . . . . . . . . . . . . . . .. . . 83

6.10 (a)Window’s function in time domain, (b)Window’s function in fre-

quency domain, (c)Zoom out of main lobe . . . . . . . . . . . . . . .84

6.11 The simulation plots of example . . . . . . . . . . . . . . . . . . . .85

6.12 One stage’s layout . . . . . . . . . . . . . . . . . . . . . . . . . . . .87

6.13 Colorful version of layout . . . . . . . . . . . . . . . . . . . . . . . .88

x

Chapter 1

Introduction

1.1 General introduction

A spectrometer is an instrument used to measure the spectrumof a signal, which

is often utilized astronomy and some branches of chemistry to analysis and identify

materials.

In a heterodyne receiver, as shown in figure(1.1) the RF-signal is down-converted

to IF-signal in a low frequency and amplified it. Further analysis of the IF-signal is

done in a spectrometer. It is common to call the receiver the frond end and the spec-

trometer the back end. A coherent receiver system usually consists of a local oscillator

(LO), which produces a monochromatic signal at frequencyvLO; a ”mixer”, which is a

nonlinear device that down-converts the signal collected by the telescope at frequency

RF Signal

Telescope

LNA AMP

and fliter

MixerRF

LO

Local

Osillator

IF AMPIF system and

backend spectrometers

Figure 1.1: Block diagram of a heterodyne spectrometer

1

Introduction/IntroductionFigs/receiver.eps

1.2 Spectrometer types

vRF to a lower microwave frequencyvIF = |vRF − vLO|, known as the intermediate fre-

quency (IF); a series of IF amplifiers; and finally a ”backend”spectrometer which

produces a spectrum of the IF signal. This IF spectrum is a replica of the spectrum of

the telescope signal.


A wide variety of technologies are available for backend spectrometers, which can

be divided into two classes:

• those that measure spectra directly in the frequency domainsuch as

1 filter banks

2 acousto-optical spectrometer

• those that measure in the complementary time lag domain(lagcorrelators)

3 digital correlator spectrometer

4 analog correlator spectrometer

The major parameters of interest are bandwidth, spectral resolution, power dis-

sipation, and in some cases, cost. Digital correlators can provide very high spectral

resolution (smaller than 1MHz), can have bandwidths of 4GHz per unit, can have

numerous operating modes with varying resolutions and bandwidths, and are straight-

forward to mass-produce. This technology continues to advance rapidly, due to the

large investments being made by the semiconductor industry. However, the power dis-

sipation remains relatively high. Acousto-optic spectrometers (AOS), such as those

being developed for HIFI/Herschel, use substantially less power and can provide 1

MHz resolution with 4× 1 GHz bands in a single unit. This technology is relatively

mature, and only evolutionary improvements may be expected. Very wide contiguous

bandwidths (4GHz) with moderate spectral resolution ( 30MHz) can be provided with

analog correlators, which have relatively low power dissipation. It appears possible to

extend this technology to much wider bandwidths. In this thesis. a technique for ultra

wideband (10GHz) spectroscopy has been proposed.

2


IF input

Power

Splitter

Bandpass

filters

Detectors

A/D and Computer

Figure 1.2: Schematic view of Filter banks

In the following sections, these four types of spectrometerare briefly discussed and

their advantages and disadvantages are compared.

1.2.1 Filter banks

Filter banks is a type of classical spectrometer.It consists of a large number of fixed

width bandpass filters; their shape and bandwidth can be designed to any designed

form, therefore, filter banks can cover arbitrarily large bands, however, at the cost of

electrical and mechanical complexity.

A simple structure of filter bank spectrometer is shown in Figure (1.2), as we can

see, it is an array of band-pass filters that spans the entire frequency spectrum. A power

divider at the input splits the signal into several or many channels, each of which has a

separate bandpass filter and power detector.The single frequency detectors square the

input amplitude, so the output signal is proportional to thesignal intensity. The filters

can be constructed by using passive electrical components,but applying integrated

circuits is also feasible. Filter banks are working successfully at many ground base

observatories, like the IRAM1 30m telescope (2×1 GHzbandwidth,4MHz resolution),

1 http://iram.fr/IRAMES/telescope/telescopeSummary/telescopesummary.html

3

Introduction/IntroductionFigs/filterbanks.eps


Figure 1.3: Schematic view of Acousto-optical spectrometer (Group(1996))

SMTO1 near Tucson, AZ or even on satellite missions, like the MLS2 instrument on

UARS3. However, a major drawback of this spectrometer is the enormous complexity

of the filter system if a bandwidth of severalGHzwith a fewMHz resolution is desired.

In addition, such instruments have large size and weight, and relatively high electrical

power consumption. The thermal stability of the filters and their calibration are typical

filter bank problems. Once the spectrometer has been constructed its resolution can not

be changed. Thus, for astronomy where requires a large number of frequency pixels,

filter banks are not an appropriate choice.

1.2.2 Acousto-optical spectrometer(AOS)

The principle of the acousto-optical signal processing is based on the diffraction

of light at an ultrasonic wave in an acousto-optical material(Uchida(1973)). A pieco-

electric transducer, driven by the RF-signal (from the receiver), generates an acoustic

wave in a crystal (the so called Bragg-cell). This acoustic wave modulates the refrac-

tive index and induces a phase grating. The Bragg-cell is illuminated by a collimated

laser beam. The angular dispersion of the diffracted light represents a true image of

1Submillimeter Telescope Observatory2Microwave Limb Sounder3Upper Atmosphere Research Satellite

4

Introduction/IntroductionFigs/aos.eps


the RF-spectrum according to the amplitude and wavelengthsof the acoustic waves

in the crystal. The spectrum is detected by using a single linear diode array (CCD),

which is placed in the focal plane of an imaging optics.The resulting analogue signal

of the CCD is read out and digitally converted in the electronics unit. This processing

is shown generally in figure(1.3)

The bandwidth of the instrument depends on the material constants of the deflec-

tor, but it varies typically between 40MHz and 3GHz. The achievable resolution of

an AOS lies between 30 KHz and a few MHz depending on the bandwidth and the

number of resolvable spots(usually around 1000) in the cell. The fabrication of hybrid

deflectors makes it possible to build very compact hybrid spectrometers that can be

used either for array receiver systems providing 4× 1 GHzbandwidth.

AOSs represent a unique option if relatively high resolution(tens ofKHz) is re-

quired, and the compactness of the spectrometers and the small price of channels

(compare with the filter bans)is also another advantage of AOSs. The disadvantages of

standard AOSs are their mechanical and temperature instabilities and the nonlinearity

of the spectra.

1.2.3 Correlator spectrometer

By using Fourier transform, signals can be converted from time domain to fre-

quency domain and vice versa. Correlator spectrometers(orautocorrelator) measure

the correlation of the input signal with itself as a functionof time offset(also called

time lag):

Rxx(τ) = limT→∞

12T

T∫

−T

x(t + τ)x(t) (1.1)

where Rxx is the signal’s autocorrelation as a function of time delayτ. x(t)and x(t + τ) are

respectively the reference signal and delayed signal.

with DFT(Discrete Fourier Transform),the autocorrelation is transformed to power

spectrumSv

Sxx( f ) =

∞∫

−∞

Rxx(τ)e− j2π f τdτ (1.2)

where Sxx is the power spectrum as a function of frequency f.

5


The DFT step can be handled in computer by using FFT(fast fourier transform).

This is very brief theoretical foundation of the autocorrelator spectrometer, more

details is presented in Chapter 2.

1.2.4 Digital correlator

The most common correlator architecture is digital. The astronomical signal,x(t)

is analog and this has to be transformed into digital form. This can be done with great

accuracy, or transforming the input voltage into a 1 bit stream, i.e. ones and zeros. If

the signal is bandlimited, which means its power spectrum isnon zero only within a

finite band of frequencies, no information is lost if the sampling rate is high enough.

According to the sampling theorem no information is lost as long as the time between

samples is less than1/∆ f , where∆ f is the observed band width. The critical sampling

frequency, 2∆ f , is called the Nyquist rate.

Figure(1.4) is a schematic diagram of a simple two-level digital autocorrelator. A

fast digitizer at the input of the system converts the input signal to a small digital word;

all subsequent processing is done in digital logic. This digital signal feeds to a series

of multipliers both directly (no time lag) and after a time delay produced in a shift

register. Logic multiplies these ”prompt” and delayed signals at each clock cycle, with

an accumulator summing the products. After a given integration time a computer reads

the digital words in the accumulator and Fourier transformsthe correlation function to

produce the spectrum.

Digital autocorrelator produces the autocorrelation function (ACF) of the signal

and then uses FFT to obtainSxx, the Power Spectral Density. The input IF signal is

first digitized after which the rest is done using digital techniques. This has the ad-

vantage that the spectrometer is extremely stable when compared with filter banks of

AOSs. It is also a flexible spectrometer as the spectral resolution can be easily changed.

With field programmable gate arrays (FPGA), digital hardware packages whose inter-

nal configurations can be downloaded from software, allow flexible correlators made

with high performance general purpose logic packages.

Because of its ease of fabrication, excellent control of spectral channel frequencies

and shapes, digital correlators become the technology of choice for observations with

thousands narrowband channels over moderate bandwidths. In theory, the resolution

6


τ

τ

τ

x(t)

bandpass

filtersampling

lock

shift lock

shift registercount clock counter multiplexer

R(nτ)

Figure 1.4: Schematic view of Digital correlator

could be infinite high because the resolution is proportional with the data sequence’s

length of the correlation, which depends on the number of delay shifter the number of

delay shifter. However, if the power consumption and compactness are taken into con-

sideration, normally the digital correlator’s resolutionis from severalMHz to hundreds

of MHz. The Relatively narrowband correlators1 are part of the instrument comple-

ment on ODIN and Herschel (L.Ravera & G.Serra(1998)). The disadvantage of digital

correlation is the same as its strength: much of the processing is purely digital. Proper

sampling of the signal requires digitization at a frequencyat least twice the signal’s in-

put bandwidth. The fastest digitizers currently availablehave sample rates of approx-

imately 4 gigasamples per second, limiting individual correlators to approximately 2

GHz bandwidths. Power consumption for digital systems scales as

P = V •C • f (1.3)

where where V is the bias voltage, C is the device capacitance, and f is the operating frequency.

1It is able to analyze four bands of 175MHzeach with a two bit three level digitizer clecked at 400

MHz.

7

Introduction/IntroductionFigs/digitalcorrelator.eps


Figure 1.5: Schematic view of a WASP analog lag correlator segment.(Harris &

Zmuidzinas(2001))

The equation(1.3) shows the relationship between power consumption and fre-

quency: the higher the clock frequencies, the higher the power. A common com-

promise, three-level digitization, gives 81% of the signal-to-noise compared with an

undigitized signal, or a loss of nearly one third of the observing time(Harris(2001)).

1.2.5 Analog correlator

Analog correlators’ configuration is not as flexible as digital correlators, but in the

case where low power consumption, wide bandwidth(higher than 4GHz) and moderate

resolution are required, analog correlator performs better because it hasmore advan-

tages than digital ones such as high efficiency and moderate spectral resolution across

very wide bandwidths.

The structure of analog correlators is more or less the same as digital correlators, as

8

Introduction/IntroductionFigs/analogcorrelator.eps


shown in figure(2.3)1, it is a schematic diagram of a WASP2 analog lag correlator for

spectroscopy. Fast transistor circuits provide the multiplication components, which are

also called mixer, and the time delays are provided by short sections of transmission

lines (actually, we can use active circuits of some other technologies to get a better

performance of the whole correlator circuit).

So by using analog correlators with meticulous design and adequate devices, it is

possible to make a spectrometer with bandwidth, low power consumption and com-

pacted structure.

1.2.6 Requirements and selection

Comparison:

Type\Characteristic Bandwidth Power Compaction Resolution

Filter bank Arbitrary Large Massive Arbitrary

Acousto-optical(LiNbO3-AOS) ≈ 1× 4 GHz Low Compacted ≈ 1MHz

Digital correlator 4 GHz moderate Compacted ≈ 1MHz

Analog correlator(WASP2) ≈ 4 GHz,could be wider Lower than digital Compacted ≈ 33MHz

Requirements:

1. Bandwidth

The spectrometers, considered as backends for submm heterodyne receivers,

must deal with various technical and instrumental performance requirements.

The exploration at submm and far-infrared wavelengths creates a great demand

for spectrometers with large bandwidth. For instance, observations of Doppler-

broadened atomic or molecular transitions in galactic sources require a velocity

coverage of 600km/s, which corresponds to approximately 4GHz bandwidth at

2THz(Gal (2005)). Similarly, for pressure broadened line observations inthe

Earth or other planetary atmospheres, wider band spectrometers are indispens-

able. The goal of the spectrometer wanted in this thesis is around 10GHzand at

1This picture is taken from ref(Harris & Zmuidzinas(2001))2Wideband Lag Correlator for Heterodyne Spectroscopy of Broad Astronomical and Atmospheric

Spectral Lines.

9


present, only the analog correlator spectrometer is possible to be designed with

10 GHzbandwidth.

2. Frequency resolution

Of course, the higher resolution, the better. For the correlator spectrometer,

the higher resolution cost more complicated circuit, larger area occupation and

higher power consumption. Here, I don’t set a exact goal for the resolution,

because the resolution should be compromised with the physical properties such

as size, weight, mechanical stiffness, power consumption and reliability. But it is

realized that if neglecting the factor just mentioned, the correlator spectrometer

could be designed with resolution from several to hundredsMHz.

3. Physical properties

Although filter banks spectrometers have arbitrary bandwidth and resolution, but

compare with the other three types, but its massive compaction and high power

consumption are the main reasons for us to give it up. For the correlator spec-

trometer, their physical properties are closely relevant with their performance

such as bandwidth, resolution and so on, as well as the designand devices.

From the investigation of the several types of spectrometerabove, we can see that

bandwidth is a great challenge for the spectrometer design.Although acousto-optical

spectrometer and digital correlator have some advantages listed in the table but consid-

ering the bandwidth limitation, neither is the best choice for a wideband spectrometer.

Filter bank is the one that can cover arbitrary bandwidths, but worst physical proper-

ties . Therefor, the analog correlator is best choice here todesign the spectrometers

with low power consumption, compacted structure and wide band (from several to ten

GHz). Then we go in more details about analog correlator technology.

10

Chen Chen

Cross-Out

Chapter 2

Analog Correlator Technology

In this chapter, at beginning, the signal processing principles of correlator is pre-

sented. Since analog delay cell is the most important part inanalog correlator circuit,

which directly affects the analog correlator’s performance very much, several tech-

nologies of analog delay cell are discussed after the correlation theory and one of them

is selected as the one used in the analog correlator relevantto this report.

11

2.1 Correlation

2.1 Correlation

2.1.1 Signal and Correlation

A example is shown in figure(2.1)to illustrate the relationship with signal and cor-

relation. When the two signals are similar in shape and unshifted with respect to each

other, their product is all positive. This is like constructive interference, where the

peaks add and the troughs subtract to emphasise each other. The area under this curve

gives the value of the correlation function at point zero, and this is a large value.

As one signal is shifted with respect to the other, the signals go out of phase - the

peaks no longer coincide, so the product can have negative going parts. This is a bit

like destructive interference, where the troughs cancel the peaks. The area under this

curve gives the value of the correlation function at the value of the shift. The negative

going parts of the curve now cancel some of the positive goingparts, so the correlation

function is smaller.

The largest value of the correlation function shows when thetwo signals were

similar in shape and unshifted with respect to each other (or’in phase’). The breadth

of the correlation function - where it has significant value -shows for how long the

signals remain similar.

In one sentence, correlation is a maximum when two signals are similar in shape,

and are in phase (or ’unshifted’ with respect to each other)1.

Autocorrelation2 is a mathematical tool used frequently in signal processingfor

analyzing functions or series of values, such as time domainsignals. It is the cross-

correlation of a signal with itself. Autocorrelation is useful for finding repeating pat-

terns in a signal, such as determining the presence of a periodic signal which has been

buried under noise, or identifying the fundamental frequency of a signal which doesn’t

actually contain that frequency component, but implies it with many harmonic frequen-

cies. In statistics, the autocorrelation existent betweena real-valued random variable

is defined to be equal to the expected value of its product withitself at different time

point, it is,

Rxx(t1, t2) = E[X(t1)X(t2)] (2.1)

in the equation (2.1), E[] is the expected value, or the mean value and its function of

1The figure(2.1)and this example are taken from http://www.bores.com/index.htm2This definition is from Wikipedia, the free encyclopedia

12

2.1 Correlation

Figure 2.1: correlation

time is

E[X(t)] =

∞∫

−∞

x fX(x, t)dx (2.2)

where,fX() is the density function. With these two equations, the autocorrelation func-

tion can be rewritten as

Rxx(t1, t2) =

∞∫

−∞

∞∫

−∞

x1x2 fX1,X2(x1, x2; t1, t2)dx1dx2 (2.3)

When the autocorrelation functionRxx(t1, t2) of the random processX(t) varies only

with the time difference|t1 − t2| , and the meanmx is constant,X(t) is said to besta-

tionary in the wide-sense, or wide-sense stationary. In this case, the autocorrelation

function is written as a function of one argumentτ = t1 − t2 . If we let t2 = t and

t1 = t + τ, then the autocorrelation function, in terms ofτ only, is

RXX(t + τ, t) = RXX(τ) (2.4)

Those original definition is in often used in statistics, in signal processing, the

above definition is often used without the normalisation andthe signals are treated as

13

Chapter1/Chapter1Figs/corr2.eps

2.1 Correlation

ergodic1 ones. As mentioned in (Barkat(1991)), if a random processX(t) is ergodic in

the mean, there is

E[X(t)] = 〈x(t)〉 (2.5)

where the symbol〈〉 donotes time-average and〈x(t)〉 is defined to be

〈x(t)〉 = limT→∞

12T=

T∫

−T

x(t)dt (2.6)

The continuous autocorrelationRxx(τ) is most often defined as the continuous cross-correlation

integral ofx(t) with itself, at lagτ.

RXX(τ) = limT→∞

12T

T∫

−T

x(t + τ)x(t)dt (2.7)

1A random processX(t) is ergodic in the mean if the time-averaged mean value of a sample function

x(t) is equal to the ensemble-averaged mean value function.

14

2.1 Correlation

2.1.2 Fourier series and Fourier Transform

Fourier series

The Fourier series is a mathematical tool used for analyzingan arbitrary periodic func-

tion by decomposing it into a weighted sum of much simpler sinusoidal component functions

sometimes referred to as normal Fourier modes, or simply modes for short. The weights, or

coefficients, of the modes, are a one-to-one mapping of the original function. The expression

is

f (t) =a0

2+

N∑

n=1

[an cos(ωnt) + bn sin(ωnt)] (2.8)

and it can also be rewritten as:

f (t) =a0

2+

N∑

n=1

[cn sin(ωnt + θn)] (2.9)

where:

• ωn is thenth harmonic(in radians)of the functionf

• cn =√

an2 + bn

2

• θn = arcsinancn

Besides periodic functions, Fourier series can also be usedto approximate non-periodic func-

tions by a linear combination of periodic functions. In practice, more and more harmonics are

added up until a shape sufficiently close to that of the original non-periodic functionis obtained.

That is

f (t) =a0

2+

∞∑

n=1

[cn sin(ωnt + θn)] (2.10)

where the only difference between Eq(2.10) and Eq(2.9) is when Fourier series express non-

periodic funtions,N → ∞.

Considering the autocorrelation process of a signal which is expressed with Fourier series,

f (x) =∞∑

n=1[cn sin(ωnt + θn)], a0 is neglected here because in electric signal this coefficient

denotes the weight of DC but the useful information is contained in AC signal.

Rf f (τ) = 〈 f (t) • f (t + τ)〉 (2.11)

if the item ”cn sin(ωnt + θn)” is replaced withCn(t) for simpleness, we can get

Rf f (τ) =

⟨ N∑

i=1

Ci(t)N∑

j=1

C j(t + τ)

⟩

=

⟨ N∑

i=1

N∑

j=1

Ci(t) •C j(t + τ)

⟩

(2.12)

15

2.1 Correlation

It is known that the time average ofCiC j(i , j) is zero1, so the correlation is able to be

expressed as the sum of the every single tune’s correlation:

Rf f (τ) =

⟨ N∑

n=1

RCnCn(τ)

⟩

(2.13)

This property can be illustrated by an example, suppose there is a signal combined with 3

tune:x1(t), x2(t) andx3(t), the frequency of which are respectivelyf1 = 4GHz, f2 = 6GHz, f3 =

8GHz

s(t) = x1(t) + x2(t) + x3(t) (2.14)

The figure(2.2) shows clearly that the autocorrelationRs(τ) of signal s(t) equals the sum

of Rx1(τ),Rx2(τ) andRx3(τ). And this property is able to be generalized in the case of signal

combined with arbitrary different frequency components. The correlation of a sine wave is also

a periodic sine signal as a function ofτ and its correlation’s amplitude equals the power of the

original sine wave,it can be expressed as an equation:

Rf1(τ) = 〈an sin(2π fnt) • an sin(2π fn(t + τ)〉

= a2n 〈sin(ωnt) • sin(ωnt + θ(τ))〉

= 12[a2

n(〈− cos(2ωnt + θ(τ))〉 + 〈cos(θ(τ))〉]

(2.15)

where

• ωn = 2π fnt.

• θ(τ) is a function of time delayτ.

• an is the weight of the sine with frequencyfn.

• the time average of a sine is zero, so〈− cos(2ωnt + θ(τ))〉 = 0.

• if τ is fixed, cos(θ(τ)) keeps constant with timet, so〈cos(θ(τ))〉 = cos(2π fnτ).

the final expression is

Rf1(τ) =12

a2n cos(2π fnτ) (2.16)

and it can be generalized as

Rs(τ) =N∑

n=1

Rfn(τ) =N∑

n=1

12

a2n cos(2π fnτ) (2.17)

1It is called orthogonality

16

2.1 Correlation

0 0.2 0.4 0.6 0.8 1

x 10−9

−1

0

1

0 0.2 0.4 0.6 0.8 1

x 10−9

−1

0

1

0 0.2 0.4 0.6 0.8 1

x 10−9

−1

0

1

0 0.2 0.4 0.6 0.8 1

x 10−9

−1

0

1

0 0.2 0.4 0.6 0.8 1

x 10−9

−1

0

1

0 0.2 0.4 0.6 0.8 1

x 10−9

−0.5

0

0.5

1

0 0.2 0.4 0.6 0.8 1

x 10−9

−5

0

5

0 0.2 0.4 0.6 0.8 1

x 10−9

−2

0

2

x1(t)

s(t)=x1(t)+x2(t)+x3(t)

x3(t)

x2(t)

Rx1

Rx3

Rx2

Rs=Rx1+Rx2+Rx3t tau

autocorrelation

Figure 2.2: Correlation

17

Chapter1/Chapter1Figs/correlation1.eps

2.1 Correlation

Equation(2.16) shows that the coefficient 12a2

n is the power of the sine at frequencyf1.

Equation(2.17) coincides with Parsevals Theorem, which states that the total power in any

periodic signal may be found either by adding together the powers represented by the frequency

components in its Fourier Series, or as the mean-square value of its time domain waveform.

Fourier Transform

The continuous Fourier transformX( f ) defined as

X( f ) =

∞∫

−∞

x(t)e− j2π f tdt (2.18)

wherex(t) is some continuous time-domain signal

Equation(2.18) is used to transform an expression of a continuous time-domain function

x(t) into a continuous frequency-domain functionX( f ). By utilizing the property of orthogo-

nality, this equation can reveal the distribution of the Fourier series’ coefficients as a function

of frequency. Subsequent evaluation of the X(f) expressionenables us to determine the fre-

quency content of any practical signal of interest and opensup a wide array of signal analysis

and processing possibilities in the fields of engineering and physics.

18

2.1 Correlation

2.1.3 Power spectrum

Parsevals Theorem expresses a tie-up between the frequencydomain and the time-domain.

Power spectrum commonly defined as the Fourier transform of the autocorrelation function. In

the continuous and discretum, the power spectrum equation becomes:

S( f ) =

T∫

0

R(τ)e− j2π f τdτ (2.19)

S( f ) =N∑

n=1

R(n)e− j2πn f T s (2.20)

where,

• R(n) is the autocorrelation function.

• Ts is the sample interval.

Since the autocorrelation has odd symmetry, the time average of sine terms will be all zeros, so

that:

S( f ) =

T∫

0

R(τ) cos(2π fτ)dτ (2.21)

and

S( f ) =N∑

n=1

R(n)cos(2π fTTs) (2.22)

These equations in continuous and discrete are referred at the cosine transform. For the infinite

non-periodic signal,N andT could be infinite.

19

Chen Chen

Text Box

2pi fT n Ts

2.2 Analog Correlator Circuit


The theory of correlation and power spectrum is presented inthe foregoing discussion. In

this part, I’d like to describe the real analog circuit whichis used to realize the function of

correlator and power spectrum. A schematic representationof the analog correlator circuit’s

structure is shown in figure(2.3).

A measured signalx(t) is split into two channels by a power divider, one is used as the

reference signal without lag and the other is delayed as

x(τ), x(2τ), . . . , x(nτ), . . . , x(Nτ)

by time delay cells, where N is the number of delay cells. The products of the signals and

their lags are generated by multipliers and accumulators realize the time-averaged autocorrela-

tion function. The discrete autocorrelation values are collected and transformed to frequency

domain as the power spectrum by DFT (Discrete Fourier Transform). 1

This is the process of the analog autocorrelator circuit, which differs in a number of points

from the equations and theory outlined in the last subsection. The two main differences are:

1. the autocorrelator outputs are discrete data

2. the data set is finite

2.2.1 Spectrum’s bandwidth and resolution

These two differences cause two problems which are not referred in the continuous corre-

lation and signal processing.

The first point is taken care of by the Nyquist-shannon sampling theorem, which states that

if we sample with a rate twice the input bandwidth or higher, the sampled values contains all

the spectral information.

To formalize these concepts, letx(t) represent a continuous-time signal andX( f ) be the

continuous Fourier transform of that signal2 as in the equation(2.18).

The signal isx(t) is bandlimited to a one-sided baseband bandwidthB if X( f ) > 0 for all

| f | > B. Then the condition for reconstruction from samples at a uniform sampling ratefs is

fs > 2B.

1The discrete autocorrelation outputs may also be processedby using FFT(Fast Fourier Transform),

which is more popular because this algorithm is faster than DFT.2It exists if x(t) is square-integrable

20

2.2A

nalogC

orrelatorC

ircuit

g g g g

1( ) ( )x t x t 2( ) ( )x t x t

3( ) ( )x t x t ( ) ( )

ix t x t

( )x t

Po

we

r

div

ide

r

1( )R

1( )x t

( )x t

2( )x t 3( )x t ( )i

x t

2( )R 3( )R ( )i

R

1 2 3 i

t

ns

Integration variable

g

Delay cell

Integrator

Multiplier

Discrete

Continuous

1

1G g2

2G g

3

3G gi

iG g

g is the voltage gain per stage, Gi is

the voltage gain between the output of

ith stage and the original input signal

n sn

1

( ) ( ) cos(2 )n

j s

j

S f R f

( ) ( )n s

R R n

It is supposed here gain is constantunit, but if not, the output at ith stage

should be ( )i

ig x t

Fig

ure

2.3

:S

chem

aticso

fAn

alog

correlato

r

21

Chapter1/Chapter1Figs/entire.eps


2B is called the Nyquist rate and is a property of the bandlimited signal, whilefs/2 is called

the Nyquist frequency. Sampling rate is inverse proportional to the sampling interval:

Ts =1fs

(2.23)

which is, in the analog correlator, one step’s time delay length τ. Therefor, the time delay

length of the delay stage is a factor that determines the bandwidth of the analog correlator. The

samples ofx(t) are denoted by:

x [n] = x(nτ), n ∈ Z (2.24)

The samples of autocorrelation are denoted by:

Rxx [n] = limT→∞

12T

T∫

−T

x(t)x(t + nτ)dt, n ∈ Z (2.25)

As we know that it is impossible for the integration time to beinfinite in the real circuit, but

for the signals which are around a couple ofGHzor higher, even one second integration time

is long enough. The error between the true time average and the one generated by accumulator

is so small that it can be neglected. After Discrete Fourier Transform, the power spectrum is

S( f ) =Ns∑

n=1

Rxx(n)cos(2π fTτs) (2.26)

whereNs is the number of the cells andτs is the sampling interval, equal to the time delay of

one delay cell.

The second point should be taken care of isNs – the number of the delay cells, which is a

finite number. The DFT frequency resolution is

fresolution=fs/Ns

(2.27)

Equation(2.27) illustrates that the spectrum’s resolution is determinedby samplings numberNs

if the sampling frequencyfs fixed.

Considering the discussion of bandwidth and resolution requirements in the first chaper,

the sampling frequency should be higher than 20GHz in case of an autocorrelator required

with 10GHz bandwidth. It limits the time delay length of one delay cell to be less than 50

picoseconds.

It is a common sense that the higher resolution, the better for a power spectrum which can

contain more information, so one delay cell’s time delay should be designed as long as possible

in the precondition of being less than 50 picoseconds.

22

2.3 Types of delay circuit and selection

Another method to improve the resolution is to increase the number of delay cells, but

this one should be taken care of, because it would bring some other troubles, such as power

consumption, compactness and circuit stability.

From the discussion above, it is realized that the delay cellis very important and it affects

the performance of the whole analog correlator circuit, so that a suitable one should be selected

seriously and designed carefully.


In this part, I list the specification of the delay cell at first, then several types of delay circuit

are introduced. At last, the most suitable one is selected.

2.3.1 Specification

Considering that hundreds or even thousands of delay cells will be compacted in a small

chip, so the size and power consumption of one single unit should be very small. The time

delay circuit used in our correlator circuit requires:

1. Ultra wideband. The goal is 10GHz, in another word, the delay time should be kept

constant in 10GHzbandwidth.

2. Low power consumption. It is reasonable that the total power for one analog correlator

is around several or several tens of Watt and therefore, for one delay cell, the power

consumption is around or lower than a couple of mW.

3. Small size. The length of one delay cell is expected aroundtens ofµm.

4. Moderate resolution, the delay time per unit is expected to being several tens picosec-

onds but less than 50 picoseconds. and the relationship between resolution and delay

time & the number of delay cells are presented in the table below:

Resolution 200 delay cells 500 delay cells 1000 delay cells

20 ps per cell = 250MHz = 100MHz = 50MHz

30 ps per cell ≈ 167MHz ≈ 67MHz ≈ 33MHz

40 ps per cell = 125MHz = 50MHz = 25MHz

Time delay can be realized through transmission lines, lumped LC delay lines, or active

devices. The normal transmission line implementations often require an excessive chip area, for

example, a single period delay is about one centimeter long at 10Gb/s. Lumped LC delay lines

23


are also area-inefficient because the high inductance values require a lot of area. Furthermore,

losses along both transmission lines and LC lines prevent cascading too many stages and high

power consumption is also a problem because of the low impedance of the lines.

In digital applications, delay is realized by reducing the bandwidth of a switching stage.

The subsequent switching of an unloaded stage restores the rise time of the digital waveform.

This approach is not useful in analog applications that are sensitive to signal distortion.

By using active analog delay, we can save a lot of area comparing with comparable LC

delay line, but considering about the there are hundreds or thousands of time delay units com-

pacted in a small chip, the power consumption is a challenge.

2.3.2 Transmission line in WASP2

The WASP2[Harris & Zmuidzinas(2001)] spectrometer, as presented in figure(2.3) on

page21, uses microstrip transmission line to generate the true time delays.

A series of resistive power dividers sample the signal of a traveling wave along the trans-

mission lines. Each sampling tap starts with a narrow (0.008in.) trace extending from the lines

edge to an 820Ω chip resistor, a direct current (dc) blocking capacitor, and then the multi-

plier input. Coupling to the multiplier is−24dB at low frequencies, with the resistors shunt

capacitance (about 0.05pF) increasing the coupling by a few decibels at the highest frequency.

This rollup is desirable, as it partially compensates for some of the multipliers rolloff with

frequency. A Nyquist cutoff frequency fc = 4200MHz was chosen to match commercially

available broadband splitters; the corresponding tap spacing is 59.5 ps, or 0.380 in. along mi-

crostrip transmission lines on 0.020 in. thickεr = 3.5 circuit board. The two transmission lines

start at opposite ends of the circuit board, running close tothe center along the long axis of the

board. The signal is fed into both these two transmission lines but opposite direction. Compar-

ing with the circuit structure where signals are fed into only one direction and correlated with

the reference ones, the opposite direction lag correlator doesn’t improve the resolution but it

may balance the signal’s loss. Even though there is loss along the transmission line, this circuit

structure makes the product of the signal and its lag from theother transmission line constant.

2.3.3 Delay lines using varactors

The varactor loaded transmission line technique is introduced in papers [Dan Kuylenstierna

& Spartak Gevorgian(2005,June)][Dan Kuylenstierna & Spartak Gevorgian(Ericsson AB,

Molndal, Sweden)], . We know that the simples possible true-time delay line is a dispersion-

24


free transmission line with a group delaytau:

τ =l

vg(2.28)

wherel is the physical length of the line andvg is the group velocity defined as:

vg =∂β

∂ω(2.29)

whereβ is the propagation constant of the line.

A tuneable true-time delay line may be accomplished as a slowwave structure, using tune-

able elements loading a non-dispersive transmission line.Far below the Bragg frequency (fB),

i.e. the frequency where the periodl between two consecutive loads equals half the guided wave

lengthλg, the group velocity is approximately equal to the phase velocity and the propagation

constantβ can he written

β = ω√

(Ll + L/l)(Cl +Cv/l) (2.30)

whereLl is the inductance per unit length,Cl the capacitance per unit length,L the lumped

inductance in the unit cell,Cv the capacitance of the varactor, andl the length of the unit cell.

An expression for the group delay is now obtained from equation(2.28), (2.29) and (2.30).

AssumingLl andCl to be neglected if comparing toL/l andCv/l respectively, the group delay

per unit cell can be written

τ =√

LCv (2.31)

whereL is the inductance per unit cell. Under the same assumption, the characteristic impedance

is simplified to

ZC =

√

LCv

(2.32)

Equation(2.31) and (2.32) shows the time delay and characteristic impedance whenf ≪

fB. This inequality gives the low frequency limitω → 0. In practical case, equation(2.31) and

(2.32) are approximately correct whenf < fB. As frequency increasing, the transmission line

structure reveals low-pass filtering performance so that the time delay is not constant.

The design of the delay line using varactors starts from equation(2.31) and (2.32). The

general idea of the delay lines using varactors is a planar transmission-line periodically loaded

with electronically variable capacitances (varactor diodes) which gives an electronically vari-

able phase-velocity along the line. In [Dan Kuylenstierna & Spartak Gevorgian(Ericsson AB,

Molndal, Sweden)], a compact tunable true-time delay lines base on ferroelectric1 varactor

integrated on high-resistivity silicon is introduced. Thedelay lines are based on lumped el-

ements, physically implemented as synthetic coplanar-strip lines. The physical length of the

1Ba0.25S r0.75TiO3

25


Figure 2.4: Delay lines using Ferroelectric varactor [Dan Kuylenstierna & Spar-

tak Gevorgian(Ericsson AB, Molndal, Sweden)].

fabricated delay lines is 2.0mm, including bias pads. At room temperature, this delay lines

generate an absolute group delay 70ps and the leakage current at room temperature is less than

0.1mA. The figure(2.4)1 below demonstrates this kind of delay lines:

There are 16 unit cells in figure(2.4),time delay is 5.4ps for one unit cell and about 120mm

long totally. The plot(2.5)shows that time delay can be kept nearly constant for ultra wideband.

As introduced in this paper, the power consumption is reallylow and the minimum delay

time is also small enough if only several unit cells are used as one delay unit. But the length is

a litter long if we want to use more than one thousand delay units to get high resolution.

With this technique, it is possible to design a correlator with about 200 delay units, the

bandwidth could be higher than 10GHz.

2.3.4 Distributed MEMS

Nowadays, MEMS2 technology develops very fast in the performance of electronically

tunable devices. In microwave and RF application, the MEMS-based periodic configurations

have emerged as an efficient way to implement true-time delay lines or phase shifts. In [Julien

Perruisseau-Carrier & Skrivervik(2006)], a modeling and design methods of true-time dis-

tributed microelectromechanical systems transmission lines (DMTLs), which can be used to

realize a variable true-time delay line, is presented.

1This figure is taken from [Dan Kuylenstierna & Spartak Gevorgian(Ericsson AB, Molndal, Swe-

den)].2Microelectromechanical systems

26

Chapter1/Chapter1Figs/ferro.eps


Figure 2.5: Measured (0V[o], 20V[]) and modeled(0V[-], 20V[- -] results of time

delay.)

Figure(2.6) shows the layout of a DMTL, which is a particular one-dimensional periodic

structure whose unit cell consists of a MEMS shunt capacitorloading a CPW. Such a periodic

device can be modeled by cascading identical two-port networks, each of those corresponding

to a unit cell of the structure.

Figure(2.7) depicts the measured and simulated delay results in terms of phase shift and

differential delay of the DMTL and the table below shows the parameters of the DMTL:

differential delay band number of cells total length

20ps 1− 20GHz 34 288µm

It is easy to calculated that for one cell, delay time of 0.588pscan be realized with length

of 8.47µm. Comparing with the delay lines with varactors mentioned formerly, the DMTL

is more compacted. If it’s used as a delay line in the analog correlator circuit with 100MHz

resolution,the time delay should be 10nsin total, which requires 17000 cells and 144mmlength.

This can not be called compactness. This weakness can be improved by feeding the signal

into two delay lines with opposite direction, therefor, thetotal length is halved, 77mmlong.

According to the characters of the DMTL, it is suitable to design a time delay circuit where

very broad band is required, but not a good one for the high resolution (smaller than 100MHz).

27

Chapter1/Chapter1Figs/ferroplot.eps


Figure 2.6: Periodic structure representation of a DMTL (white: first metal, light

grey: second metal, dark grey: slots, black: anchoring)[Julien Perruisseau-Carrier &

Skrivervik (2006)].

2.3.5 Active analog delay

Time delay can be generated by an active delay stage, which ismade up of the common-

emitter stage (differential pair) depicted in Figure(2.8). The differential pair works as a all-pass

filter, which keeps the gain unit and delays the input signal.As mentioned in [Buckwalter &

Hajimiri (2000)], the authors designed an active analog delay circuit based on this all-pass filter

circuit, which is depicted in Figure(2.8).

It is encouraging to see that the total area of a single 12.5psdelay stage is 0.0055mm2, one

sixteenth the area of a passive LC delay occupied. But, it is also mentioned in this paper ”the

delay path consumes 5mA at 3.3V per stage and has four stages to generate a 100ps delay. The

DRL1 (delay reference loop) consumes 15mA at 3.3V”, which means if thousands of this delay

units was integrated on a single small chip, the power consumption would be huge.

At present, the SiGe HBT technology is developing very fast and it can work with much

lower DC current comparing with the normal BJT made of Si. Besides the low operating DC

current, SiGe HBT can also work over a very broad frequency band, with carefully design,

the differential pair could perform very well that the gain and delaytime length are constant

enough. If so, the DRL may be not necessary. Therefor, the power consumption per delay stage

1DRL is used to compensate the PVT(process, voltage, and temperature) variation.

28

Chapter1/Chapter1Figs/MEMS.eps


Figure 2.7: Measured and modeled absolute phase shift and differential delay of the

DMTL [ Julien Perruisseau-Carrier & Skrivervik(2006)].

will be decreased a lot and it can be the solution.

2.3.6 Selection

According to the discussion above, none of these analog delay circuit is perfect, but with

improvement, the active analog delay circuit would consumelower power. This kind of circuit

occupies small area and it is easy to be integrated on the chipso I choose this circuit as the time

delay cell.

29

Chapter1/Chapter1Figs/MEMSplot.eps


B C

E

Figure 2.8: active analog delay stage and small signal model[Buckwalter & Hajimiri

(2000)]

30

Chapter1/Chapter1Figs/activedelay.eps

Chapter 3

Active analog delay circuit

This chapter goes to details of the active analog delay circuit. There are several ways to

introduce an analog delay into a signal channel. My choice isto create the delay with active

circuitry, which doesnt take up much space and can be designed to precisely implement with

specified delay time is needed.

Theoretically, the active analog delay circuit works as a all-pass filter which is discussed

firstly, and then a introduction on HBT(heterojunction bipolar transistor) is given. Following

the HBT, The small-signal operation and model is expression. At last, design of the active

analog delay is considered.

3.1 Laplace domain expression of all pass function

3.1.1 All-pass filter

x(t) x(t − τ)

X( f )∠θin X( f )∠θout

H(s) = e−sτ

Figure 3.1: All-pass filter function

The magnitude response of an all-pass filter is unity for all frequencies, thus frquencies

are passed without attenuation. The associated phase response is useful for approximating a

31

Chapter2/Chapter2Figs/allpass.eps

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3.1 Laplace domain expression of all pass function

specified phase characteristic. As to the analog correlator, constant time delay, corresponding

to a linear phase shift, is required.

3.1.2 All-pass transfer function

Laplace transform

Laplace transform is used as an analysis tool for time-invariant systems. It is also a mathemat-

ical operation defined for functionf (t) that are zero fort < 0 as:

F(s) =

∞∫

0

f (t)e−stdt (3.1)

where the complex frequency

s= σ + jω (3.2)

For an impulse functionf (t) = δ(t − τ) occurring att = τ, by using Laplace transform, it

gives:

F(s) =

∞∫

0

δ(t − τ)e−stdt = e−sτ (3.3)

In time domain, delay can be expressed as the function below:

x(t − τ) = x(t)δ(t − τ) (3.4)

From the equation (3.3) and (3.4), we can get the expression of time delay function in

Laplace domain is exponentiale−sτ, which requires an infinite number of poles and zeroes

to implement. Because the ideal form cant be implemented practically, we need to use an

approximation. An accurate, simple approximation to the ideal can be achieved by using a

technique known as Pade approximation. The first-order Pade approximation1 to an ideal delay

has the following form:

e−sτ =1− τs/21+ τs/2

(3.5)

As former discussion, the unit gain is required for every delay cell to realize the correlation

function, it is expressed as|e−sτ| = 1, henceσ = 0 ands= jω.

First-order approximation of AP transfer function

1Pade approximations are rational polynomial approximations toex, the details are introduced in

appendix

32

3.2 HBT and its circuit model

The first-order all-pass transfer function having one real pole at−τ/2 and one real zero at

+τ/2,is

H1(s) =1− τs/21+ τs/2

(τ > 0) (3.6)

The phase response of equation(3.5) is

θ1(ω) = −2 tan−1 ωτ

2(3.7)

The time delay function is:

D1(ω) =dθ1dω= −τ

1

1+ (ωτ2 )2(3.8)

It is obvious that the phase shift is not linear and time delaynot constant according to the

phase shift and time delay function given above because it isonly the first-order approximation

of the time delay channel function-esτ , but it is noticed that whenωτ ≪ 1 or ωτ → 0, the

equation(3.7)(3.8) can be approximated as

θ(ω) = −2 tan−1 ωτ

2≈ 2 •

ωτ

2= ωτ (3.9)

D1(ω) = −τ1

1+ (ωτ2 )2≈ −τ (3.10)

So in low frequency band, comparing with the delay circuits’sampling frequency which

is the inverse of the time delayτ, the first order function could be approximated as a constant

time delay system.


3.2.1 Device introduction and structure

SiGe1 HBTs2 are chosen as the transistors in the active analog delay circuit.

Figure(3.2) shows a cross-section of a typical SiGe heterojunction bipolar transistor[D.L. Harame

& Tice (1995)]. The p+ SiGe base layer is grown after oxide isolation formation andis fol-

lowed in the same growth step by the growth of a p-type Si cap. Single-crystal material is

formed where the silicon collector is exposed and polycrystalline material over the oxide iso-

lation. The boundary between these two types of material is shown by the dotted lines in

1Silicon-Germanium2Heterojunction Bipolar Transistors

33


Figure 3.2: Cross-sectional view of a silicon-germanium heterojunction bipolar tran-

sistor

Figure(3.2). The polycrystalline material is heavilyp+ doped using an extrinsic base implant

and then used to contact the base. The emitter is formed by diffusing arsenic from the polysil-

icon emitter to over-dope the Si cap n-type. SiGe HBT transistors behave very similarly to a

normal BJT, but has lower base resistancerb. Hence, the small-signal model of bipolar can

also be used for simulating the operation of SiGe HBTs.

Comparing with the normal Bipolar, HBTs offer dramatically improved high-frequency

performance compared to BJTs. Comparing with MOS transistors, SiGe HBTs have better

current driving capabilities which save the power. All these superior performance characteris-

tics make them most suitable devices to implement ultra wide-band analog correlator with low

power consumption.

3.2.2 Device Operation

Although implementation of HBTs is different with BJTs, the operation of HBTs is funda-

mentally the same as that of BJTs and the same models can be used to analyze them. In order

to use a bipolar transistor in practical circuits, externalbias must be applied to the emitter/base

and collector/base junctions. These two junctions provide four possible bias configurations, as

illustrated in Figure(3.3). The forward active mode of operation is the most useful, because in

34

Chapter2/Chapter2Figs/HBT.eps


this configuration the gain of the transistor can be exploited to produce current amplification.

A forward bias of approximately 0.7V is applied to the base/emitter junction and a reverse bias

to the collector/base junction.

The other bias configurations in Figure(3.3) are also often encountered in practical circuits.

In the inverse (or reverse) active mode, the emitter/base junction is reverse biased and the col-

lector/base forward biased. This is less useful than the forward active mode because the inverse

gain of the transistor is very low. In the cut-off mode both junctions are reverse biased, and

hence no current can flow between emitter and collector. The transistor is therefore off, and

behaves like an open switch. Conversely, in the saturation mode both junctions are forward bi-

ased, which enables a large current to flow between emitter and collector. In this configuration

the transistor can be viewed as a closed switch.

The electrical properties of a bipolar transistor can be characterized by a number of elec-

trical parameters, the most important of which is the commonemitter current gainβ which is

defined as the ratio of collector current-IC to base current-IB:

β =ICIB

(3.11)

In a typical transistor the collector current is approximately 40 ∼ 200 times larger than

the base current. In order to understand how this important property of the bipolar transistor

arises we must consider how it functions when external bias is applied. In the forward active

mode, the forward biasing of the emitter/base junction causes a large number of electrons to

be injected from the emitter into the base. A concentration gradient is therefore established

in the base, which encourages the electrons to diffuse towards the collector. If the base of

the transistor were very wide all the injected electrons would recombine before reaching the

collector, and the transistor would merely behave like two back-to-back diodes. However,

the essence of the bipolar transistor is that the base is sufficiently narrow that the majority of

electrons reach the collector/base junction, where they are swept across into the collector by the

large electric field across the reverse biased junction. This is achieved by making the basewidth

comparable with, or smaller than, the diffusion length of electrons in the base. The base current

is determined by the number of holes injected from the base into the emitter. The base current

can be made much smaller than the emitter current by doping the emitter much more heavily

than the base.

A related electrical parameter to the common emitter current gain is the common base

current gainα, which is the ratio of the collector current to the emitter current:

α =ICIE

(3.12)

The emitter current is given by the sum of the collector and base currents:

35


Forward Active

Reverse

bias

Forward

bias

Inverse Active

Forward

bias

Reverse

bias

Saturation

Foward

bias

Forward

bias

Cut-off

Reverse

bias

Reverse

bias

Figure 3.3: The four regions of operation of a bipolar transistor

36

Chapter2/Chapter2Figs/ophbt.eps


IE = IC + IB (3.13)

Therefore the relationship betweenα andbetacan be expressed as:

α =β

1+ β(3.14)

The common emitter and common base current gains can be measured by biasing the tran-

sistor into the forward active region and taking readings ofbase, emitter and collector current.

Three alternative circuit configurations are possible, depending upon which terminal is com-

mon between the input and output. These are illustrated in Figure(3.4), and are termed the

common emitter, common base and common collector circuit configurations.

The common emitter current gainβ is obtained by connecting the transistor in the common

emitter configuration, as illustrated in Figure (3.4-a), and plotting the collector current as a

function of collector/ emitter voltage, with the base current as a parameter. The resulting

characteristic is illustrated as the equation:

IC = ICS expVBE

VT(3.15)

where

• VT = kT/q1 represents thermal voltage (normally 25mV at room temperature) and it has

been assumed thatVBE≪ kT/q.

• ICS represents saturation current or referred to as the collector current scale factor, which

is inversely proportional to the base width, emitter doping, junction area and so on.

Typically IS is in the range of 10−12A to 1015A(depending on the size of the device)

which depends on

The base current, which is is also dependent on base-emittervoltage, can also be expressed by

similar exponential relationship.

IB = IBS expVBE

VT(3.16)

whereIBS is base current scale factor.

The common emitter current gain is obtained by reading off the value of collector current

obtained for one of the values of base current and taking the ratio. The common base current

gainα can be measured by connecting the transistor in the common base configuration illus-

trated in Figure(3.4-b), and the collector current is a function of collector/base voltage, with

1k is Boltzmanns constant, q is charge on an electron and T is the temperature.

37


IC

IE

IB

VBE

VCE

(a)

IC

IE

IB

(c)

VBC

VEC

ICIE

VBE VCB

IB

(b)

Figure 3.4: The three circuit configurations of a bipolar transistor; (a) common emitter;

(b) common base; (c) common collector

the emitter current as a parameter. The common base current gain is obtained by reading off

the value of collector current obtained for one of the valuesof emitter current and taking the

ratio.

3.2.3 HBT Modeling

Hybrid-π small signal model is used here to describe the operation of forward-active model,

it is illustrated in figure(3.5).

B C

E

+

-

cpivπ rπ

Cµ

gmvπ r0

Figure 3.5: HBT small signal model

38

Chapter2/Chapter2Figs/config.eps

Chapter2/Chapter2Figs/model1.eps

Chen Chen

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Small Signal Transconductance

This model is of a npn type device, the base-emitter voltageVBE controls the collector

current, the current generatorgmVbe, hereVπ = Vbe, models this behavior of the device with

transconductancegm, which is also defined as:

gm =∂IC∂VBE

=∂(ICS expVBE

VT)

∂VBE=

ICVT

(3.17)

As shown in equation(3.15), replaceVT with kT/q, we can get:

gm =qICkT

(3.18)

From the equation(3.18), it is apparent that if temperature T is fixed, the transconductance

is only determined byIC, so we can adjustgm by changing the collector current. The analysis

above suggests that for small signals (vbe≪ VT), the transistor behaves as a voltage-controlled

current source. The input port of this controlled source is between base and emitter, and the

output port is between collector and emitter.

The Base Current and the Input Resistance at the Base

To determine the resistance seen byvbe, firstly theib is given as a function ofvbe1 by using

equation(3.17):

ib =icβ=

gmvbe

β=

ICvbe

VTβ(3.19)

The small-signal input resistance between base and emitter, looking into the base, is de-

noted byrπ and is defined as

rπ =vbe

ib(3.20)

Using equation(3.19)gives:

rπ =β

gm(3.21)

Thusrπ is directly dependent onβ and is inversely proportional to the bias currentIC. Substitut-

ing for gm in Eq.(3.19) from Eq.(3.17) and replacingIC/βby IB gives an alternative expression

for rπ:

rπ =VT

IB(3.22)

1In this chapter,ib, vbe and other parameters with lowercase letters denote the small AC signal

39


Besides the input resistance looking into the base,rπ. The model obviously yieldsic =

gmvbe and ib = vbe/rπ. Not very obvious, however, is the fact that the equivalent model also

yields the correct expression ofib. This can be shown as follows:

ie =vbe

rπ+ gmvbe =

vbe

rπ(1+ gmrπ)

=vbe

rπ(1+ β) = vbe/(

rπ1+ β

)

=vbe

re

re is not shown in hybridπ model because theπ model is usually used for common-emitter

connection type, andre is just a equivalent resistance in this case. If using some other equivalent

small signal model, such as T model[Sedra/Smith(1998)], re exists there.

Early Effect and Output resistance

When connected in the common-emitter configuration, where the emitter serves as a common

terminal between the input and output ports and the collector voltage goes below that of the base

by more than 0.4V, that is a low values ofvCE, the collector-base junction becomes forward

biased and the transistor leaves the active mode and enters the saturation mode. One can find

the iC − vCE curve, though still straight lines, have finite slope. In fact, when extrapolated, the

characteristic lines meet at a point on the negativevCE axis, atvCE = −VA. The voltageVA, a

positive number, is a parameter for Bipolar Junction Transistor and it is calledEarly voltage.

The linear dependence ofiC on vCE can be accounted for by assuming thatIS remains

constant and including (1+ vCE/VA) in the equation(3.15) for iC as follows:

iC = ICS expVBE

VT(1+

vCE

VA) (3.23)

The nonzero slope of theiC − vCE straight lines indicates that the output resistance looking

into the collector is not infinite. Rather, it is finite and defined by

ro = [∂iC∂vCE

∣

∣

∣

∣

∣

vBE=const]−1 (3.24)

Using equation(3.23) we get that:

ro =VA + VCE

IC(3.25)

whereIC andVCE are the coordinates of the point at which the BJT is operatingon the

particulariC − vCE. Alternatively, we can write

40


ro =VA

I ′C(3.26)

whereI ′C is the value of the collector current with the Early effect neglected as shown in

equation(3.15)

Capacitance

The resistorrπ, though, dominates the input impedance at low frequency. Athigh frequency,

Cπ and the Miller effect1 caused byCmu dominate.

Cµ is due to the collector-base reverse biased diode capacitance. Cπ has two components,

due to the junction capacitance (forward-biased) and a diffusion capacitance:

Cπ = Cbe j+Cdi f f (3.27)

3.2.4 First order all-pass function realized by HBT

The all-pass function expressed as equation(3.6)can be synthesized using the common-

emitter stage (differential pair) depicted in Fig.(3.6). Normally, in low frequency band, the

various capacitances are neglected as open circuit, but with the frequency’s increasing the

impedancesC also rises, wheres = ω j. So in high frequency, the capacitanceCπ andCµshould be taken into consideration. This is illustrated in figure(3.6). A node equation at the

collector provides the small signal current thoughCµ between base and collector:

Iµ = sCµ(vπ − vout) (3.28)

and the currentIµ divides into emitter and the output resistor:

Iµ =vout

RC+ gmvπ (3.29)

after combination of equation (3.28) and (3.29), we can get

sCµ(vπ − vout) =vout

RC+ gmvπ (3.30)

which can be manipulated to the form:

1Miller effect describes the fact that the capacitanceCµ, between input and output of the transistor

when it is used as an amplifier, is multiplied by a factor of 1− Av, whereAv is the voltage gain of the

amplifier.

41


C

E

B

B C

E

+

-

V1

Vsig

RC

RC

VBB

Vin

Vout

iµ

Cµ

vπ cπrπgmvπ

ro

vinvout

Figure 3.6: Common emitter circuit and its small signal model

vout

vπ= −RCgm

1− sCµ/gm

1+ sCµRC(3.31)

By comparing this equation with the equation(3.6), it is found that they could be the same

if RC =1

gm. The time delayτ = 2CµRC.

In the analyze above, some parameters such asro, Cπ and so on are neglected.

This is because

• Note that we have not included the HBT output resistancero; including ro complicates

the analysis considerably. If the HBT is driven with very lowDC current(e.g. lower

than 1mA), according toro = VA/IC, the resistancero will be very large comparing with

theRC which is around hundredsOhm, hence, the effect ofro on circuit performance is

small andro could be seems as open circuit approximately. We shall not include it in the

analysis at present.

• Cπ is much more smaller thanCµ and for the first order approximated function, it could

be neglected.

• Assuming that the input impedance of next stage is much more lager thanRC, the input

impedance of next stage can also be neglected

The following two special cases which should be mentioned here are Emitter degeneration

resistance and Miller effect. They are very important because they could highly affect the

performance of the delay stage.

42



C

E

B

B C

E

+

-

V1

Vsig

RC

RC

VBB

Vin

Vout

iµ

Cµ

vπ cπrπ

gmvπro

re R′E

ie

RE

RE

vin

vout

Figure 3.7: A common emitter configuration with emitter resistance

3.2.5 Emitter degeneration resistance

It is a very common that a resistance is included in the signalpath between emitter and

ground, as shown in figure(3.7), can lead to significant changes in the circuit’s characteristics.

Analysis of the circuit in Fig(3.7) can be performed by replacing the HBT with its small-

signal model. To determine the relationship between base-emitter voltagevπ and inputvin, we

note that

vin = vπ + vE (3.32)

wherevE is the voltage atRE.

and by neglectingro which is treated as open circuit and the currentib throughrπ which is

ie/β (β is from a couple of tens to two hundreds), we get

vE = ie ∗ RE (3.33)

and

ie = gmvπ (3.34)

whereR′E denotes total resistance in the emitter which is the sum of the RE outside of the

transistor andre which is represented in equation(3.23), re =rπβ+1rπ and take equation(3.22)

43


Chen Chen

Cross-Out


into consideration, there can be expressed as

re =rπ

1+ β(3.35)

=VT

(1+ β)IB(3.36)

=VT

IE(3.37)

Normally, re is too small to be taken into consideration but when the transistor is driven

in very low emitter DC currentIE(e.g. around 0.1mAor lower), re could be comparable with

emitter resistorRE and output resistor (here, it is seemed asRC) therefore, it cannot be ne-

glected.

By combining equation(3.32)(3.33)(3.33), the relationship betweenvin andvπ can be ex-

pressed as

vin

vπ= 1+ gmRE (3.38)

According to equation(3.38) and small signal model, we can deduce that:

1. The equivalent transconductanceg′m could be expressed as

g′m =vin

ic(3.39)

=icvπ

vπvin

(3.40)

=gm

1+ gmRE(3.41)

2. The input resistance is increased by factor (1+ gmRE) because with the same current,

the input voltagevin is increased by factor (1+ gmRE) as shown in equation(3.38)

3. The voltage gain from base to collector,Av, is reduced by the factor (1+ gmRE)

4. The high-frequency response is significantly improved (as discussed later in Miller ef-

fect)

With the reduction of gain, the resistanceRE introduces negative feedback in the unit-gain

delay stage. If for some reason the collector current increases, the emitter current will also

increase, resulting in an increased voltage drop acrossRE. Thus the emitter voltage rises, and

the base-emitter voltage decreases. The latter effect causes the collector current to decrease,

counteracting the initially assumed change, an indicationof the presence of negative feedback.

44


If considering the emitter degeneration resistance, the transconductancegm in equation(3.31)

should be replaced with the new equivalent oneg′m as shown in equation(3.39), it results in:

vout

vin= −

RCgm

1+ gmR′E

1− sCµ(1+ gmR′E)/gm

1+ sCµRC(3.42)

3.2.6 Miller effect

B C

E

+

--

+

C

E

+

-

+

-

(a)

(b)

B1

B1

RCVsig

Rsig

V′sig

R′sig

Iµ

Iµ

Cµ

vπ

vπ

cπ

cπrπ

gmvπ

gmvπ

ro

R′L = ro//RL//RC

xµ

x′µ

Ceq

Cin = Cπ +Ceq = Cπ +Cµ(1+ gmR′L)

RL

R′L Vo

Vo

Figure 3.8: Determining the high-frequency response of delay stage (a) equivalent

circuit (b) simplified equivalent

The high-frequency equivalent small signal model is shown in fig()(a), which includes load

resistanceRL, collector resistanceRC and small signal source resistanceRsig. The equivalent

45


Chen Chen

Highlight


circuit in (a) can be simplified by utilizing Thevenin theorem at the input side and by combining

the three parallel resistances at the output side, as shown in (b) and we have:

V′sig = Vsigrπ

rπ + Rsig(3.43)

R′sig = Rsig//rπ (3.44)

R′L = ro//RC//RL (3.45)

The circuit can be simplified further if we can find a way to dealwith the bridging capaci-

tanceCmu that connects the output node to the input node,B. Toward that end consider first the

output node. It can be seen that the load current is (gmVπ− Iµ), wheregmVπ is the output current

of the transistor andIµ is the current supplied through the very small capacitanceCµ. To as-

sume thatIµ is still much smaller thangmVπ, with the result thatVo can be given approximately

by

Vo ≈ −gmVπR′L (3.46)

SinceVo = Vce, equation(3.46) indicates that the gain from B to C is−gmR′L and the current

Iµ can now be found from

Iµ = sCµ(vπ − vo) (3.47)

= sCµ[vπ − (−gmR′LVπ)] (3.48)

= sCµ(1+ gmR′L)Vπ (3.49)

Now, in figure()(b), the left-hand side of the circuit, atXX, knows of the existence ofCµonly through the currentIµ. Therefore we can replaceCµ by an equivalent capacitanceCeq

betweenB and ground as long asCeq draws a current equal toIµ. That is,

sCeqVπ = Iµ = sCµ(1+ gmR′L)Vπ (3.50)

which results in

Ceq = Cµ(1+ gmR′L) (3.51)

UsingCeq enables us to simplify the equivalent circuit at the input side to that shown in

Fig()(b), which we recognize as a single-time-constant (STC) network of the low-pass type.

Therefore we can expressVπ in terms ofV(sig)′ as

Vπ = V′sig1

1+ s/ω0(3.52)

46


whereω0 is the corner frequency of the STC network composed ofCin andRsig′.

ω0 =1

CinR′sig

(3.53)

whereCin is the total input capacitance atB,andR′sig is the effective source resistance

generated from equation(3.44).

Cin = Cπ +Ceq = Cπ +Cµ(1+ gmR′L) (3.54)

Combining the All-pass function shown of the delay stage in equation(3.31) give the volt-

age gain in the high-frequency band as

AV =VO

Vsig=

VO

Vπ

VπVsig

(3.55)

= −RCgm1− sCµ/gm

1+ sCµRC

11+ s/ω0

(3.56)


1+ sCµRC

11+ sCinR′sig

(3.57)


1+ sCµRC

11+ s[Cπ +Cµ(1+ gmR′L)](Rsig//rπ)

(3.58)

If there is a emitter resistance taken into consideration, we just need to replacegm with

g′m =gm

1+gmR′E, which is discussed in ”Emitter resistance degeneration”

We thus see that the high-frequency response will be a function of a low-pass STC network

with a 3-dB frequencyfH determined by the time constantCinR′sig. Since that our delay stages

gain must be constant and behave as a all-pass filter, the 3-dBfrequencyfH should be higher

than the 10GHzwhich is the up limit of bandwidth of the analog correlator discussed in this

thesis.

47

Chapter 4

Delay Stage Design Consideration

The design of delay stages should be treated very seriously because it is different with the

normal analog circuit that hundreds even thousands of delaystages will be used in the analog

correlator circuit. The difference results in the sensitivity of the analog correlator circuit that

a very small flaw, which might be neglected in a single delay stage, would be enlarged after

hundreds of stages so that the performance of the whole circuit will be influenced seriously.

In this chapter, I will present that what problems may be occurred in the delay stage and

how serious the influence would be. At the same time, some solutions to eliminate the problems

or to degrade the influence will be discussed at last.

4.1 The gain of delay stage

4.1.1 DFT and Windows

At beginning, Let’s compare with the theoretical foundation of autocorrelation spectrome-

ter outlined in chapter 2, the practical implementation differs in a number of points.

We can see that the main differences are:

First, autocorrelation data result is discrete in time. Theoutput of the each multiplier is an

autocorrelation sequence with different delay lengths:Rx(t+ τ), Rx(t+2τ), Rx(t+3τ),. . .Rx(t+

nτ).

Second, the data set is finite. As we know in the signal processing knowledge, the spectrum

resolution depends on the length of sampling sequences. It is one period length of the minimum

frequency signal we can distinguish in the spectrum. So the longer the sequences, the better

the resolution.

48


The collected outputs of these finite discrete values are processed by using DFT (Discrete

Fourier Transform) and transformed in the frequency domainto form the power spectrum.

Time

Time

Time

(a)

(b)

(c)

Sample

interval

Rectangular window

Figure 4.1: (a) infinite duration input signal; (b) rectangular window due to finite-time

sample interval; (c) product of rectangular window and infinite-duration input

If we consider the infinite-duration time signal shown in figure (4.1)(a), a DFT can only be

performed over a finite-time sample interval like that shownin figure (4.1)(c). We can think of

the DFT input signal in figure (4.1)(c) as the product of an input signal existing for all time,

figure (4.1)(a), and the rectangular window whose magnitude is 1 over the sample interval

shown in figure (4.1)(b). Anytime we take the DFT of a finite-extent input sequence we are,

by default, multiplying that sequence by a window of all onesand effectively multiplying the

49

Chapter3/Chapter3Figs/samprect.eps


input values outside that window by zeros.

-N/2+1 N/2

K

n

2N/K

Main

lobe

m

|X(m)|

x(n) ts

K*ts

N*ts

1/Nts = fs/N

fs Hz

0

-fs/2 Hz fs/2 Hz

Figure 4.2: Rectangular function in time domain and Sinc function in frequency do-

main

Rectangular window is a sinc function off if transform in frequency domain. A general

rectangular functionx(n) can be defined as N samples containing K unity-valued samples as

shown in Figure(4.2). The full N-point sequence,x(n), is the rectangular function that we

want to transform. We call this the general form of a rectangular function because the K unity

samples begin at a arbitrary index value Let’s take the DFT ofx(n) to get X(m) in frequency

domain. Usingmas our frequency-domain sample index, the expression for anN-point DFT is

X(m) =N/2∑

n=−(N/2)+1

x(n)e− j2πnm/N (4.1)

X(m) =sin(πmK/N)sin(πm/N)

(4.2)

WhenN is very large, sin(πm/N) can be approximated asπm/N, equation(4.2) can be expressed

alternately as:

50

Chapter3/Chapter3Figs/sinc.eps


X(m) = N ·sin(πmK/N)πm

(4.3)

If we decide to relateX(m) to the time sample periodts which is the time delay per stage,

or the sample ratefs = 1/ts, then the frequency axis variable ism/Nts = m fs/N. So eachX(m)

sample is associated with a cyclic frequency ofm fs/N Hz. In this case, the resolution ofX(m)

is fs/N. But when analyzing the spectrum, it is normally to define thewidth of the main lobe

as the resolution, from figure(4.2), we can calculate the width of main lobe and it may written:

Wmainlobe=2NK

1Nts=

2Kts=

2 fsK

(4.4)

where,K is the window’s sampling sequence’s length,ts is the sampling interval andfs sam-

pling frequency, so the resolution of the spectrum is definedas 2 times sampling frequency

divided by sampling sequence length.

The DFT repetition period, or periodicity, isfs Hz, as shown in figure(4.2). If we substitute

the cyclic frequency variablem fs/N for the generic variable ofm/N in equation(4.1), we obtain

an expression for the DFT of a symmetrical rectangular function, whereK < N, in terms of the

sample ratefs in Hz. That expression is

X(m fs) ≃ Nsin(πm fsK/N)πm fs

(4.5)

The table below is given to convert between different representations of the DFT’s fre-

quency axis:

DFT Frequency X(m) frequency resolution Repetition Interval Frequency

Axis Representation variable of X(m) of X(m) Axis Range

Frequency in Hz m fs/N fs/N fs - fs/2to fs/2

Frequency in radians mωs/N ωs/N ωs -ωs/2toωs/2

As mentioned in [?,page 20], ”Multiplication in time domain is equivalent to convolution

in the frequency domain.” It can be expressed as equation below:

z(t) = x(t)w(t) (4.6)

Z( f ) =

∞∫

−∞

X(α)W( f − α)dα (4.7)

where x(t) and X(f) are signal function in time and frequencydomain, w(t) and W(f) win-

dow function in time and frequency. A Sketch of transform is shown in figure(4.3)

51


t

t

t

f

f

f

T

T-T

1

1

- f0

T

(a)

(f)

(e)

(d)

(c)

(b)

x(t) = cos(2π f0t) X( f ) = δ( f + f0) + δ( f − f0)

w(t): window function in tome domain

z(t) = x(t)w(t)

f0

W( f ): window function in frequency domain

Z( f ) =∞∫

−∞

X(α)W( f − α)dα

1/T

Figure 4.3: Convolution in the frequency domain

52

Chapter3/Chapter3Figs/convmulti.eps


The pictures on the right-hand-side are the signals in time domain and their corresponding

signals in frequency domain are on the left-hand-side.

It should noted here the spectrum of autocorrelationRxx(τ) is the power spectrum of signal

x(t). After correlation, the window function is not rectangular but a triangle window which is

the autocorrelation of rectangular window function, as shown in figure(4.4).

It is obvious that in frequency domain, side lobes of triangle window is much smaller than

rectangular window and this characteristic will improve power spectrum’s performance.

4.1.2 Nonconstant gain

As the figure(2.3) shows, between every neighboring time delay stages, thereis a tap con-

nected to the multiplier. The ratio between the voltages’ magnitude of neighboring taps is

called delay stage gain in this thesis. It requires unit gainover 10GHz bandwidth, which means

the delay stage only delayed the signal but does not change the signal’s weight.

However, in practical active analog circuit, it is very difficult to generate the absolute con-

stant unit gain over the whole band. A tiny deviation from unit gain per stage will lead to a

large difference after many stages as shown in plot in figure(4.6)

In the top plot, deviation is±0.01, one percent change is nearly no influence for one single

delay stage but after n stages the gain between the output andoriginal signal is (1±deviation)n,

which is a geometric series and the rate of rise or drop is veryfast. A table is given below to

illustrate the total gain between the output at nth stage andthe original signal, with different

deviation:

Gain after 100 stages 200stages 500stags

gain=1+0.01 2.7048 7.3160 144.7728

gain=1-0.01 0.3660 0.1340 0.0066

gain=1+0.001 1.1051 1.2213 1.6483

gain=1-0.001 0.9048 0.8186 0.6064

From this table, we can conclude that for an analog correlator with a couple of hundreds

stages, the deviation of gain per stage should be smaller than 1%, otherwise, after hundreds of

stages, the voltage swing would become so large that the active circuit would be out of ”small

signal model” and the signal might be distorted.

Even the deviation of gain is lower than 0.1%, it may also lead to some problems:

• First is that the sampling window is not rectangular, hence the window function in fre-

quency domain will not be sinc function. Examples are shown in figure(4.7) and (4.8).

Assuming that there are 200 delay stages, the total gain is the voltage ratio between the

53


t

t

t

t

t

t

t1 t2

t2

t1

0

T = t2 − t1

x(t)

x(t + τ)

τ = −T

tau< 0

τ = T

tau> 0

τ = 0

τ

t1 + τ

t2 + τ

R(τ)

whenτ < 0

whenτ ≥ 0

t2+τ∫

t1

dt = t2 − t1 + τ

t2∫

t1+τ

dt = t2 − t1 − τ

Figure 4.4: autocorrelation of rectangular window

54

Chapter3/Chapter3Figs/gaintri.eps


t

f

Rectangular Window

Triangle Window=correlation of Rectangular Window

Triangle Window in frequency domain

(a)

(b)

(c)

τ

x(t)

Rxx(τ)

∫

Rxx(t)e−2π f tdt

Figure 4.5: (a): Rectangular window in time domain; (b) Triangle window in time

domain; (c) Triangle window in frequency domain.

original input and output of nth stage, n is the stage number.From the window’s curve

in frequency domain, it is found that the main lobe’s peak’s difference is far more larger

than the deviation. For the gain’s deviation 0.001 and 0.005, the difference of the main

lobe’s peak are respectively 10% and 60% of unit gain. It is possible that, for a signal

with various frequency components which have different gain per stage, some frequency

components with smaller gain could be disturbed by frequency with larger gain.

• Second is that, when the gain is not unit, the window’s shape in frequency domain is

dependent on the number of delay stages or the sampling sequence length if the sam-

pling interval per stage is fixed. In figure(4.9), the plots are the window’s envelopes in

frequency domain of different delay stage numbers. The more stages, the higher peak of

main lobes and side lobes. For the gain 0,001, as shown in ploton the top, it is possible

to build a correlator with 500 delay stages even 1000. But forthe gain 1.005, it seems

2 hundreds is the maximum delay stages number, if with largerdelay stages number,

some frequency components would be covered by some others. the bottom plot, where

gain= 1.005,

In this part, a general sense of nonconstant gain effect is discussed, but not much details of

55

Chapter3/Chapter3Figs/trimat.eps

Chen Chen

Cross-Out


0 50 100 150 200 250 300 350 400 450 500

1000

Stages sequence number

n

gain=1+0.01gain=1 - 0.01100

10

1

0.1

0.01

0.001

Gai

n

0 50 100 150 200 250 300 350 400 450 500

100.2

Stages sequence's number

100.1

100

10-0.1

10-0.2

Gai

n

gain= 1+ 0.001gain= 1− 0.001

Figure 4.6: Plot of gain vs delay stage number: in the top plot, gain= 1± 0.01; in the

bottom,gain= 1± 0.001

quantitative analyze because it is too difficult to analyze the effect without knowing requirement

of precision and time delay per stage in real circuit.

4.1.3 Emitter follower

To suppress the effect caused by the constant gain, the delay stages should be designed

very carefully with deviation as small as possible or with delay time length as long as possible

but not longer than 50 picosecond which is corresponding to the minimum sampling frequency

20GHz. The spectrum’s resolution is defined as the width of the mainlobe. As shown in

figure(4.2), the total sampling sequence length in time equals the product of sampling interval

and sampling number, thus for the fixed resolution, the longer the sampling time interval, the

less the delay stages needed and it would be safer.

56

Chapter3/Chapter3Figs/gain11.eps

Chapter3/Chapter3Figs/gain12.eps


n

gain perstage=1.001

gain perstage=1

gain perstage=0.999

number of stages

red curve: gain=1.001

blue curve: gain=1

green curve:gain=0.999

(a) window envelope curve in time domain

(b) window envelope curve in time domain

m

0.2

0.4

0.6

0.8

1

1.2

-60 -40 -20 0 20 30 40

0

50 100 150 2000

0.9

1.0

1.1

1.2

0.8

1.3

Total Gain

Figure 4.7: Windows’ function envelope when gain pers tage= 1± 0.001

There are many reasons causing the nonconstant gain, such asprocess, voltage, and tem-

perature (PVT) variations. Miller effect is one of them. As illustrated in chapter 2, Miller

effect leads to a pole in the transfer function of delay stage. This effect can also be understood

alternately as an equivalent circuit shown in figure (??), the input impedance is dominated

by resistance in low frequency band, but by Miller capacitance in high frequency band which

means the input impedance is decreasing with frequency increasing.

According to equation(3.54), the pole at frequencyf = 12πCinR′sig

can be moved in higher

frequency band by adjusting the value ofCin andRsig. This can be realized by inserting an

emitter follower between neighboring delay stages.

A major advantage of the emitter follower is its excellent high-frequency response. This is

because none of the internal capacitances suffers from the Miller effect. Hence, its poles are

much more higher than common emitter circuit as expressed inAppendix A.

Figure(4.11) shows the high-frequency equivalent circuit of a emitter follower fed with a

signalVsig from a source having a resistanceRsig. It is biased by a constant current sourceI

which could offered by a current mirror. The resistanceRL at the output includes the output

resistance of current sourceI as well as any actual load resistance.

Reference to figure(4.11) reveals that the HBT has a resistancero ‖ RLin series with the

emitter resistancere. Thus application of the resistance reflection rule resultsin the equivalent

57

Chapter3/Chapter3Figs/compare001.eps


n

gain perstage=1.005

gain perstage=1

gain perstage=0.995

number of stages

red curve: gain=1.005

blue curve: gain=1

green curve:gain=0.995

(a) window envelope curve in time domain

(b) window envelope curve in time domain

m

0 5 0 1 0 0 1 5 0 2 0 0 2 5 0 0

0 . 5

1

1 . 5

2

2 . 5

3

- 4 0 - 2 0 0 2 0 4 0 6 0

0

0 . 5

1

1 . 5

Total Gain

Figure 4.8: Windows’ function envelope when gain per stage= 1± 0.005

circuit shown in figure(4.11)(b). The current flow through this branch isie = βib, so multiply

all resistances in the emitter by (β + 1), the ratio ofie to ib. And the current flow throughrpi

andcpi is ib, is much more smaller thanie, thus the voltage drop will also be too small to be

counted, comparing with which on the emitter.

According to the analyze above and figure(4.11)(b), the input impedance at base,Rin is

Rin = 1/sCµ ‖ (β + 1)[re + (ro ‖ RL)] (4.8)

Considering the currentic and ib is much more larger thanib, rπ andCπ can be approxi-

mated as open circuit, thus the output resistance is

Rout = re ‖ ro (4.9)

The relation ship between output voltage and input voltage can be generated easily by using

”T” model equivalent circuit shown in figure(4.12), because the zero and poles are in very high

frequency band, so they are neglected in this equivalent model.

The overall voltage gainAV is:

AV =(β + 1)(ro ‖ RL)

Rsig + (β + 1)[re + (ro ‖ RL)](4.10)

58

Chapter3/Chapter3Figs/compare002.eps

4.2 Nonconstant time delay

- 4 0 - 3 0 - 2 0 - 1 0 0 1 0 2 0 3 0 4 0 5 0 0

0.5

1

1.5

- 5 0 - 4 0 - 3 0 - 2 0 - 1 0 0 1 0 2 0 3 0 4 0 0

5

1 0

1 5

2 0

2 5

(a) window function in frquency domain when gain when gain perstage =1.001

gain perstage=1.005

gain perstage=1.001

red curve: gain=1000stages

blue curve: gain=500stages

green curve:gain=200stages

red curve: =1000stages

blue curve: =500stages

green curve:=200stages

m

m

(b) window function in frquency domain when gain when gain perstage =1.005

Figure 4.9: Window’ envelope curves according to various stage numbers

We observe that the voltage gain is less than unity; however,for (β + 1)[re + (ro ‖ RL)] ≫

Rsig, it becomes very close to unity. Thus the voltage at the emitter follows very closely the

voltage at the input.

We can see that the emitter follower exhibits a high input resistance, a low output resistance,

a voltage gain that is smaller than but close to unity, and a relatively large current gain. Because

its small output resistance decreases the time constantCinRsig, the pole will move in the higher

frequency. It is very suitable to used as a buffer between two delay stages.


The transfer function of delay stage discussed in the chapter 2 is a first-order approximation

of all-pass function, which can be realized by an active analog circuit. However, in the practical

circuit, it is impossible to obtain the absolute constant time delay, thus the time delay will differ

with frequency more or less. In this part, a discussion of nonconstant time delay is given.

The discussion begins with signal processing theory. Assume there is a signal:

x(t) =n∑

i=1xi(t)

59

Chapter3/Chapter3Figs/stages.eps


C

E

B

C

E

B

...

inputoutputinputoutput

... cinrin

rout

vout

Vin

Figure 4.10: Equivalent circuit of input and output port

wherexi(t) = Ai sin(ωi + θi) represents the component at frequencyfi = ωi/2π with ampli-

tudeAi.

We defineRi(τi) as the autocorrelation of frequency componentxi here andτi0 = D( fi) as

the time delay length per stage, which is a function of frequency.

If transformed to phase spectrum, the phase shift of sinusoid at frequencyfi per stage at is

P( fi) = −τi0 · fi = D( fi) · f (4.11)

For the constant time delay:

D( f ) = τ0, f ∈ (0, fup] (4.12)

where fup is 10GHz for the delay stage circuit discussed in this thesis.τ0 is the constant delay

time per stage. Thus,

P( f ) = −τ0 f (4.13)

which is a linear phase shift as shown in figure().

For the constant time delay, it is obvious that the sum ofRi is the autocorrelation ofx(t)(it

is mentioned in chapter 2):

Rxx(τ) =∑

Ri(τ) (4.14)

But for the nonconstant time delay, the delay time per stageτi0 = D( fi) differs with various

frequencies which means the traveling speed of sinusoids indelay stages are various. As to the

wave traveling equation:

v = f · λ (4.15)

60

Chapter3/Chapter3Figs/miller.eps

Chen Chen

Highlight


C

E

B

E

CBB'

I

+

_

'

+

_

(a) (b)

VsigVsig

RsigRsig

VCC

RL

RL

VO

VO

Cµrπ

CπVπgmVπ

R′L = RL ‖ ro

Figure 4.11: (a)Emitter follower (b) High-frequency equivalent circuit

when wave speed is fixed, the frequency is only dependent on wavelengthλ, but if the speed in

the delay stages is various with frequencies, the sinusoids’s power spectrum, measured by the

active analog correlator, will shift from the real.

To analyze the effect of nonconstant delay, let’s set constant time delayτ0 and its power

spectrum as the reference and compare the difference of the power spectrum between the cases

of constant and nonconstant time delay.

In the case of nonconstant time delay, we define

Rxx(τ)′ = 〈x(t)x(t − D( f ))〉 (4.16)

where〈〉 denotes the time average, which is used to replace integration for simplification,R′xx

is the sum of components’ autocorrelation.

the product ofx(t)x(t − D( f )) can be divided to two terms as:

∑

xi(t)∑

xi(t − τi) =∑

i, j

xi(t)x j(t − τ j) +∑

i= j

xi(t)x j(t − τ j) (4.17)

the first term’s time average is zero, because the sinusoids’orthogonality which is approved

as below:

⟨

xi(t)x j(t − τ j)⟩

=AiA j

2T

T∫

−T

sin(ωi t + θi) sin(ω j t + θ j + ω jτ j)dt = 0 (4.18)

because the integration variable ist so (θ j + ω jτ j) is a constant fort, thus, which can be replaced

by φ j .

61

Chapter3/Chapter3Figs/efollower.eps


E

C

B

Rin

Rout

+

_

Vout

Rsig

Vsig

αie

ro

re

RL

Figure 4.12: An equivalent T model circuit of emitter follower

T∫

−T

sin(ωi t + θi) sin(ω j t + φ j)dt =12

T∫

−T

cos((ωi − ω j)t + θi − φ j) + cos((ωi + ω j)t + θi + φ j)dt

(4.19)

If integration timeT is long enough, the sinusoid’s time average should be zero.

The second term in equation(4.17), can be processed as:

〈xi(t)xi(t − τi)〉 =A2

i

2T

T∫

−T

sin(ωi t + θi) sin(ωi t + θi + ωiτi)dt (4.20)

=A2

i

4T[

T∫

−T

cos(ωiτi)dt −

T∫

−T

sin(2ωi t + 2θi + ωiτi)dt] (4.21)

=A2

i

4T

T∫

−T

cos(ωiτi)dt (4.22)

=A2

i

2cos(ωiτi) (4.23)

Combining equation from(4.16) to (4.19), we can get

R′xx =∑

i

A2icos(ωiτi)

2(4.24)

62

Chapter3/Chapter3Figs/tmodel.eps


if τi = τ0 is a constant, the functionR′xx becomes the autocorrelation functionRxx.

In the active analog correlator circuit, the axis ofτ is discrete and the sampling interval is

the time delay length per stage, hence, the discrete autocorrelation of frequencyfi is

Ri(nτi0), n = 1, 2, 3, . . .N (4.25)

wheren is the sampling sequence andN is the total sampling number. Thus, equation(4.24)

should be modified as a discrete one:

R′xx(n) =∑

i

A2i

2cos(ωinτi0), n = 1, 2, 3, · · ·N (4.26)

As expressed equation(2.20) , by using Discrete Fourier Transform to functionRxx(n)′, the

power spectrum can be generated as:

S′( f ) =N∑

n=1

∑

i

A2i

2cos(ωinτi0)e− j2π f nτ0 (4.27)

=∑

i

A2i

2

N∑

n=1

cos(ωinτi0)e− j2π f nτ0 (4.28)

(4.29)

the power at frequencyfi is

Si( f )′ =A2

i

2

N∑

n=1

cos(ωinτi0)e− j2π f nτ0 (4.30)

because time average of sine term is zero, so equation(4.27) can be simplified as:

Si( f )′ =A2

i

2

N∑

n=1

cos(ωinτi0) cos(2π f nτ0) (4.31)

where,f andτ0 are the reference variables in case of constant time delay. Let’s defineα( fi)

as:

α( fi) =τi0

τ0(4.32)

whereα( fi) is ratio between the nonconstant time delay per stage at frequency fi and ref-

erence constant time delay per stage.

According to orthogonality of cosine function, the productof cos(2π finτi0) and cos(2π f nτ0)

is nonzero only whenfinτi0 = f nτ0 or α( fi) fiτ0 = fτ0, thus

f = α( fi) fi (4.33)

63


and power weight at this frequency isA2i /4, where the weight at minus frequency is neglected.

From equation(4.32), if we take the case of constant time delay as the reference,the com-

ponent whose real frequency isfi will appear at frequency positionf ′i = α( fi) fi. It may disturb

the real frequency component atf ′i if its time delay per stage is the reference time delayτ0, or

α( f ′i ) = 1.

However, normally the functionα( f ) follows some law, for example:

α( f ) = a f + b

wherea > 0 andb are arbitrary real number.

Thus f ′i = a f2i + b fi which is nonlinear comparing the reference frequency axis,and the fre-

quency axis off ′ are extended or shorten comparing with reference frequencyaxis and there

is no overlap happened, because it is a monotonic function inthe right plane.

If we know the functionα( f ) and it is monotonic, the right power spectrum could be

recovered by changing the scale of reference frequency axisaccording to the functionf ′ = α( f )

The power spectrum recovery can be done with the phase spectrum plot. Combining equa-

tion (4.11) and (4.32)The phase function can be expressed in another way:

P′( f ) = −α( f )τ0 f (4.34)

Let’s have a look at the sketches shown in figure(4.13), The plot on the top side shows a

constant time delay curve and a nonconstant time delay curverising with frequency. If trans-

formed into phase-frequency plane, the slope of phase shiftid the time delay as shown on the

bottom plot. For a sinusoid at frequencyf2, we assume that the phase shift isθ1 for constant

time delay andθ2 for nonconstant time delay. While if the signal’s real time delay is noncon-

stant but it is processed in the case of constant time delay. The phase shiftθ2 will be considered

to occur at frequencyf3. On the reference frequency axis, the power weight off2 will appear

at f3, and power weight off1 will occupy the position off2. So if we want to obtain the right

spectrum, the scale of frequency axis should be adjusted asfrecovery. When the phase-frequency

is a monotonic or one-on-one mapping function, the relationship between andfrecovery is also

one-on-one, which avoids the spectrum’overlap - more than one frequencies’ power weight

at fre f erenceare shifted to a same position atfrecovery. An example of overlap phenomenon is

shown in figure(4.14) .

64


taueq

(a)constant delay

nonconstant delay

(b)

ffi

f1

f1

f2

f2 f3

τ

τ0

τi0

θ 1θ 2

θ

fre f erence

frecovery

Figure 4.13: (a) time delay vs frequency plot (b) phase shiftvs frequency plot

65

Chapter3/Chapter3Figs/phasetime.eps


overlap

constant delay

nonconstant

ff1

f1f2

f2 f3

θ

Figure 4.14: An example for frequency’s overlap

66

Chapter3/Chapter3Figs/overlap.eps

Chapter 5

Multiplier

Multiplier is an analogue device used to multiply two signals together. In the active analog

autocorrelator circuit discussed in this thesis, the signal is delayed by using active delay stages

introduced in the last chapter, then the delayed signal is multiplied with the original one by

using a analog multiplier which is the topic of this chapter.After multiplication, the products

is integrated to get the time average. In this chapter, some fundamental concepts of multiplier

is introduced first. Following, the principle of gilbert-cell multiplier used in our active analog

correlator is illustrated.

5.1 Multiplier’s function

The function of a multiplier is just as its name implies, it multiplies two signals together.

Ideal multipliers satisfy the fundamental multiplicationexpression

z= (AO)xi x j (5.1)

where outputZ is the product of input signalsX andY, andAO, the multiplier gain constant.

Let’s specify that

xi = Ai sin(ωi t + θi) x j = A j sin(ω j t + θ j)

The resulting multiplied signal Z will be:

z= AOAiA j sin(ωit + θi) sin(ω j t + θ j) (5.2)

By using this trigonometry identity:

sinα · sinβ = −12

[cos(α + β) − cos(α − β)] (5.3)

if we let

67

5.2 Bipolar Differential pair

α→ (ωi + θi)

β→ (ω j + θ j)

then we have:

z=At

2[cos((ωi + ω j) + (θi + θ j)) − cos((ωi − ω j) + (θi − θ j))] (5.4)

if i , j, the outputz is the the sum of these two signal’s frequency sum and frequency differ-

ence. After integration, the time average ofzwill be zero.

else if i = j, the frequency of the difference term(second term) in equation(5.4) is zero,

which means the second term becomes a DC component. After integration, the first sum term,

frequency of which is 2ωi will be zero and the time average ofz is a DC value contributed by

the difference term.

Thus, if the input of multiplier is a practical signal with various frequency components,

in the output of multiplier, only the DC components generated by the same frequencies make

sense. Because, after integration, all the other AC components’ time average will be zero.


Multiplying voltage or current waveforms is a nonlinear process. We can realize the func-

tion by feeding two signals to a nonlinear device. A large number of analog multipliers are

based on an exponential transfer function of bipolar transistors (BJTs). Actually, a differential

stage with coupled emitters may constitute an elementary multiplier cell capable of generating

(differential) collector output currents which are dependent ona differential voltage applied to

its inputs, (e.g., to the base terminals of a bipolar transistor pair forming the differential stage)

and the voltage which controls differential pair’s tail current.

To evaluate bipolar multiplication, the single differential pair of figure() is first evaluated.

The exponential I-V relation applied to each transistor canbe expressed as:

Ic = ICSeVbe/VT (5.5)

this equation is mentioned in chapter 2, whereIc is the collector current,ICS is the saturation

current,VT is the thermal voltage, andVbe is the base emitter voltage, which is:

Vbe= Vb0 ±v1(t)

2(5.6)

v1 is a small signal and the common DC componentVb0 is implied through the current bias.

It is adjusted automatically so the sum of the currents through the two transistors becomes the

bias current, i.e.

68

Chen Chen

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Chen Chen

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Q1 Q2B1

B2

C1 C2

E1 E2

+

_

(a)

IET

I1e I2e

I1c = Ic0 + ∆IcI2c = Ic0 − ∆Ic

I1b = Ib0 + ∆Ib

I2b = Ib0 − ∆Ib

∆Ic

vb1

vb2

vbe1 vbe2v1

∆Ic =α f IES

2v1(t)2VT

Figure 5.1: Differential Pair

I1e = IESeVb0/VT ev1/VT I2e = IESeVb0/VT e−v1/VT (5.7)

The tail currentIET is the sum of the emitter current ofQ1 andQ2:

IET = I1e+ I2e = IES[eVb0/2VT + e−Vb0/2VT (5.8)

The differential output current is the deviation∆Ic from the bias currents, which is indicated

in figure(), a circulate through both transistor and the output load,

∆Ic =12

(I1c − I2c) (5.9)

=α f IES

2eVb0/VT [ev1/2VT − e−v1/2VT ] (5.10)

=α f IES

2[ev1(t)/2VT − e−v1(t)/2VT ]

[ev1(t)/2VT + e−v1(t)/2VT ](5.11)

=α f IES

2tan(

v1(t)2VT

) (5.12)

69

Chapter4/Chapter4Figs/diffpair.eps

Chen Chen

Highlight

Chen Chen

Highlight


C1 C2

B2B1Q1 Q2

E1 E2

_

+

Q3

IET

I1eI2e

I1c = Ic0 + ∆Ic I2c = Ic0 − ∆Ic

I1b = Ib0 + ∆Ib

I2b = Ib0 − ∆Ib

∆Ic

vb1

vb2

vbe1 vbe2

v1

v2

Figure 5.2: Differential pair multiplier

If the amplitude ofv1 is small, compared toVT, we can take the first, linear term in Taylor

series1 expansion for approximation:

tan(v1(t)2VT

) =v1(t)2VT

(5.13)

Thus the differential current∆Ic may be written:

∆Ic =α f IES

2v1(t)2VT

(5.14)

The currentIET is actually the bias current for the emitter-coupled pair. With the addition

of more circuitry, we can makeIET proportional to a second input signal. If the current source

at the tail of differential pair is replaced with a bipolar controlled by smallsignal voltagev2, it

can be expressed through:

IET = I0 + ∆I0,∆I0 = gmv2, gm =I0

VT,VT =

kTq≈ 26mV (5.15)

Here, appropriate bias resistor settings establish the DC current level,I0 . Inserting into the

expression for the differential pair, equation(5.14), the differential output current may now be

written:1Taylor series of tanx: tanx = x− 1

3 x3 + 215x5 − 17

315x7 + · · · , |x| < π2 .

70

Chapter4/Chapter4Figs/diffmul.eps

5.3 Gilbert cell multiplier

∆Ic =α f IET

2tan(

v1(t)2VT

) (5.16)

=α f I0

2tan(

v1(t)2VT

) +α f I0

2VTv2 tan(

v1(t)2VT

) (5.17)

=α f I0

4v1(t) +

α f I0

4V2T

v1(t)v2(t) (5.18)

No multiplying is associated with the first term since it contains only one frequency com-

ponent. The second term holds the multiplication product. We assume that both the two small

signals are sinusoidal; if with different frequencies, result after integration is zero, if with same

frequencies, combing equation (5.4)and (5.18) the result may be written:

∆Ic,v1v2

∣

∣

∣

v1,v2≪VT=α f I0

8V2T

cosθ∆ (5.19)

where cosθ∆ is the phase difference of thev1 andv2 caused by delay stages. As discussed

in chapter4, the phase difference may be expressed:

θ∆ = 2π f nτ (5.20)

where f is the frequency,τ the time delay per stage andn the sequence number of stage.

Thus we have produced a circuit that functions as a multiplier under the assumption thatv1

is small


A diagram of the Gilbert cell architecture is shown in figure(??, it crosses coupling two

differential stage mixers that are current biased through a common DC tail current. Compared

with the single differential stage mixer in figure, also thev2 signal is now applied to a differ-

ential input port. As seen in the figure, there are three differentially operated transistor pairs in

this configuration, and to investigate the multiplication function, we shall make repeated use of

the differential stage results from section of differential pair.

The common tail current is here kept at a constant DC value,I0. The differential current in

the bottom transistor pair, which is driven byv1, becomes

∆I0 =α f I0

2tan(

v1

2VT) (5.21)

whereα f is the common base current gain of the transistors. Commonlyit has a value

slightly below one. Including the effect of the bottom differential current∆I0, the differential

and tail currents for the twov2 signal operated transistor pairs are expressed

71

Chen Chen

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∆IA =α f IA

2tan(

v2

2VT), IA =

α f I0

2+ ∆I0, (5.22)

∆IB =α f IB

2tan(

v2

2VT), IB =

α f I0

2− ∆I0, (5.23)

Finally, the two differential terms above subtracts to the final output differential current

∆Iout,∆Iout = ∆IA − ∆IB =

α f

2 [IA − IB] tan(

v22

)

=α f

2 ∆I0 tan(

v22

)

=α2

f I0

2 tan(

v22

)

tan(

v12

) (5.24)

By using the Taylor series expansions and assumptions from equation to approximate

∆Iout||v1|,|v2|≪VT=α2

f I0

8v1v2 (5.25)

Compared with the similar expressions from the single differential stage multiplier like

equation. it seems that only a product term remains, so the Gilbert Cell has clearly doubly

balanced multiplier function and it is sometimes called a pure four-quadrant multiplier.

If v1 andv2 share the same frequency, current amplitude of the difference term may be

written:

∆Iout|v1,v2≪VT=α f I0

16V2T

A1A2 cosθ∆ (5.26)

whereA1 A2 are the amplitude of the input signals,θ∆ the phase difference.

Practically, the Gilbert Cell could operate as a mixer, the main difference between Gilbert

Cell multiplier and mixer is that, LO input signal of mixer may not be small compared with

VT , thus the first linear term of Taylor series expansions will not be accurate enough for the

approximation and it may deteriorates linear performance by introducing distortion and inter-

modulation signal components at frequencies. However, forthe multiplier, the problem is not

as serious as the mixer process, because both of the signals are considered as small signals

which can be approximated by Taylor series and even though there are some unwanted fre-

quency sum or difference appears, it will be removed after integration if it isnot a DC signal.

However, the weight of DC part of the multiplication productmay be disturbed by signal’s

harmonic components, for example, ifnth order harmonic offi equalsmth order harmonic of

f j , then their difference which is DC signal is a unwanted weight included in theoutput.

72

Chen Chen

Highlight


Q1 Q2 Q3 Q4+

_

+

_

vout

Vcc

Vbb

v1

v2∆I0

∆IA ∆IB

I0

RLRL

IA = 1/2I0 + ∆I0 IB = 1/2I0 − ∆I0

IA1 = 1/2IA + ∆IAIA2 = 1/2IA − ∆IA

IB1 = 1/2IB + ∆IB

IB2 = 1/2IB − ∆IB

1/2IA + 1/2IB + ∆IA − ∆IB 1/2IA + 1/2IB − ∆IA + ∆IB

Iout = ∆IA − ∆IB

Figure 5.3: Gilbert Cell Multiplier

73

Chapter4/Chapter4Figs/gilbert.eps

Chapter 6

Analog correlator schematics,

simulation and Layout

The analog correlator circuit is designed and simulated by using ADS (Advanced Design

System). The active analog delay stage and multiplier’s schematics and simulation results

is shown first in this chapter. Then the results will analyzedbe and suggestion of further

improvement are given at last.

6.1 Circuit Schematics

6.1.1 Active delay stage

The circuit schematic of active analog delay stage is shown in figure(6.1).

In this schematic,the common emitter differential pair on the left side is the core of delay

stage which operates as an all-pass filter. The input signal is delayed by this common emitter

differential pair.

The common collector(or emitter follower) differential pair in the middle works as a buffer

with high input resistance and low output resistance to keepthe gain constant over the whole

band. Recall the HBT’s high frequency response discussed inchapter 3, the input of the com-

mon emitter is capacitance caused by the equivalent capacitance between base and emitter,

which is contributed by theCπ and Miller effect capacitance. The low output resistance of the

emitter follower will make the time constantRC smaller, thus the pole may be moved higher

than 10GHz, out of the frequency band we are interested on.

The tail current is controlled by a current mirror on the right side to keep DC current

constant. And current mirrors are also used as the current sources which are connected with

74


input

output

Figure 6.1: Time delay stage’s schematics

75

Chapter5/Chapter5Figs/delaysch.eps


v1

v2

transimpedance

amplifier

Gilbert core

output

Figure 6.2: Schematics of Gilbert core multiplier

the emitter follower differential pair as you can see in the figure(??).

6.1.2 Multiplier

I utilizes a structure of a SiGe HBT Mixer circuit described by [T.K.Johansen(2001)] to

build a multiplier circuit, which can be divided into 3 partsinput stage, Gilbert Core and output

stage as shown in figure(6.2).

Emitter follower is used as input stage, and its operation isthe same as former introduction.

The Gilbert Core is nearly the same as described in the last chapter, the only difference is

that the load is not resistance but a transimpedance amplifier buffer which converts current to

voltage and its equivalent resistance is so large that it canreplace very large real resistance

which is difficult to realize in MMIC circuit.

The output is the combination of the Emitter follower and a common-collector differential

76

Chapter5/Chapter5Figs/mulsch.eps

6.2 Simulation results and analyze

pair which works as an amplifier.

All the current resource is realized by current mirror.

6.1.3 Cascade stages

delay cell

multiplier

Figure 6.3: Schematics of cascade stages

The chain of delay stages and multipliers configuration is set as figure(2.3) and schematics

of first several stages is given by the figure(6.3). The chain is combined with 40 cascade stages,

while in the practical circuit, this number should be largerthan a couple of hundreds.


6.2.1 Multiplier

Small signals with the same frequencies and amplitudes but different phases are used as

the inputs of the multiplier. Harmonic balance is always used as the simulation method to

simulated the analog multiplier. The sweep parameter is thesmall signal’s frequency from

1GHz to 10GHz by step of 1GHz. The convergence and Matrix solve type are set in ”Auto”

mode, status level is set 11 and fundamental oversample 2.

As discussed in last chapter, what we are interested is the frequency difference term, which

is the weight at 0 frequency for the signals share the same frequency.

Figure(6.4) shows the amplitude gain of the output voltage vs input voltages’ product from

1GHzto 10GHz, there is about 2.5dB lost at 10GHz, 2dB lost at 9GHz. The losemay be caused

by the up input buffer as shown in figure(6.2), one source follower connects with 2 transistors’

base, which means the input of the Gilbert core is half. At high frequency, the input impedance

of the Gilbert core, dominated by capacitance, maybe not large enough compared with the

77

Chapter5/Chapter5Figs/chain.eps


1 2 3 4 5 6 7 8 9 100

0.2

0.4

0.6

0.8

1

1.2

1.4

1.5

Gain (dB)

Figure 6.4: The multiplication gain plot

output resistance of source follower, thus, the output signal of source follower decreases with

frequency.

6.2.2 Active delay stages’ simulation and analyze

A small signal with amplitude of 10mv is fed into the chain with a resource output resis-

tance 50Ohm.

Harmonic balance is chosen as the simulation method here to simulate the stage’s gain.

The sweep parameter is the small signal’s frequency from 1GHz to 10GHzby step of 1GHz.

The convergence and Matrix solve type are set in ”Auto” mode.

Plots in figure(6.5) shows input and output voltage of one delay stage in the chain, their

magnitudes are nearly the same. The gain of one delay stage and twenty delay stage is shown

by the plot in figure(6.6). We can see that it is very flat from 1 to 9GHz, the deviation is about

±0.002 in this band. It should be noted that, the gain increases with frequency, it reaches the

maximum value 1.002 at about 7GHz, then drop rapidly. The peak on the curve is introduced

by multiplier, I can’t find a clear explanation at present butI found it could be controlled by the

DC current in the input buffer of the multiplier. Anyway, it improves the stage’s gain somehow.

78

Chapter5/Chapter5Figs/mulgain.eps


2 4 6 80 10

0.002

0.004

0.006

0.008

0.000

0.010

mag(H

BV

0)

2 4 6 80 10

0.002

0.004

0.006

0.008

0.000

0.010

ma

g(H

BV

1)

f(GHz)

f(GHz)

Figure 6.5: Plots of input and output of one delay stage

The decreasing in the band higher than 7GHz should be caused by the input capacitance

of common-collector circuit. Although the emitter follower is implemented here, the output of

emitter follower is mainly dependent onre which is discussed in chapter 4.1.3 and we know

from chapter 3.2, HBT’s small signal model that

re =VT

IE(6.1)

according to the equation above, if the transistor is drivenwith low DC current, there will be

very large, by considering that the emitter follower is usedas a buffer with very low output

impedance, so largere is not what we expect. But the high DC current lead to high power

consumption, thus we should choose a compromising DC current of source follower. Finally, I

chose 1mA. in theory it should be around a couple of tens Ohm.

The magnitude of input impedance and output impedance of onesingle delay stage is

shown in figure(6.7). Comparing the output impedance of source follower and input impedance

of common-emitter circuit, we found the former one is largerthan one tens of the latter one in

high frequency band and this will cause the drop of voltage gain, that is reason for the curve to

decrease so fast in high frequency band. It seems that this problem can’t be solved by inserting

inductors between stages, because first order device will pull up the gain in high band but as

79

Chapter5/Chapter5Figs/hbinoutput.eps


2 3 4 5 6 7 8 91 10

0.90

0.95

1.00

1.05

0.85

1.10

freq, GHz

mag(gain2)

mag(gain10)

mag(gain20)

2 3 4 5 6 7 8 91 10

0.992

0.994

0.996

0.998

1.000

1.002

0.990

1.004

freq, GHz

mag(gain2)

Figure 6.6: Plot of gain for one stage and twenty stages

well as the peak, the deviation of the gain doesn’t minish.

6.2.3 Time delay

The plot in figure(6.8) shows the time delay vs frequency, it is around 16.9 picosecond, a

very small deviation about±0.3 picosecond. The phase shift is shown in figure(6.8), we can see

it is linear, according to the discussion of time delay in chapter 4, which means the spectrum

can be recovered correctly. But it is a pity that the time delay length is not so long that we

will need many stages to get the wanted resolution, for example, about 1200 stages to realize

100MHz resolution .

There may be some solution to increase the delay length and make it near to 50ps the

maximum sampling interval. One is to add a tuning capacitance between base and collector to

increase the time constantτ = RC, but Miller effect caused by the tuning capacitance will lead

to a decreasing gain at high frequency.

The other is to increase the collector resistance, but we should keep the gain unit, thus

we should decrease the transconductance which means lower DC current. In that case, the

80

Chapter5/Chapter5Figs/maggain.eps


Frequency(GHz)

rbin

2 3 4 5 6 7 8 91 10

40

42

44

46

48

38

50

ma

g(r

ou

ts)

2 3 4 5 6 7 8 91 10

500

1000

1500

2000

0

2500

Frequency(GHz)

input impedance of common emitter

output resistance of emitter follower

(a)

(b)

Figure 6.7: (a) Input impedance of common-emitter (b) output impedance of source

follower

gain’s deviation will become larger. So, these two solutionwill both introduce new problems

in circuit.

6.2.4 Transient simulation

The voltage swing can be observed by using transient simulation, fro example, a 8GHz

frequency sinusoid is used as the input signal for one stage,the input voltage and output voltage

swing of this stage is shown in figure(6.9) The two waves are nearly the same amplitude but a

small delay, and it is observed that their shapes are the samethus no distortion happened.

81

Chapter5/Chapter5Figs/rincc.eps


2 3 4 5 6 7 8 91 10

1.56E-11

1.58E-11

1.60E-11

1.62E-11

1.64E-11

1.54E-11

1.66E-11

freq, GHz

de

lay1

2 3 4 5 6 7 8 91 10

130

140

150

160

170

120

180

freq, GHz

phase

f(GHz)

delay(s)

f(GHz)

(a)

(b)

Figure 6.8: (a) Phase shift plot (b) Time delay plot

6.2.5 Power Consumption

DC voltage bias of delay stage is 2.3V, DC current are respectively 560µA and 1mAfor the

the common-emitter differential pair’s and a source follower, thus the total DC current is about

4.2mA including the current mirror. The power for one delay stage is 9.6mW.

For the multiplier, the DC bias is 3.1V, and total current is about 5.76mA, thus the power

consumption of one multiplier is about 17.86mW.

The total power consumption for one stage which includes a delay cell and a multiplier

is 27.5mW, most of the power is consumed by the source follower buffer which needs high

current bias to work with a small output resistance which is discussed in Chapter 6.2.2.

82

Chapter5/Chapter5Figs/delaysim.eps

Chen Chen

Highlight

Chen Chen

Highlight

6.3 Power spectrum recovery

0.57 0.64 0.71 0.79 0.86 0.930.50 1.00

-0.005

0.000

0.005

-0.010

0.010

time, nsec

vo

ut3

vo

ut4

ns

v

Figure 6.9: Voltage swing in transient simulation


For the delay time 16.9ps per stage, as what discussed in chapter 4.1.1 and according to

equation(4.4, it needs twelve hundreds of stages to achieve the goal of 100MHz resolution and

six hundreds of stages for 200MHz resolution.

According to the simulation result shown in figure(6.6), the gain decreases a lot after 9GHz.

But if only considering about the bandwidth from 1 to 9GHz, the deviation is±0.002 from

unit one and it could be possible to build a circuit of 600 stages.

The power spectrum’s of 600 stages’ circuit is simulated in Matlab and window’s plots

for one tone in time and frequency domain are shown in figure(6.10). As discussed in the

chapter design consideration the power of signal is transformed from signal’s correlation, thus

the window’s shape of signal’s power is the correlation of windows function in time domain or

multiplication in frequency domain. Here, the power window’s function is the correlation of

rectangular window function in time domain, and the the function of (1± 0.002)n, wheren is

the sampling sequence number. From the simulation of 600 stages’circuit, it can be imaged for

1200 stages, the difference between the peaks of window’s main lobe forgain= 1± 0.002 will

be larger than 600 stages’.

It should be noted that the gain’s deviation changes gradually, which means the main lobe’s

peaks of two nearby frequencies shares the similar height. From the plot in figure(6.10) we see

that the side lobes of window in frequency domain are very small and decay very quickly with

frequency, thus the side lobes of a frequency component withhigh main lobe nearly gives no

influence to another frequency component with low main lobe.For example the side lobes

of frequency component at 7GHz with gain being 1.002 doesn’t affect the 1GHz frequency

component’s main lobe even though the first one’s main lobe isseveral times larger than the

83

Chapter5/Chapter5Figs/tran.eps


0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 0

1

2

3

4

- 6 0 0 - 4 0 0 - 2 0 0 0 2 0 0 4 0 0 6 0 0 0

0.5

1

1.5

2

-

1 5

-

10

-

5 0 5

10 1 5

1.5

1

0.5

0

(a)

(b)

(c)

red curve: gain=1+0.002

green curve: gain=1-0.002

red curve: gain=1+0.002

green curve: gain=1-0.002

n

stages sequence number

fs*n

Figure 6.10: (a)Window’s function in time domain, (b)Window’s function in frequency

domain, (c)Zoom out of main lobe

latter. So we can conclude that the 1200 stages’ circuit of 100MHz resolution can still reveal

the power spectrum with right resolution and but not accurate quantity.

A example simulated by Matlab is given below to illustrate what the power spectrum will

look like.

In this example, I assume a signal with same weight frequencies at 8GHzand 8.2GHz, and

the gain for the two frequency components are both 1.002 per stage. Time delay per stage is

16.9ps, and total stages number is 600.

For the plot in figure(6.11-a), it is observed that the two frequencies can be distinguished in

the spectrum simulated by Matlab, and each mainlobe’s widthis about 200MHz. It is noted that

the peaks of the two frequencies are not exactly at the 8GHzand 8.2GHzbut a litter difference,

84

Chapter5/Chapter5Figs/600.eps


Frequency(GHz)

(a) Spectrum of signal with frequencies 8 and 8.2 GHz

(c) Spectrum of signal with frequencies 4 and 8 GHz

(b) Spectrum of signal with frequencies 8 and 8.1 GHz

Figure 6.11: The simulation plots of example

85

Chapter5/Chapter5Figs/ex.eps

6.4 layout

it is because:

• when simulating in Matlab, the infinite integration processis approximated by long but

finite sum, so the nonperiodic truncated signal sequence maycause this problem.

• Even the side lobes are very small, but they will still affect other frequencies more or

less, especially the ones nearby.

I think if using a long time integration, this problem will beimproved more or less.

Let’s change the frequency 8.2GHz to 8.1GHz, the plot in figure(6.11-b) shows the simu-

lation result after the change. It is observed that the positions of the peaks are moved from the

right ones, it is because the the frequencies difference are smaller than the resolution 200MHz-

the width of the mainlobe, and mainlobes are overlapped. Andthe first sidelobes also seriously

affect their positions each other.

Last, have a look at the simulation plot(c) of two frequencies far off each other. Assume

the frequencies are 4GHzand 8GHzand for 4GHz the gain per stage is 1, for 8GHz1.002. It

is obvious that the different gain lead to different magnitudes, the magnitudes radio between

4GHzand 8GHzcoincides the simulation plot in figure(6.10), where the magnitude forgain=

1.002 is about 2 and forgain = 0.998 is about 0.5. In plot(c), the magnitude forgain = 1.002

at 8GHz is about twice the magnitude forgain= 1 at 4GHz.

6.4 layout

The last part of this thesis is the layout of circuit using specific technology that represents

underlying process. Simulation of a circuit provides results based on device models but it

does not incorporate metal routing for interconnect. As discussion in the former chapters,

the delay cell requires very accurate and constant delay time and gain, thus the behavior of

analog and Radio Frequency (RF) circuits is extremely sensitive to layout-induced parasitics,

especially the interconnect capacitances and inductanceswhich have a very high impact on

circuit performance.

The layout generated by using Cadence with library ”horn2000Lib” is shown in figure(6.12).

There are one delay cell and one multiplier included in one stage of analog correlator. DC

voltage bias is 2.3v for delay cell and 3.1v for multiplier. The size of one stage’s layout is

480um× 320um.

86

6.4layout

2.3v 3.1v

ground

ground

differetial

input

differetial

inputdifferetial

output

Fig

ure

6.1

2:

On

estag

e’slayo

ut

87

Chapter5/Chapter5Figs/layout.eps

6.4 layout

Figure 6.13: Colorful version of layout

88

Chapter5/Chapter5Figs/layoutcolor.eps

Chapter 7

Conclusions

The purpose of this project work is to investigate different strategies for the implementation

of analog correlators and work out the advantages as well as disadvantages of these circuits.

Based on these discussions, MMIC design should be undertaken and prototype circuits should

be presented with bandwidth approaching 10 GHz.

Based on the theory study of signal processing and HBT high frequency response, two

points should be taken care of when designing the circuit:

• In ideal case, it is supposed that the gain per stage should beconstant one with over

the band from 1 to 10GHz. But in practical circuit, it is impossible to generate the

absolute constant gain, which means, more or less, there is deviation from constant one

for the gain per stage. Since the stages are cascaded, the gains between stages’ output

and input of first stage are geometric series. Thus, a very small deviation can lead to

large difference of gain after hundreds of stages. The simulation in Matlab shows for

the circuit with hundreds of stages, the deviation should becontrolled in the range of a

couple of millesimals, otherwise the analog correlator circuit may not reveal the power

spectrum correctly.

• According the theory of correlation , the time delay should be constant, in another word,

linear phase shift. While the absolute constant time delay is also impossible obtained by

the practical circuit. After study it is found that the phaseshift is monotonic to frequency,

the positions of power components on the spectrum is shiftedcompared with the correct

ones, but no overlap. In this case, the power spectrum may be recovered by modifying

the scale of frequency axis if we know the function of time delay vs frequency.

The prototype circuit of analog correlator is designed and simulated in ADS(Advanced

Design System). The simulation result shows the gain for onedelay stage is around one with

89

deviation±0.002 from 0 to 9GHz. In the frequency band 9 to 10GHz, the gain decreases

from 0.997 to 0.993. There is obvious an unexpected zero around 7GHz on the curve of gain,

it seems caused by the input of multiplier. I am sorry that I can’t give definite explanation

about it, but somehow, this zero compensates the lose in highfrequency band caused by pole

introduced by Miller capacitance.

Total power of one stage including a time delay cell and Gilbert-core multiplier is about

36.4mW, the main power consumption is caused by the emitter followers which are driven by

around or higher than 1mADC current for one branch to make sure the output resistance small.

So the power consumption is contradict with the bias currentof emitter follower buffer, we

should trade off them according to the different implementations.

Based on the simulation results of the one stage, we can buildan analog correlator circuit

with 600 stages, resolution 200MHz, 9GHz bandwidth and total power consumption 36.4 ×

600= 21.84W.

In the process of simulation, it is found the analog correlator is very sensitive with the

change of bias current and collector resistance which affects the overall performance. By

changing the bias point, gain per stage is changed, if the deviation is larger than 0.005, it

will be very difficult to recover the power spectrum correctly.

This project work is only a simple circuit prototype, the practical circuit will be more

complicated. The most difficult challenge in practical circuit will still be the stages’ gain.

Because the practical circuit is easily affected by temperature, power source, parasitic elements

and so on, it is really difficult to make the gain’s deviation smaller than several millesimals.

For example, the collector resistance is supposed to be hundreds Ohm, if one Ohm larger or

smaller, the influence to the gain will be a couple of centesimal which is too large for the circuit

with mangy stages.

So that, some kind of feed back circuit used to limit the gain or the output voltage’s ampli-

tude of every stage is very necessary in practical circuit.

90

Chen Chen

Highlight

Chen Chen

Highlight

Chen Chen

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Appendix A

High frequency response of emitter

follower

First, to obtain the location the transmission zero, note thatVO will be zero at the frequency

sZ for which the current fed toR′L is zero:

gm +Vπrπ+ sZCπ = 0 (A.1)

Combining with equation(3.35), thus,

sZ = −gm + (1/rπ)

Cπ= −

1Cπre

(A.2)

which is on the negative real-axis of the s-plane and has a frequency:

ωπ =1

Cπre(A.3)

The other transmission zero is ats = ∞, whereCµ acts as a short circuit, makingVπ zero, and

henceVo will be zero.

Next, we determine the poles. The resistances seen byCπ is the parallel equivalent ofRsig

and the input resistance looking into B’; that is

Rµ = Rsig//[rπ + (β + 1)R′L] (A.4)

where we can see thatRµ is smaller thanRsig and sinceCµ is also very small comparing

with Miller capacitance, the time constantCµRµ will be correspondingly small.

91

The resistanceRπ seen byCπ can be determined by the equation below:

Rπ = RsigRsig + R′L

1+Rsig

rπ+

RLre

(A.5)

We observe that termR′l/re will usually make the denominator much greater than unity, thus

renderingRπ rather low. Thus, the time constantCπRπ will be small. The end result is that the

3-dB frequencyfH of the emitter follower,

fH = 1/2π[CµRµ +CπRπ] (A.6)

will be usually very high.

92

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