91026a

ELMOS Semiconductor AG Data Sheet QM-No.: 25DS0020E.01

ADJUSTABLE, WIDE INPUT RANGE PFM CONTROLLER E910.26

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ELMOS Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.

PRODUCTION DATA - JAN 27, 2012

Features

Applications

ÿ Low costÿ Up to 90% efficiencyÿ 40μA standby currentÿ 180μA typical circuit operating currentÿ 3V to 60V input supply rangeÿ 1.5V to 24V or more adjustable output voltageÿ Up to 300kHz switching frequencyÿ Improved current-limited PFM control schemeÿ High current driver for external MOSFETÿ Undervoltage lockout and thermal shutdown

ÿ Minimum Component DC-DC converterÿ 14V, 28V or 42V automotive systemsÿ Power conditioning for portable equipmentÿ High efficiency on-card switching regulatorsÿ LCD biasÿ Positive to negative conversion

General Description

The highly flexible, easy to use PFM controller is ideal for use in wide input range switching regulator applica-tions. An advanced PFM control scheme gives these de-vice the benefit of PWM converter with high efficiency at heavy loads, while using very low operating current at light loads to maintain an excellent behaviour over output load variation. The switching circuit is suitable for topologies requiring low side FET, such as boost, flyback, Sepic, etc. Depend-ing on the utilized topology the controller is capable of producing regulated positive or negative output volt-age. Operating from 3V to 60V supply and temperature from -40°C to +125°C the device is well suited for auto-motive systems. Requiring a minimum number of ex-ternal components, these regulator is simple to use and cost saving. Self-protection features include an over temperature shutdown under fault conditions and an undervoltage lookout.

Ordering Information

Product ID Temp. Range Package

E910.26 -40°C to +125°C SOIC8N

E910.26

VIN

VFB AGND PGND

ISEN

MDRV

VSM

ON

- ON-Signal from CAN-Transceiver, K15D etc.- Permanent-ON > connect to VSM

R10.1Ω

R239kΩ

VOUT = 5V

R4

3.3Ω

L1100µH

BUK9875-100A

R3120kΩ

C668pF

M1

100µF

C4100nF

C34.7µF

C5

Battery = 3V...60V

L2100µH

D1ES2D

C122µF

C268µF

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1 Functional diagram

Figure 1: Functional diagram

2 Pinout

Figure 2: Package pinout SOIC8N

1234

8765

PGND

AGND

ISEN

VFB

MDRV

VSM

VIN

ONE910.26

VoltageComp

PFMCircuitry

E910.26

VREF

ON/OFF

DELAYED ON

VREF

OVERTMP

VREF

MDRV

BIAS

VFB

InstrAmp

LeadingEdge

BlankingCurrentCompAGND

ISEN

ON /OFFLogic

ON

ErrorProc

PowerMosfetDriver

UnderVoltageLockout

BandgapBias

Overtemp

VSMReg

PGND

VIN

VSMVSM

POR

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Pin Name Type 1) Description

1 PGND S

Driver power ground pin. Connect pin to the current sense resistor, the (-) ter-minal of the input capacitor and the (-) terminal of the output capacitor. Due to high currents, and high frequency operation of the IC, a low impedance circuit ground plane is highly recommended.

2 AGND S

Analog ground pin. This pin provides a clean ground for the controller circuitry: The output voltage sensing resistors should be connected to this ground pin. This pin is connected to the IC substrate. Connect to the (-) terminal of the out-put capacitor.

3 ISEN AI Current sense input pin. Voltage generated across an external sense resistor is fed into this pin. Filter extensive high frequency noise.

4 VFB AIPositive feedback pin. Connect to SMPS output via external resistor divider to set output voltage and is referenced to 1.22V. For best stability, keep VFB lead as short as possible and VFB stray capacitance as small as possible.

5 ON HVISwitch ON input. Tie this pin to ground to force the IC into idle mode. A voltage of VSM or higher switches the controller in operating mode. The rising edge re-sets the internal digital logic. Operating is guaranteed if VSM > 3.20V only.

6 VIN S Main supply input. Filter out high frequency noise with a 100nF ceramic capaci-tor placed close to the pin an PGND.

7 VSM AO

Internal 5V regulator output. The driver and all control circuits are powered from this voltage. Decouple this pin to PGND with a minimum of 4.7μF tanta-lum and 100nF ceramic capacitors. All electrical specifications are valid, if VVSM is settled.

8 MDRV AO Drive output. Drives the gate of the external MOSFET between PGND and VSM.Connect the external MOSFET via a damping resistor to this pin.

1) D = Digital, A = Analog, S = Supply, HV = High voltage (see max. ratings), I = Input, O = Output

Table 1: Pin Description

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3 Absolute Maximum Ratings

Stresses beyond these absolute maximum ratings listed below may cause permanent damage to the device. These are stress

ratings only; operation of the device at these or any other conditions beyond those listed in the operational sections of this

document is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.

All voltages referred to VGND

. Currents flowing into terminals are positive, those drawn out of a terminal are negative.

Description Condition Symbol Min Max Unit

Input Supply Voltagefor t < 500msfor t < 500μs

VVIN

-0.3-0.3-0.3

606570

VVV

ON Input Voltage VON

-0.3 40 V

Feedback Input Voltage VVFB

-0.3 5 V

Sense Input Voltage VISEN

-0.3 2 V

Internal Regulator VVSM

-0.3 6 V

Driver Voltage VMDRV

-0.3 5.5 V

Peak VSM Output Current IVSM

- -40 mA

Peak Driver Output Source Current < 2μs ISCMDRV

- -600 mA

Peak Driver Output Sink Current < 2μs ISKMDRV

- 800 mA

Difference Voltage AGND to PGND VDIFF

-0.1 0.1 V

Continuous Power Dissipation @ TA = +70°CDerate 5.5mW/°C above +70°C P

TOT- 480 mW

Operating Temperature Range TA

-40 125 °C

Junction Temperature Range TJMAX

-40 150 °C

Storage Temperature Range TST

-40 150 °C

Lead Temperature (Soldering, 10 sec) TSOLD

- 300 °C

Package Temperature (IR reflow, 10 sec) 1) TIREF

- 235 °C

Human Body Model ESD - 2 kV

1) 60 second maximum above 183°C

4 Electrostatic Discharge Sensitivity

This integrated circuit can be damaged by ESD. ELMOS Semiconductor AG recommends that all integrated circuits must be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.ESD damage can range from subtle performance degradation to complete device failure.

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5 Electrical Characteristics

Description Condition Symbol Min Typ Max Unit

Feedback Voltage VVIN

= 3.2V to 60V VVFB

1.18 1.22 1.26 V

Feedback Current VVFB

= 1.22V IVFB

-200 0 200 nA

Output Voltage 1)

Circuit of Figure 7, V

VIN = 3.2V to

60V, VIOUT

= 50mA to 200mA

VOUT

4.80 5.00 5.20 V

Current Sense Threshold 1, E910.26 VIN

= 3.2V to 60V VISEN1

75 100 130 mV

Current Sense Input Current VISEN

= 0V to 0.2V IISEN

-200 0 200 nA

Current Sense Input Voltage Range 1) VVIN

= 3.2V to 60V VISENR

0 - 0.3 V

ON Input High Voltage 4) VVIN

= 3.2V to 60V VONH

0.75 x VSM - 40 V

ON Input Low Voltage 4) VVIN

= 3.2V to 60V VONL

0 - 0.75 V

ON Input Sink Current 4) VON

= 0.5V to 40V ION

1 4 7 μA

Minimum MDRV High Time VVIN

= 3.2V to 60V THMIN

300 500 900 ns

Maximum MDRV High Time VVIN

= 3.2V to 60V THMAX1

12 17 22 μs

Minimum MDRV Low Time VVIN

= 3.2V to 60V TLMIN

1.6 2.3 3.25 μs

MDRV Rise Time

VVIN

= 12V, C = 1nF from MDRV to

PGND, VMDRV

from 20% to 80%

TR, MDRV

7 20 40 ns

MDRV Fall Time

VVIN

= 12V, C = 1nF from MDRV to

PGND, VMDRV

from 20% to 80%

TF, MDRV

5 15 30 ns

Driver High Voltage

VVIN

= 5.5V to 60V, IMDRV

= -1.5mAV

VIN = 3.2V to 5.5V,

IMDRV

= -1.5mA

VH, MDRV

4.40

VSM-0.4

-

-

VSM

VSM

V

V

Driver Low Voltage

VVIN

= 5.5V to 60V, IMDRV

= 1.5mAV

VIN = 3.2V to 5.5V,

IMDRV

= 1.5mA

VL, MDRV

0

0

0.01

0.02

0.02

0.04

V

V

Internal Supply VoltageInternal Supply Voltage

VIN

= 5.5V to 60V, I

VSM = 0A

VIN

= 2.8V to 5.5V, I

VSM = 0A

VVSM

4.50

VIN-0.3

5

VIN

5.40

VIN+0.3

V

V

Internal Supply Output Current VVIN

= 24V, Duty < 0.05 I

VSM- 15 - mA

Input Voltage Range 2) Circuit of Figure 7 VVIN

3.0 60 V

Under Voltage Lookout 2), 3) Circuit of Figure 7 VULO

2.75 3.0 3.15 V

Standby Current VVIN

= 3V to 60V IVINSTB

20 40 80 μA

(VVIN

= 3V to 60V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V

VIN = 12.0V, T

A = +25°C and

VVSM

> 4V. Positive currents flow into the device pins.)

1) Guaranteed by design, not 100% tested in production2) For information only3) Referred to V

VSM

4) In Accordance with Specification if VVSM

> 3.20V only

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4.8

4.9

5.0

5.1

5.2

)V( MSVV

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

INTERNAL SUPPLY VOLTAGE VS. TEMPERATURE

VIN = 12V

1.20

1.21

1.22

1.23

1.24

)V( EGATLOV KCABDEEF

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

FEEDBACK VOLTAGE VS. TEMPERATURE

VIN = 12V

14

15

16

17

18

19

20)sµ( XAMHT

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

MAXIMUM MDRV HIGH TIME VS. TEMPERATURE

VIN = 12V

2.0

2.2

2.4

2.6

2.8

3.0

)sµ( NIMLT

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

MINIMUM MDRV LOW TIME VS. TEMPERATURE

VIN = 12V

50

100

150

200

250

)Vm( NESIV CIMANYD

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

CURRENT SENSE THRESHOLD VS. TEMPERATURE

VISEN1

VISEN2

VIN = 12V20

30

40

50

60

70

)Aµ( BTSNIVI

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

STANDBY CURRENT VS. TEMPERATURE

VIN = 12V

VIN = 24V

VIN = 36V

VIN = 42V

6 Typical Performance Characteristics

E910.26

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300

400

500

600

700

800

)sn( NIMHT

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

MINIMUM MDRV HIGH TIME VS. TEMPERATURE

VIN = 12V

10

20

30

40

50

60

70

80

90

100

)sn( VRDRT

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

MDRV RISE TIME VS. TEMPERATURE

C = 1nF

C =2.2nF

C = 3.3nF

C = 4.7nFVIN = 12V

0

10

20

30

40

50

60

)sn( VRDFT

-40 -20 0 20 40 60 80 100 120 140

TEMPERATURE (°C)

MDRV FALL TIME VS. TEMPERATURE

C = 1nF

C =2.2nF

C = 3.3nF

C = 4.7nF

VIN = 12V

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7 Detailed Description

7.1 Overview

7.2 Internal Low Drop Regulator

7.3 Controller Operation

The external power MOSFET is turned on when the voltage comparator at pin VFB senses that the output of the supply is out of regulation. Switch off time is accomplished through the combination of a peak current limit and an internal pair of monostable multivibrators that set the maximum switch on time (typically 17μs) and minimum switch off-time (typically 2.3μs). Once off, the minimum off-time multivibrator holds the external MOSFET off for 2.3μs. After this minimum time, the MOSFET either stays off if the output is in regulation, or turns on again if the output is out of regulation. To avoid a quasianalogue operation of the external MOSFET by means of to small gate-pulses and destruction through overheating an internal circuit limits the minimum gate pulse width to typi-cal 500ns.The controller limit the peak switch current and therefore the inductor current, which permits them to run in con-tinuous-conduction mode and maintain high efficiency with heavy loads.

When delivering high output currents, the controllers operate in continuous-conduction mode (CCM). In this mode, current always flows in the inductor, and the control circuit adjust the switch duty cycle to maintain regu-lation without exceeding the switch current capability. This provides excellent load-transient response and high efficiency. In discontinuous-conduction mode (DCM), current through the inductor starts at zero, rises to a peak value, then ramps down to zero. Although efficiency is still excellent, the output ripple increases slightly, and the

The E910.26 use an internal 5V low-drop regulator for logic and driver power in the IC. This supply is provided at pin VSM for bypassing and compensation with an external parallel combination of 4.7μF and 100nF capacitors to AGND. Connect these capacitors very close to the controller. After VVSM is settled the controller work within specification. A voltage of lower than 3V at pin VSM take the controller in under-voltage-lockout state. The normal operating stops and the MDRV pin shunts the external gate of the MOSFET to PGND. To avoid a floating power MOSFET gate at very low VSM voltages an integrated 100kOhm resistor shunts MDRV to PGND.

The E910.26 IC is a HV-CMOS switch mode power-supply controller that provide adjustable output voltages. It is suitable for use in topologies requiring an external low side MOSFET, such as Boost, Flyback, Sepic or Cuk. Moreo-ver the E910.26 IC can be operated over a very wide input supply range from 3V to 60V with only 40μA standby current.All the power conducting components of the circuit are external to the E910.26. So the IC can accommodate a large variety of inputs, outputs, and loads.

Their sophisticated control scheme combines the advantages of pulse-skipping pulse-frequency modulation (low supply current) and current-mode pulse-width modulation (high efficiency with heavy loads), providing high effi-ciency over a wide input voltage and output current range, as well as increased output current capability over pre-vious PFM controllers. It allows the device to achieve high efficiency over a wide range of loads, while the current-sense function and high operating frequency make it possible for the use of tiny external components. The external sense resistor and power transistor permits the user to tailor the output current capability for each application.

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switch waveform exhibit ringing (the self-resonant frequency of the inductor circuit). This ringing is to be expected and poses no operational problems.

The E910.26 switching frequency is variable, depending on load current and input voltage, causing variable switch-ing noise. However, the sub harmonic noise generated does not exceed the peak current limit times the output filter capacitor equivalent series resistance (ESR).

Due to the high switching frequency up to 300kHz and the large magnetic flux swing use inductors with a low loss ferrite core or equivalent materials. To minimize radiated noise use shielded coils. Coils with very low DC resistance are preferable for highest efficiency. Make sure the inductors saturation current ratings exceed the circuit’s worst case peak current by a minimum of 20% over the full temperature range. Never drive the cores into saturation. Un-der saturation conditions current flow is limited only by the inductors DC copper resistance and the source capac-ity. This is why saturation often results in destructive failures.

When selecting the external power MOSFET, an important parameter for the controller is the MOSFET total gate charge. The switching frequency and the total gate charge determine the current to be supplied by the internal VSM regulator. Depending on the value of input voltage, excessive chip power can trigger the over temperature protection and turn off the controller. For maximum input voltage and ambient temperature a typical total gate charge of less than 30nC is recommend. Use a series resistor for gate connection of the power MOSFET to avoid HF oscillations due to the source and wiring inductance. Find a compromise between low EMI and high system ef-ficiency.

As in any switching regulator, PCB layout is very important. Rapidly switching currents associated with wiring in-ductance can generate voltage transients, which can cause regulation and EMI problems. For minimal inductance and ground loops, the heavy current wires should be wide printed circuits traces and should be kept as short as possible. Begin the layout with the location of the power devices. Keep high current connections on one side of the PCB if possible. If not, minimize the use of vias and keep current density in the vias to < 500mA/via. After achieving a satisfactory power path layout, proceed with the control circuitry layout. For best results, external components should be located as close to the controller as possible using ground plane construction or single point grounding. Special care must be taken to the location and positioning of the feedback resistors and the associated wiring and the placement of AGND and PGND connection. The VFB pin is very sensitive to pickup from the switching node. Isolate this pin from capacitive coupling. Physically locate both feedback resistors near the controller, and route the wiring away from the magnetic parts. Depending on the layout and output power a RC low-pass to the ISEN pin can be necessary. Minimize the length of the gate lead connections.

7.4 Applications Information

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Figure 4 shows the basic circuit for a step-up (boost) switching regulator. The output voltage must be greater or equal than the input voltage. The circuit has low ripple current in the input circuit due to the presence of L1 and high efficiency.

M1 is used to alternately apply the input voltage across inductor L1. During the time tON

, M1 is switched on and energy is supplied from the input voltage VINP and stored in L1. D1 is reverse biased and the output current is sup-plied from the charge stored in C2. When M1 opens t

OFF , voltage at drain from M1 will rise positively to the point

where D1 turns on. The output current is now supplied through L1 and D1 to the load and any charge lost from C1 during t

ON is replenished.

The current through L1 can be CCM (Continuous Conduction Mode) or DCM (Discontinuous Conduction Mode) de-pending on the dimensions of the external components and value of the output current. For a large input to output voltage difference a tapped inductor adjusts the duty cycle to a useful range.

The switch M1, diode D1, and output capacitor C2 must be specified to handle the peak currents as well as average currents. For diode D1 a type with very low reverse recovery time is necessary. Use a low forward drop type like a Schottky to improve the efficiency.

The converter is open load stable. With this basic circuit topology there is no output short circuit protection pos-sible. The converter also shows a high inrush current due to the direct connection of C2 and the load via D1 and L1 to the input. In off mode, the load current and the current through the feedback divider R2, R3 add to the stand-by current of the controller.

8 Typical Application Examples

8.1 Step-Up Converter

E910.26

VIN

VFB AGND PGND

ISEN

MDRV

VSM

ON

- ON-Signal from 3.5V ... 40V- Permanent-ON > connect to VSM

R1

R2

VOUT

R4

L1

R3

M1

C4C3

C1

VINP

D1

C2

Figure 4: Step-Up Converter

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In the triple output flyback regulator shown in figure 5, energy is stored in inductor L1 (with secondary windings) during the on-time of transistor M1. When M1 is switched off, the voltage across L1 reverses as the inductor trans-fers the stored energy to the smoothing capacitors and to the loads. Due to the use of secondary windings positive, negative and isolated output voltages are possible. All output voltages track very well. Note that the wound com-ponent is an inductor with secondary windings, combining the functions of both an inductor and a transformer. An inductor is an energy storage device, and as such requires an air gap in the magnetic path.

The flyback converter is able to buck and boost the input voltage. The converter can be open and short stable. DCM or CCM inductor currents depend of dimension of the whole circuit and the input voltage value and output loads. Both input ripple current and output ripple current are high in a flyback regulator, but this disadvantage is more than offset in many cases by the ability to achieve current or voltage gain and the inherent isolation afforded by the transformer. The snubber network D1, C5 and R4 clamps the voltage peak created by leakage inductance of L1. For diode D1 a fast type with very low reverse recovery time is necessary.

Figure 5: Flyback Converter

E910.26

VIN

VFB AGND PGND

ISEN

MDRV

VSM

ON


R1

R5C5

R2

R4

L1

R3

C6

M1

C4C3

C1

VINP

D1

+VOUT1D2

C2

-VOUT3D4

C7

+VOUT2D3

C8

-VOUT2

8.2 Flyback Converter

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Figure 6: Cuk Converter

The basic Cuk regulator (named after Slobodan Cuk, a professor at Cal Tech) in figure 6 is derived from the boost and buck regulators, combing the characteristic low input current ripple of the boost regulator with the low out-put current ripple of the buck regulator. The output voltage may be greater than, or less than, the input voltage and the output polarity is opposite the input voltage polarity. This results in an inverting buck-boost topology. This converter operates via capacitive energy transfer. During the on time of M1, inductor current I

L1 builds up. Si-

multaneously, capacitor C1 discharges round the loop C1, M1, C2 in parallel with the load, L2 and charging C2 in the opposite polarity to the input voltage. When M1 is switched off, inductor current I

L1 flows through C1 and the

diode D1, recharging C1. Simultaneously, inductor L2 maintains current round the loop L2, diode D1, C2 in parallel with the output load.

This circuit has very low output current ripple due to the presence of L2 in the output circuit, similar to the buck regulator. It also has very low ripple current in the input circuit due to the presence of L1, similar to the boost regu-lator. Coupling the input and output inductors on a single core can achieve a more efficient and compact design for the same power throughput. In addition, the input and output ripple currents are considerably reduced. The switch M1 must handle the sum of input and output current. A disadvantage of the Cuk regulator is that the series capacitor C1 is the main energy storage / transfer component, instead of an inductor as in most other circuits. This capacitor, therefore, has to be relatively large, and capable of handling high r.m.s. currents, so a low ESR is essential. The bipolar current mirror converts with resistors R2 and R3 the negative output voltage to a positive one required for feedback input of the E910.25. The Cuk converter and its associated applications are protected by a series of patents, and its use in commercial designs may require a license agreement by its inventor.

E910.26

VIN

VFB AGND PGND

ISEN

MDRV

VSM

ON


R1

-VOUT

R4

L1

M1

C4C3

C5

VINP

C1 L2

C2D1

R2

R3

8.3 Cuk Converter

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Figure 7: Evaluation Board (3V-60V to 5V/200mA) Sepic Converter

The single-ended primary inductance converter was developed at AT&T Bell laboratories in the mid 1970s. The intent of the developers was to create a new topology with properties not available in contemporary topologies. Figure 7 shows a typical high efficiency Sepic converter circuit. An important feature is the ability to buck or boost the input voltage with good transient response and without inverting voltage polarity. The regulator can handle large signal input-tooutput voltage ratio with high efficiency. The converter has low ripple current in the input cir-cuit due to the presence of L1; therefore reducing EMI at the input.

This circuit has three dynamic energy storage elements, L1, L2 and C1. L1 and L2 may be integrated into a single magnetic structure with only one magnetic path. This coupled inductor version has several advantages. The leak-age inductance of the coupled inductor can be arranged to effect near zero current ripple on the input with finite value of L. Because the turn’s ratio between the windings is 1:1, there cannot be two different values for L1 and L2. Because they are wound on a common core, both windings are either conducting or not depending on whether there is energy in the core or not.

A disadvantage of the Sepic regulator (like the Cuk converter) is that the series capacitor C1 is the main energy stor-age / transfer component, instead of an inductor as in most other circuits. This capacitor, therefore, has to be rela-tively large, and capable of handling high r.m.s. currents, so a low ESR is essential. The switch M1 must handle the sum of input and output current. Switching diode D1 must have a very low reverse recovery time and soft recovery behaviour for low loss and EMI. Also a short turnon time to clamp the voltage spike at drain of M1 is important. If possible, use a Schottky rectifier. The regulator operates either CCM or DCM depending on the dimension, input voltage and load. Output load is protected in case of switch or diode fault.

E910.26

VIN

VFB AGND PGND

ISEN

MDRV

VSM

ON


R10.1Ω

R239kΩ

VOUT = 5V

R4

3.3Ω

L1100µH

BUK9875-100A

R3120kΩ

C668pF

M1

100µF

C4100nF

C34.7µF

C5

Battery = 3V...60V

L2100µH

D1ES2D

C122µF

C268µF

8.4 Sepic Converter

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Figure 8: Medium Power Sepic Converter

E910.26

VIN

VFB AGND PGND

ISEN

MDRV

VSM

ON


R1

R6

R2

VOUT = 5V

R4

L11

R5

R3

C7

M1

C8C9

C4

VINP

L12

D1

C1

C5

C6

C2 C3

Figure 8 shows an economic example of an 15W output SEPIC converter for automotive applications. With the components in the parts list shown there is an input voltage range from 5V to 25V and an output voltage value of 10V with maximum of 1.5A current. The whole circuit works within specification from –40°C to +105°C ambient temperature.

ReferenceDesignator

Description Manufacturer Manufacturers orELMOS Part Number

R1 RESISTOR, 15mΩ, 1%, 1W, Power Metal Film, SMD, 2512 VITROHM Type RL2512 (1)

R2 RESISTOR, 12k1Ω, 1%, Metal Film, SMD, 0603 BEYSCHLAG Type MCT 0603

R3 RESISTOR, 88k7Ω, 1%, Metal Film, SMD, 0603 BEYSCHLAG Type MCT 0603

R4 RESISTOR, 10Ω, 5%, Metal Film, SMD, 0805 BEYSCHLAG

R5 RESISTOR, 470Ω, 5%, Metal Film, SMD, 0805 BEYSCHLAG

R6 RESISTOR, 220Ω, 5%, 0.5W, Metal Film, SMD, 2010 VITROHM Type 508-0

C1 CAP-FXD, 470μF, 25V, 1.43A, 38mΩ, 105°C, AL-ELCTLT, Z(-40°C)/Z(+20°C)≤3

RUBYCON ZL Series, 470μF/25V, 10x16







C5 CAP-FXD, 1.0nF, 16V, X7R, 105°C, CER, SMD KEMET

C6 CAP-FXD, 3.3nF, 50V, X7R, 105°C, CER, SMD KEMET

C7 CAP-FXD, 100pF, 16V, NPO, 105°C, CER, SMD KEMET Omitted with good layout

C8 CAP-FXD, 100nF, 16V, X7R, 105°C, CER, SMD KEMET

C9 CAP-FXD, 4.7μF, 6V, 105°C, TA, SMD EPCOS T491 Series

L1 TRANSFORMER, EVD15, SMD VOGT / ELMOS PI-EVD-1501 V1.0

D1 DUAL DIODE-PWR, SCHOTTKY, 12A, 100V, TO-252AA IRF 12CWQ10FN

M1 Transistor MOSFET, N-CH, LOGIC-LEVEL, 25mΩ, 60V, TO-252

VISHAY SUD40N06-25L

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9 Package Reference

The E910.26 is available in a Pb free, RoHS compliant, SOIC8N plastic package. For dimension details refer to JEDEC MS-012-F.The package is classified to Moisture Sensitivity Level 3 (MSL 3) according to JEDEC J-STD-020C.It has been qualified according to IEC 86 part 2-20 for the following soldering profile:1. (200±5) °C, dwell time (50±5) s2. (260±5) °C, dwell time <10 s

80

82

84

86

88

90

92

)%( yneiciff

E

6 8 10 12 14 16 18

V input (V)

V output = 10VI output = 1.5A

Figure 9: Efficiency of the Medium Power Sepic Converter @ TA = 25°C

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