Post on 04-Oct-2015
description
http
://m
ycom
p.su
/x/
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
81. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART IV ALL RIGHTS RESERVED
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT
3
B
7
ECNREV
BRANCH
DRAWING NUMBER
REVISION
SIZE
D
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
DRAWING TITLE
THE POSESSOR AGREES TO THE FOLLOWING:
Apple Inc.
SHEET
R
DATE
D
A
C
THE INFORMATION CONTAINED HEREIN IS THE
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
C
3456
D
B
8 7 6 5 4 2 1
12APPDCK
DESCRIPTION OF REVISION
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DRAWING
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PVTK94 CHOPIN MLB
REV. A
PRODUCTION RELEASED 2011-01-10
A.0.0
1 OF 106
051-8962
0001052699A
1 OF 42
LAST_MODIFIED=Mon Jan 10 13:11:06 2011
CHOPIN MLB
JAMES7 N/AAP: I/Os5
AP: VIDEO BUFFER,BB USB MUXES1311 JAMES N/A CONSTRAINTS: RF RULES106 N/A42 MIKE
VIDEO: MLC ALIASES MIKE15 21 N/A
SYNC MASTERPDF CONTENTS DATECSA
N/APOWER: ALIASES YOSH7332
33 N/A75 YOSHPOWER: BATTERY CONNECTOR
39 N/AMIKE100 CONSTRAINTS: ASSIGNMENTS
CONSTRAINTS: ASSIGNMENTS N/AMIKE40 101
CONSTRAINTS: MLB RULES N/A102 MIKE41
38 N/A93 FCT/ICT TEST/BRACKETS MIKE
N/A36 83 YOSHPOWER: 3.3V VR
N/A19 36 LENGAUDIO: L63 CODEC
POWER: PMU N/AYOSH8134
POWER: PMU YOSH N/A8235
N/A6 8 JAMESAP: NAND
JAMES8 N/A10 AP: PWR
MIKEDEBUG AND MISC N/A9037
30 N/A60 MIKECONNECTOR: X23 WIFI/BT
9 AP: PWR11 JAMES N/A
IO FLEX: DOCK COMPONENTS N/A57 JAMES28
39 LENG22 AUDIO: BLANK N/A
VIDEO: MLC14 N/A20 MIKE
ABBREV=DRAWINGTITLE=BACH
23 N/A42 LENGAUDIO: DETECT/MIC BIAS
VIDEO: DISPLAY PORT13 17 JAMES N/A
21 38 LENG N/AAUDIO: HEADPHONE OUT
AP: MISC & ALIASES10 N/A12 JAMES
4 N/A6 JAMESAP: MAIN
CONNECTOR: X24 CELLULAR/GPS31 N/A61 MIKE
5929 N/AJAMESIO FELX: B2B Connector
CONNECTOR: SENSOR PANEL CONNECTORMARK B.27 N/A56
55 CONNECTOR: CANADA FLEX FILTERS26 N/AMARK B.
LENG N/A24 43 AUDIO: HP/MIC FILTERS
AP: TV,DP,MIPI7 N/A9 JAMES
N/AMIKE3 5 BOM TABLE
18 RAMSIN N/A31 GRAPE: Z1, Z2
GRAPE: GROUNDHOG,CONN,BOOST RAMSIN30 N/A17
2216 ALEX N/AVIDEO: LVDS CONNECTOR
JONATHAN12 NAND14 N/A
MIKE2 N/A2 BLOCK DIAGRAM: SYSTEM
1 N/A1 MIKETABLE OF CONTENTS
SYNC MASTERCSAPDF DATECONTENTS
25 N/A54 MARK B.CONNECTOR: CANADA FLEX CONN,SENSOR PANEL ALIASES
AUDIO: SPEAKER AMP20 N/A37 LENG
http
://m
ycom
p.su
/x/
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
AUDIO CODEC
REAR CAMERA
UART2
SGX543-MP
ARM A5 CPU
AUDIO
USB1.1
GROUNDHOG Z1
Z2
I2S0
LINEOUT
ASP
L63
XSP
AMP
AMP
VSP
DUAL-CORE IMG
UART1
BACKLIGHT
BATTERY
ISP_I2C1
DISPLAY/TOUCH PANEL
LVDS
I2C1
SPI2 IPCGPSUMTSUSARTUSB1.1
X24
CELLULAR ANT
GPS ANT
BT_I2SUART3
GPU
MIPI0C
MIPI1C
WIFI/BTX23
WIFI/BT ANT
ALISONPMU
SPI1FF CAMERA
ISP_I2C0
SDIOCORTEX-A9 W/ SMP
MLC
ALSACCELEROMETERGYROSD CARD READER
SPEAKER
HP
MIC
AE2
30-PINDOCK
I2C2
H4PDUAL-CORE ARM
COMPASSPROX SENSOR
I2C0
AMP
USB2.0
UART4
NAND FLASHNAND FLASH
FMI3FMI2FMI1FMI0 HSIC0
I2S3
UART0
VIDEO DAC
I2S2
ICE3.0/GPS
CSA 60
CSA 36
CSA 58CSA 14 CSA 14
CSA 75
CSA 81
CSA 20
CSA 30 CSA 31
CSA 31
CSA 61
CSA 57
SENSOR PANEL SENSOR PANEL
SENSOR PANEL SENSOR PANEL CANADA FLEX
CANADA FLEX
SENSOR PANEL
DISPLAYPORT
850 MHZ
LPDDR2
400MHZ/800MB/S2X32-BIT
MIPI0D
UART5
DWI
SYNC_MASTER=MIKE
BLOCK DIAGRAM: SYSTEMSYNC_DATE=N/A
2 OF 106
A.0.0
051-8962
2 OF 42
http
://m
ycom
p.su
/x/
TABLE_5_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_BOMGROUP_ITEM
BOM OPTIONSBOM GROUPTABLE_BOMGROUP_HEAD
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
BOTTOM LABEL TYPE 1
BOTTOM LABEL TYPE 2
TOP BARCODE LABEL/EEE CODES(ONLY ONE IS USED PER BOM)
MLC_PROD
ADD DEVELOPMENT AND OTHER BOMS ONCE YOU GET BOM NUMBERS
MLC_DEV
K94K93
PORTRAIT_DOCK
SPEAKERINTERNAL_MIC
DEVELOPMENT_JTAGDEVELOPMENT_JTAG_TAPJTAG_DAPJTAG_TAP_NOT
BKLT_PLL
64GB_PROD32GB_PROD16GB_PROD
BOM OPTIONS PROGRAMMABLE PARTS
Power aliases required by this page:
Signal aliases required by this page:
ALL AVAIL BOM OPTIONS
(NONE)
ALTERNATECOMMON
BOM options provided by this page:
(NONE)
Page Notes
PD PARTS
SCH AND BOARD P/N
FENCE1806-1396 1 FENCE,GRAPE,MLB,K93/K94
EEEE_K94_16G825-7651 EEEE FOR 639-1112 (K94 16G) CRITICAL1 DFC4
BOM TABLESYNC_MASTER=MIKE SYNC_DATE=N/A
825-7651 EEEE FOR 639-1182 (K94 64G)1 EEEE_K94_64GCRITICALDFC6
825-7651 EEEE FOR 639-1430 (K95 16G) EEEE_K95_16GCRITICALDH3C1
825-7651 EEEE FOR 639-1426 (K93 32G) EEEE_K93_32GCRITICAL1 DH37
DH36825-7651 1 EEEE_K93_16GCRITICALEEEE FOR 639-1180 (K93 16G)
CRITICAL631- B/C LABEL825-7639 LBL11
639- B/C LABEL825-7639 LBL21 CRITICAL
EEEE FOR 639-1429 (K95 64G)1825-7651 EEEE_K95_64GCRITICALDG9C
825-7651 1 CRITICALEEEE FOR 639-1428 (K93 64G) EEEE_K93_64GDG99
825-7651 EEEE FOR 639-1181 (K94 32G) EEEE_K94_32G1 CRITICALDFC5
825-7651 CRITICALEEEE FOR 639-1427 (K95 32G) EEEE_K95_32GDH3D1
LBL4631- MATRIX LABEL825-7640 1 CRITICAL
LBL3MATRIX LABEL825-7640 1 CRITICAL
CAN2CAN,CPU,MLB,K93/K94 NOSTUFF1806-1399
FENCE,NAND,MLB,K93/K941806-1400 FENCE3
FENCE,CPU,MLB,K93/K941806-1398 FENCE2
COMMON,ALTERNATEBASIC
820-3069 PCBF,CHOPIN_AUDIO,MLB,K941 PCB1
051-8962 SCH,CHOPIN_AUDIO,MLB,K941 SCH1
CAN,GRAPE,MLB,K93/K94806-1397 NOSTUFF1 CAN1
806-1401 1 CAN,NAND,MLB,K93/K94 NOSTUFFCAN3
5 OF 106
A.0.0
051-8962
3 OF 42
http
://m
ycom
p.su
/x/
OUT
OUT
IN
IN
OUT
OUT
OUT
OUT
BI
BI
BI
BI
JTAG_TRST*
PLL2_AVDD11
PLL3_AVDD11
PLL1_AVDD11
USB_VBUS
USB_ANALOGTEST
HSIC2_DATA
JTAG_TRTCK
JTAG_TMS
USB11_DMUSB11_DP
XO0
HSIC1_STBHSIC1_DATA
MIPI1D_VDD11_PLL
MIPI_VSS_1
JTAG_TCK
JTAG_SEL
HSIC2_STB
HSIC_DVDD
PLL4_AVDD11
PLL_USB_AVDD11
MIPI0D_VDD11_PLL
USB_DVDD
USB_VDD330
HSIC_VDD122
HSIC_VDD121
PLL0_AVDD11
TESTMODE
FUSE1_FSRC
TST_STPCLK
FAST_SCAN_CLK
TST_CLKOUT
RESET*
HOLD_RESET
WDOG
XI0
USB_VSSAC
USB_VSSA0
MIPI_VSS_0
PLL_USB_AVSS11
USB_DVSS
PLL4_AVSS11
PLL3_AVSS11
PLL2_AVSS11
PLL1_AVSS11
PLL0_AVSS11
HSIC_VSS122
HSIC_VSS121
HSIC_DVSS
JTAG_TDI
USB_DMUSB_DP
USB_IDUSB_BRICKID
USB_REXTDDR1_CKEINDDR0_CKEIN
CFSB
JTAG_TDO
SYM 1 OF 12
VSS VSS
SYM 11 OF 12
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
1 - DAISY-CHAIN (FOR USE WITH 5-WIRE JTAG)PER RADAR #6755237
17MA
NEED TO ADD BOM TABLE FOR ALT P/N OF HYNIX (?)
28MA
5MA7MA
6.5MA
2.5MA
17MA
H4P UM V0.83PAGE 4608NOTE:
(FOR IC TESTER)
(0=NORMAL)
JTAGSEL0 - PARALLEL
2.5MA EACH
0.01UF10%
01005
6.3VX5R
10%0.01UF
01005
6.3VX5R
01005
1/32WMF
10K1%
5%16VCERM
22PF
01005
1% MF1/32W
1.00M01005
01005
100K
1/32WMF
1%
1/32W01005
MF
1%42.2K
MF1/32W5%
100K
01005
MF
1%1/20W44.2
201
10%
01005
6.3VX5R
0.01UF
DEVELOPMENT_JTAG_TAP
100K
10%0.01UF
01005
6.3VX5R
0.01UF
01005
10%6.3VX5R
10%
402CERM
1UF6.3V
0.01UF
01005
10%6.3VX5R
10%0.01UF
01005
6.3VX5R
0.01UF10%
01005
6.3VX5R
100K
100K
100K
GDZ-0201GDZT2R5.1B
35
35
28 31 35
4 10 39
10 39
4 28 39
4 28 39
10 39
28 39
28 39
1/32W01005
MF
1%82.5K
11 39
11 39
BGAH4P-512MB
01005
10%0.01UF6.3VX5R
10%
01005
0.01UF6.3VX5R
0201-1
80-OHM-0.2A-0.4-OHM
CERM
10%1UF
402
6.3V0.1UF10%6.3VX5R201
24.000MHZ-16PF-60PPMSM-2
CRITICAL
5%16VCERM
22PF
01005
01005
1/32W5%
22
MF
H4P-512MBBGA
SC58940X01-A030
01005MF
0%
0.00
1/32W
01005MF
0%
0.00
1/32W
01005MF
0%
0.00
1/32W
01005MF
0%
0.00
1/32W
01005
0%
0.00
1/32WMF
MF
0%
0.00
1/32W01005
56PFNP0-C0G5%
01005
6.3V
5%NP0-C0G01005
56PF6.3V
6.3V0.22UF20%X5R0201
NOSTUFF
SHORT-01005
SHORT-01005NOSTUFF
10%1000PF
X7R16V
201
SYNC_MASTER=JAMES
AP: MAINSYNC_DATE=N/A
AP_DDR1_CKEINAP_DDR1_CKEIN_1V2
AP_CFSB
NC_HSIC2_AP_DATA
AP_JTAG_SEL
JTAG_AP_TDI
JTAG_AP_TCK
JTAG_AP_TDIJTAG_AP_TMSJTAG_AP_TCK
USB_REXT
NC_USB_ID
USB_D_PUSB_D_N
XTAL_24M_O
USB_FS_D_PUSB_FS_D_N
24M_O
JTAG_AP_TMS
=PP1V8_H4
PPVBUS_USB
=PP1V8_H4
AP_TESTMODE
AP_TST_STPCLK
AP_FAST_SCAN_CLK
AP_HOLD_RESET
TP_AP_TST_CLKOUT
USB_BRICKID
XTAL_24M_I
USB_AP_VBUS
NC_USB_ANALOGTEST
RST_AP_1V8_L
=PP3V3_USB_H4
RST_AP_L
=PP1V1_USB_H4
RST_PMU_IN
=PP1V1_MIPI_PLL_H4
=PP1V1_USB_H4
MIN_NECK_WIDTH=0.1MMMAX_NECK_LENGTH=3 MM
VOLTAGE=1.1VMIN_LINE_WIDTH=0.2MMNET_SPACING_TYPE=PWR
PP1V1_PLL_USB_F
=PP3V3_USB_H4
=PP1V1_PLL_H4
JTAG_AP_TDOJTAG_AP_TRST_L
NC_JTAG_AP_RTCK
NC_HSIC2_AP_STB
TP_HSIC1_AP_STBTP_HSIC1_AP_DATA
=PP1V2_HSIC_H4
VOLTAGE=1.1V
NET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MM
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MM
PP1V1_MIPID_PLL_F
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MMVOLTAGE=1.1V
MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
PP1V1_PLL4_F
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MMVOLTAGE=1.1V
MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
PP1V1_PLL3_F
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MMVOLTAGE=1.1V
NET_SPACING_TYPE=PWR
PP1V1_PLL2_F
MAX_NECK_LENGTH=3 MM
MIN_NECK_WIDTH=0.1MMNET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MM
VOLTAGE=1.1VMIN_LINE_WIDTH=0.2MM
PP1V1_PLL1_F
MIN_NECK_WIDTH=0.1MMMIN_LINE_WIDTH=0.2MMVOLTAGE=1.1V
MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
PP1V1_PLL0_F
=PP1V1_USB_H4
C06271
2
C06301
2
R06171
2
C06131
2
R0655
12
R06321 2
R06881
2
R06511 2
R06421
2
C06081
2
R06621 2
C06421
2
C06411
2
C06401
2
C06441
2
C06461
2
C06481
2
R06471 2
R06461 2
R06451 2
DZ0600
1
2
R06891
2
U0652
W30
G11R7
T32
M28
P31
A26A27
C26D26
F24
E24
D25
D24
C25
C24
N31
N30
M32M31
N32
N29M30
AR10
AT14
AN10
AN11
C19
D19
C20
D20
C21
D21
C18
D18
C17
D17
C22
D22
P32
P29
P34P33
A23A22
G26
G27
A28A29
C28
D28
F28
A21
F27
H27
H28
H26
J26
P30
A18
A19
C06511
2
C06521
2
FL0610
1 2
C06551
2
C06541
2
Y0602
2 4
1 3
C06071
2
R06401 2
U0652AU14AU15AU16AU17AV1AV2AV3AV4AV5AV6AV7
AV8AV9
AV10AV11AV12AV13AV14AV15AV16AV17AV29AV33AV34AW1AW2AW4
AW23AW33AW34AY1AY2AY3AY4
AY20AY22AY24AY30AY31AY32AY33AY34
B1B2B7B9B10B12B13B15B17B18B20B22B23B28B29B30B32B33B34C1C2C3C4C5C6C7
C8C9C10C11C12C13C14C15C16C23C27C29C32C33D1D3D5D7D9D11D13D15D16D23
D27D32E1E2E3E4E6E8E10E12E14E16E17E18E19E20E21E22E23E25E26E27E28E30E31E32E34F1F2F3F5F19F20F21F22F23F25F26F29F30F31F32G1G3G4G7G8G9G10G12G13G14G15G16G17G18G19G20G21G22G25G28G29G30H1H2H3H5H7H8H10H12H14H16H18H20H22H24H25H29H30J1J2J3J4J7J9J11J13J15J17J19
R06241 2
R06231 2
R06221 2
R06211 2
R06201 2
R06251 2
C06601
2
C06611
2
C06431
2
XW06051 2
XW06041 2
C06181
2
6 OF 106
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051-8962
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10
4 10 39
4 28 39
39
39
4 28 39
4 5 7 10 13 32
34
4 5 7 10 13 32
10
10
10
10
39
4 32
4 32
32
4 32
4 32
32
32
4 32
http
://m
ycom
p.su
/x/
OUT
BI
BI
OUT
BI
OUT
OUT
OUT
IN
OUT
OUT
IN
OUT
IN
EHCI_PORT_PWR2EHCI_PORT_PWR1EHCI_PORT_PWR0
TMR32_PWM2
TMR32_PWM0TMR32_PWM1
GPIO1GPIO2
GPIO5GPIO4
GPIO18
GPIO0
UART3_RTSNUART3_CTSN
UART2_TXDUART2_RXD
UART2_RTSN
GPIO3
GPIO6GPIO7GPIO8GPIO9GPIO10
GPIO12GPIO11
GPIO14GPIO13
GPIO15
GPIO17GPIO16
GPIO19
GPIO22GPIO23
GPIO25GPIO24
GPIO27GPIO26
GPIO28
GPIO30GPIO29
GPIO32GPIO31
GPIO33
GPIO35GPIO34
GPIO37GPIO36
GPIO38
GPIO_3V0
GPIO39
GPIO_3V1
UART6_CTSNUART6_RTSNUART6_RXDUART6_TXD
UART5_RTXD
UART0_RXDUART0_TXD
UART1_RTSNUART1_CTSN
UART1_RXD
UART2_CTSN
UART1_TXD
UART3_RXDUART3_TXD
UART4_RTSNUART4_CTSN
UART4_RXDUART4_TXD
VSS
GPIO20GPIO21
SYM 2 OF 12
IN
IN
IN
IN
IN
OUT
IN
IN
IN
IN
OUT
OUT
OUT
IN
IN
IN
OUT
IN
IN
IN
IN
IN
OUT
OUT
IN
OUT
IN
IN
OUT
OUT
IN
OUT
IN
OUT
IN
OUT
SPI3_SSINSPI3_SCLK
SPI3_MISOSPI3_MOSI
DWI_DODWI_DI
SWI_DATA
DWI_CLK
I2C2_SDAI2C2_SCL
I2C1_SDAI2C1_SCL
I2C0_SDAI2C0_SCL
I2S1_LRCK
I2S0_DOUT
SDIO0_CLK
SDIO0_DATA0SDIO0_CMD
SDIO0_DATA1
SDIO0_DATA3SDIO0_DATA2
I2S1_DINI2S1_DOUT
I2S2_MCKI2S2_BCLKI2S2_LRCK
I2S2_DOUTI2S2_DIN
I2S3_BCLKI2S3_MCK
I2S3_DOUTI2S3_DIN
SPI0_MISO
SPDIF
SPI0_MOSISPI0_SCLKSPI0_SSIN
SPI1_MISOSPI1_MOSISPI1_SCLKSPI1_SSIN
SPI2_MOSISPI2_MISO
SPI2_SCLKSPI2_SSIN
VSS
I2S1_BCLKI2S1_MCK
I2S0_DINI2S0_LRCKI2S0_BCLKI2S0_MCK
I2S3_LRCK
SYM 3 OF 12
OUT
OUT
BI
BI
BI
BI
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
IN
OUT
IN
OUT
OUT
IN
OUT
IN
OUT
OUT
OUT
IN
IN
IN
OUT
IN
OUT
IN
IN
IN
IN
IN
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
GROUP 6
TO GPS UART
CODEC ASP
TO DOCK MUX
TO BB USART
TO BB UMTS
TO BT UART
1.8V/3.0V GROUP 0
3.0V
GROUP 11.8V
TO WIFI
GROUP 7
1.8V/3.0VGROUP 5
CODEC VSP & BT
CODEC XSP
TO GRAPE
TO BB
BB (NOT USED)
FOR PMUDUAL-WIRE INTF
(SCREEN ROTATION LOCK)
01005MF
4.7K5%1/32W
MF
4.7K5%1/32W01005 01005
MF
4.7K5%1/32W
01005MF
5%1/32W4.7K
1/32W5%
MF01005
1.8K5%1/32WMF01005
1.8K
5 10 19 35 39
5 10 19 35 39
5 25 39
5 25 39
5 25 26 39
5 25 26 39
17 40
17 40
17 40
17 40
31 40
31 40
31 40
31 40
BGAH4P-512MB
SC58940X01-A030
10
10
10
201
220K
5%1/20WMF
201
220K5%
1/20WMF
MF
5%
201
220K
1/20W
201
5%1/20W100K
MF201
5%1/20W100K
MF201
5%1/20W100K
MFMF1/32W5%100K
01005201
100K5%1/20WMF
5 29 35
5 25 35
5 31
31
31
35
10
18
5 35
5
10
5 37
10
31
10
25
25
26
25
20
31
10
10
10
10
10
10
10
10
10
10
10
10
SC58940X01-A030
H4P-512MBBGA
30 40
30 40
30 40
30 40
30 40
30 40
19 39
19 39
19 39
19 39
19 30 39
19 30 39
19 30 39
19 30 39
19 39
19 39
19 39
19 39
11
35 39
35 39
35 39
30
19
31
33 35
10
10
10
10
5 25
31
5 25 35
25
25
25
31
MF1/32W01005
1%33.2
19 39
10
10
10
31
31
SYNC_DATE=N/ASYNC_MASTER=JAMES
AP: I/Os
SDIO_WL_CLK
I2C2_SCL_3V0I2C2_SDA_3V0
NC_I2S_AP_1_MCK
TP_IRQ_COMPASS_INT_LIRQ_ACCEL_INT1_LIRQ_ALS_INT_L
AUD_SPKRAMP_MUTE_L
PORT_DOCK_VIDEO_AMP_ENNC_GPIO_218
UART_1_TXD
IRQ_ACCEL_INT2_L
NC_SPI_FLASH_CS_L
NC_AP_GPIO185NC_AP_GPIO186
NC_SWI_AP
NC_SPI_AP_3_MISONC_SPI_AP_3_MOSI
NC_SPI_AP_3_CS_LNC_SPI_AP_3_SCLK
NC_AP_GPIO216
NC_I2S_AP_3_MCK
NC_I2S_AP_2_MCK
NC_I2S_AP_1_DOUT
I2S_AP_0_MCK
NC_I2S_AP_1_BCLK
NC_I2S_AP_1_DINNC_I2S_AP_1_LRCK
PM_KEEPACTIRQ_GYRO_INT2
FORCE_DFUDFU_STATUS
NC_AP_GPIO187
=PP1V8_H4
I2C1_SCL_1V8
I2C0_SCL_1V8I2C0_SDA_1V8
ONOFF_L
HOME_L
SRL_L
=PP1V8_S2R_MISC
=PP1V8_ALWAYS
=PP1V8_S2R_MISC
PM_RADIO_ON
NC_AP_GPIO2
NC_AP_GPIO3
NC_AP_GPIO4
NC_AP_GPIO8
NC_BOARD_ID_3
NC_AP_GPIO10
NC_AP_GPIO14
NC_AP_GPIO5
NC_AP_GPIO6
NC_AP_GPIO22
NC_AP_GPIO20
BOOT_CONFIG_2
TP_PROX_GPIO
IRQ_GPS_INT_L
GSM_TXBURST_IND
BOARD_ID_0_SPI_FLASH_CLKBOARD_ID_1_SPI_FLASH_DINBOARD_ID_2_SPI_FLASH_DOUT
I2S_AP_0_MCK_R
IPC_GPIO
IRQ_PROX_INT_L
AUD_VOL_DOWN_L
AUD_VOL_UP_L
SRL_LRST_BB_L
IRQ_GYRO_INT2
UART_4_TXDUART_4_RXD
UART_4_RTS_LUART_4_CTS_L
BATTERY_SWI
PM_GPS_STANDBY_L
IRQ_CODEC_L
PM_BT_WAKE
DWI_AP_DI
DWI_AP_DO
DWI_AP_CLK
I2S_AP_3_DINI2S_AP_3_DOUT
I2S_AP_3_LRCKI2S_AP_3_BCLK
I2S_AP_2_DIN
I2S_AP_2_BCLKI2S_AP_2_LRCK
I2S_AP_2_DOUT
I2S_AP_0_DINI2S_AP_0_DOUT
I2S_AP_0_LRCKI2S_AP_0_BCLK
SDIO_WL_DATASDIO_WL_DATA
SDIO_WL_DATASDIO_WL_CMD
UART_3_TXDUART_3_RXD
UART_3_RTS_LUART_3_CTS_L
UART_2_TXDUART_2_RXD
UART_1_RTS_LUART_1_CTS_L
UART_1_RXD
UART_0_TXDUART_0_RXD
GPS_SYNC
IRQ_GYRO_INT1
BOOT_CONFIG_3RST_GPS_L
FORCE_DFUBOOT_CONFIG_1
DFU_STATUS
PM_KEEPACT
IRQ_GRAPE_HOST_INT_L
BOOT_CONFIG_0
IRQ_PMU_L
RST_DET_LSPI_IPC_SRDY
PM_RADIO_ON
ONOFF_LHOME_L
AP_GPIO42_BRD_REV2
AP_GPIO40_BRD_REV0AP_GPIO41_BRD_REV1
SPI_IPC_SCLKSPI_IPC_MRDY
SPI_IPC_MISO
SPI_GRAPE_CS_L
SPI_GRAPE_MISOSPI_GRAPE_MOSISPI_GRAPE_SCLK
I2C2_SDA_3V0I2C2_SCL_3V0
I2C1_SDA_1V8I2C1_SCL_1V8
I2C0_SCL_1V8I2C0_SDA_1V8
I2C1_SDA_1V8
=PP3V0_OPTICAL
SPI_IPC_MOSI
SDIO_WL_DATA
R07001
2
R07011
2
R07021
2
R07031
2
R07051
2
R07041
2
U0652
AL7AL6AM6
AA3AA4
AD7AC3AD6AD5AD4AD3AE7AD1AE1AE4
AA5
AE3AE2AF4AF3AF7AF2AG7AG6AG5AG4
AA6
AG3AG1AH1AH2AH7AH3AH4AJ5AJ4AJ3
AA7AB3AB4AB5AC7AC4
U30V30
AC30AA27AB30
R31R30
AN4AM5AM3AM1
AP4AM2AM4AN5
AP1AR2AR4AP2
AU1AT3AT4AT1
AR3
AU2AN3AU3AP3
A1A2A3A6A7A8A9
A10
A11
A12
R07711 2
R07701 2
R07651 2
R07391
2
R07381
2
R07371
2
R07361
2
R07351
2
U0652
AB34AA31Y27
AD26AD29
AD31AE30
AF30AF29
AB33
AC34AA32
Y31
Y32
AD32
W34AC32
Y34
AC33
V32
U32V31
U34
V33
W32
T30W29
U31
T31
AB27AC26AB31AD30AB26AB32
W31
AE29AG34AE31AE32
AH32AF28AG32AF31
AF34AG33AE27AE28
AH31AH29AH30AG30
AA30
A13
A14
A15
A16
A17
A20
A30
A33
A34
AA9
R0720
1 2
7 OF 106
A.0.0
051-8962
5 OF 42
5 25 26 39
5 25 26 39
5 35
5 25
5 37
5
4 7 10 13 32
5 25 39
5 10 19 35 39
5 10 19 35 39
5 25 35
5 29 35
5 25 35
5 28 32
32
5 28 32
5 31
5 25 39
26 27 32
http
://m
ycom
p.su
/x/
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
FMI0_IO6FMI0_IO5
FMI2_CEN2FMI2_CEN3
FMI3_IO3
FMI3_IO1FMI3_IO0
FMI3_CEN7FMI3_CEN6FMI3_CEN5
FMI3_CEN2FMI3_CEN1FMI3_CEN0
FMI2_DQSFMI2_REN
FMI2_IO0FMI2_IO1
FMI0_IO0FMI0_IO1
FMI0_CEN5FMI0_CEN6FMI0_CEN7
FMI0_CEN4
FMI0_CEN2FMI0_CEN3
VSS
FMI1_DQS
FMI1_WENFMI1_REN
FMI1_CLEFMI1_ALE
FMI1_IO7FMI1_IO6FMI1_IO5
FMI1_IO3FMI1_IO4
FMI1_IO2FMI1_IO1FMI1_IO0
FMI1_CEN7FMI1_CEN6
FMI1_CEN4FMI1_CEN3
FMI1_CEN5
FMI1_CEN1FMI1_CEN2
FMI1_CEN0
FMI0_REN
FMI0_ALE
FMI0_IO7
FMI0_IO4FMI0_IO3FMI0_IO2
FMI0_CEN0FMI0_CEN1
FMI3_DQS
FMI3_WENFMI3_REN
FMI3_CLEFMI3_ALE
FMI3_IO7FMI3_IO6FMI3_IO5
FMI3_IO2
FMI3_IO4
FMI3_CEN4FMI3_CEN3
FMI2_CLEFMI2_WEN
FMI2_ALE
FMI2_IO7
FMI2_IO4FMI2_IO5FMI2_IO6
FMI2_IO2FMI2_IO3
FMI2_CEN7FMI2_CEN6FMI2_CEN5FMI2_CEN4
FMI2_CEN1FMI2_CEN0
FMI0_CLEFMI0_WEN
FMI0_DQS
SYM 4 OF 12
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
VSS VSS
SYM 12 OF 12
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
GROUP 2GROUP 2
GROUP 2GROUP 2
GROUP 4
GROUP 5
GROUP 4GROUP 2
3.3V
GROUP 2
GROUP 3
3.3VGROUP 3
GROUP 5
MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
H4P-512MB BGA
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
12 39
SC58940X01-A030
BGAH4P-512MB
5%
MF
100K
01005
1/32W
14
36
MF1/32W5%100K
010051/32W01005
100K5%MF
01005
100K5%1/32WMF
01005
100K5%1/32WMF
01005
100K5%1/32WMF
01005
100K5%1/32WMF
01005
100K5%1/32WMF
01005
100K5%1/32WMF
17
17
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005
MF1/32W5%100K
01005MF1/32W5%100K
01005MF1/32W5%100K
01005010051/32WMF
5%100K
SYNC_MASTER=JAMES SYNC_DATE=N/A
AP: NAND
F1ALEF1CLE
F0ALEF0CLE
=PPIO_NAND_H4
F1RE_LF1WE_LF0RE_LF0WE_L
F1CE3_LF0CE0_L
F1RE_LF1WE_L
F0RE_LF0WE_L
F1CLEF1ALE
F0CLEF0ALE
F0ADF0AD
NC_F2CE2_LNC_F2CE3_L
NC_F3AD
NC_F3ADNC_F3AD
TP_CD_SD_CTRL_LPM_MLC_PWR_EN
TP_RST_SD_CTRL_L
NC_F3CE2_LNC_F3CE1_LNC_F3CE0_L
NC_AP_GPIO_110NC_F2RE_L
NC_F2ADNC_F2AD
F0ADF0AD
F0CE5_LF0CE6_LF0CE7_L
F0CE4_L
F0CE2_LF0CE3_L
NC_AP_GPIO93
F1ADF1ADF1AD
F1ADF1AD
F1ADF1ADF1AD
F1CE7_LF1CE6_L
F1CE4_LF1CE3_L
F1CE5_L
F1CE1_LF1CE2_L
F1CE0_L
F0AD
F0ADF0ADF0AD
F0CE0_LF0CE1_L
NC_AP_GPIO_135
NC_F3WE_LNC_F3RE_L
NC_F3CLENC_F3ALE
NC_F3ADNC_F3ADNC_F3AD
NC_F3AD
NC_F3AD
NC_AP_GPIO_147NC_F3CE3_L
NC_F2CLENC_F2WE_L
NC_F2ALE
NC_F2AD
NC_F2ADNC_F2ADNC_F2AD
NC_F2ADNC_F2AD
GRAPE_FW_DNLD_EN_LRST_GRAPE_L
TP_GPIO_SD_CTRLRST_MLC_L
NC_F2CE1_LNC_F2CE0_L
NC_AP_GPIO76
F0CE7_L
F1CE6_L
F0CE5_LF0CE6_L
F1CE4_LF1CE5_L
F1CE7_LF0CE4_L
=PPIO_NAND_H4
=PPIO_NAND_H4
F0CE2_LF0CE3_L
F0CE1_L
F1CE2_LF1CE1_LF1CE0_L
R08251
2
R08361
2
R08281
2
R08271
2
R08341
2
R08331
2
R08321
2
R08311
2
U0652
AT20
AV20AW21AU19AU20AV31AT31AV32AU30
AU21
AT21
AV18AU18AT22AW19AV21AU22AY21AR20
AV22AT19
AP23
AN22AY19AP20AT18AN30AU34AU33AP30
AV19
AY25
AV25AU23AW25AU25AU24AV24AT23AV23
AN21AN23
AW27
AY26AU26AW26AV26AP34AL32AK31AM32
AU27
AV30
AY29AR30AU29AV28AY28AW30AW28AU28
AY27AV27
AT32
AT30AP31AU31AU32AN34AM33AM34AN33
AT34
AR33
AP33AL31AR34AN32AM31AN31AR32AP32
AR31AT33
AA11
AA13
AA15
AA17
AA19
AA21
AA23
AA25
AA29
AB1
AB6
AB8
U0652J21J23J25J27J28J29J30K1K3K5K7
K8K10K12K14K16K18K20K22K24K26K30K31K32L1L2L3L4L7L9L11L13L15L17L19L21L23L25L28L29L30L31L32L33M1M3M5M7
M8M10M12M14M16M18M20M22M24M26M29M33N1N2N3N4N7N9N11N13N15N17N19N21N23N25N27N28P1P2P3P5P7
P8P10P12P14P16P18P20P22P24P26R1
R3R4R9R11R13R15R17R19R21R23R25R27R29R34T1T2T3T5T7
T8T10T12T14T16T18T20T22T24T26T29T33U1U3U4U7U9U11U13U15U17U19U21U23U25U27U28V1V2V3V5V7V8V10V12V14V16V18V20V22V24V26V28V34W1W2W3W4W7W9W11W13W15W17W19W21W23W25W27Y3Y5Y7
Y8Y10Y12Y14Y16Y18Y20Y22Y24Y29Y30
R08781
2
R08671
2
R08661
2
R08651
2
R08641
2
R08631
2
R08621
2
R08611
2
R08601
2
R08001
2
R08011
2
R08021
2
R08031
2
R08131
2
R08121
2
R08111
2
R08101
2
8 OF 106
A.0.0
051-8962
6 OF 42
6 12 39
6 12 39
6 12 39
6 12 39
6 9 10
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 9 10
6 9 10
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
http
://m
ycom
p.su
/x/
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
BI
IN
BI
OUT
OUT
OUT
OUT
IN
IN
MIPI_VSSMIPI0D_DNCLKMIPI0D_DPCLK
MIPI0D_DNDATA3MIPI0D_DPDATA3
MIPI0D_DNDATA2MIPI0D_DPDATA2
MIPI0D_DNDATA1MIPI0D_DPDATA1
MIPI0D_DNDATA0MIPI0D_DPDATA0
MIPI0C_DNCLK
MIPI0C_DNDATA3
MIPI0C_DPCLK
MIPI0C_DPDATA3
MIPI0C_DNDATA2
MIPI0C_DPDATA0
MIPI_VSYNC
MIPI1C_DNCLKMIPI1C_DPCLK
MIPI1C_DNDATA1MIPI1C_DPDATA1
MIPI1C_DNDATA0
SENSOR1_RST
MIPI1C_DPDATA0
SENSOR0_RST
SENSOR1_CLK
SENSOR0_CLK
ISP1_SDAISP1_SCL
ISP1_PRE_FLASH
ISP0_SDA
ISP1_FLASH
ISP0_SCLISP0_PRE_FLASH
ISP0_FLASH
MIPI0D_VREG_0P4V
MIPI1D_VREG_0P4V
MIPI0D_VDD18
MIPI1D_VDD18
MIPI_VDD11
MIPI0C_DNDATA0
MIPI0C_DPDATA1MIPI0C_DNDATA1
MIPI0C_DPDATA2
SYM 5 OF 12
OUT
OUT
OUT
OUT
BI
OUT
BI
DAC_COMP
DP_PAD_TX0NDP_PAD_TX0P
DP_PAD_TX1NDP_PAD_TX1P
DP_PAD_AUXNDP_PAD_AUXP
DP_HPD
DAC_OUT1DAC_OUT2DAC_OUT3
DP_PAD_DC_TP
DP_PAD_R_BIAS
DP_PAD_DVSS
DP_PAD_AVSSX
DP_PAD_AVSSP0
DP_PAD_AVSS1
DP_PAD_AVSS0
DP_PAD_AVSS_AUX
DAC_AVSS30A
DAC_AVSS30D
DAC_AVSS30A
DP_PAD_DVDD
DP_PAD_AVDDX
DP_PAD_AVDDP0
DP_PAD_AVDD0
DP_PAD_AVDD1
DP_PAD_AVDD_AUX
DAC_AVDD30D
DAC_AVDD30A
DAC_VREF
DAC_IREF
SYM 6 OF 12
OUT
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
OUT
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
http
://m
ycom
p.su
/x/
VSS
VSSVDDIO18
VDDIOD
SYM 9 OF 12
VSS
VSS
VSS
VSS
VSS_39VSS_38
VSS_37
VSS_35VSS_34
VSS_32
VDDQ
VDD1
VDD2
DDR1_ZQDDR0_ZQ
DDR1_VREF_DQ
VDDCA
DDR1_VREF_CADDR0_VREF_CA
DDR0_VREF_DQ
DDR0_VDDQ_CKEDDR1_VDDQ_CKE
VSS_36
VSS_33
SYM 7 OF 12
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
(DDR IMPEDANCE CONTROL)
(VDDQ = VDDIOD: DONT DOUBLE COUNT)500MA
40MA
320MA
80MA
http
://m
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VDDVDD
SYM 10 OF 12
VDDIOD5
VDDIOD4
VDDIOD1VSS
VSS
VSS
VSS
VDDIO30
VDDIOD0
VDDIOD2
VDDIOD3
VDDIOD6VDDIOD7
VSSVDD_CPU
SYM 8 OF 12
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
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SHEET
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Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
3.3V
24MA
24MA
24MA
10MA
9MA
100MA
1900MA
2100MA
3.3V
1.8V
I2C2SPI1
FMI[3]
FMI[0-2]
GPIO[30-39]1.8V
UART4
24MA
FMI[2-3]_CEN[4-7]SPI3,ISP FLASH
FMI[0-1]_CEN[4-7]3.3V
NOT USED
1MA1MA
3.0V
20%X5R-CERM
4V
4.3UF
0610
6.3V
01005
5%56PF
NP0-C0G
NOSTUFF
20%0.22UF
0201X5R
6.3V
20%4V
0610X5R-CERM
4.3UF
6.3V
01005
5%56PF
NP0-C0G
NOSTUFF
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%4.3UFX5R-CERM
0610
4V
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
SC58940X01-A030
H4P-512MBBGA
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V
20%X5R
6.3V
603
10UF
20%4.3UF
0610X5R-CERM
4V
20%X5R-CERM
4.3UF
0610
4V
6.3V
01005
56PF5%
NP0-C0G
20%0.22UF
0201X5R
6.3V
20%4V
4.3UF
X5R-CERM0610
20%X5R-CERM
0610
4V
4.3UF
6.3V
01005
5%56PF
NP0-C0G
20%0.22UF
0201X5R
6.3V
6.3V
01005
56PF5%
NP0-C0G
NOSTUFF
6.3V
01005
5%56PF
NP0-C0G
20%0.22UF
0201X5R
6.3V
20%X5R
6.3V
603
10UF
6.3V
01005NP0-C0G
5%56PF
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%X5R
6.3V10UF
603
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V
6.3V
402
10%CERM
1UF6.3V
402CERM
10%1UF
SC58940X01-A030
H4P-512MBBGA
6.3V
01005
5%56PF
NP0-C0G
NOSTUFF
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V
6.3VNP0-C0G
5%56PF
01005
NOSTUFF
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V
20%0.22UF
0201X5R
6.3V20%
0.22UF
0201X5R
6.3V6.3V
402
10%CERM
1UF6.3V
402CERM
10%1UF
6.3V1UF10%
CERM402
6.3V
01005
5%56PF
NP0-C0G
NOSTUFF
SYNC_DATE=N/A
AP: PWRSYNC_MASTER=JAMES
=PP1V8_VDDIO18_H4
=PP3V0_IO_H4
=PPVDD_SOC_H4
=PPVDD_CPU_H4
=PPIO_NAND_H4
=PP3V0_IO_H4
C1103 1
2
C1102 1
2
C1101 1
2
C11071
2
C11111
2
C1106 1
2
C1105 1
2
C1110 1
2
C1100 1
2
C1104 1
2
C1109 1
2
C11081
2
C11161
2
C11201
2
C11151
2
C11141
2
C11191
2
U0652AA20AA22
AB23
AM17AM19AM21AM23AM25H9H13H15H17H19
AB25
H21J8J10J12J14J16J18J20J22J24
AC8
K9K11K13K15K17K19K21K23K25L8
AC10
L10L12L14L16L18L20L22L24L26M9
AC12
M11M13M15M17M19M21M23M25N20N22
AC14
N24N26P19P21P23P25P27R20R22R24
AC16
R26T19T21T23T25T27U20U22U24U26
AC18
V19V21V23V25V27W20W22W24W26Y19
AC20
Y21Y23Y25
AC22
AA24
AC24AD9
AD11AD13AD15AD17AD19AD21AD23AD25
AB9
AE8AE10AE12AE14AE16AE18AE20AE22AE24AF9
AB11
AF11AF13AF15AF17AF19AF21AF23AF25AG8
AG10
AB13
AG12AG14AG16AG18AG20AG22AG24AG26AH9
AH11
AB15
AH13AH15AH17AH19AH21AH23AH25AJ8
AJ10AJ12
AB17
AJ14AJ16AJ18AJ20AJ22AJ24AJ26AK9
AK11AK13
AB19
AK15AK17AK19AK21AK23AK25AL8
AL10AL12AL14
AB21
AL16AL18
AL20AL22AL24AL26AM9AM11AM13AM15
C11131
2
C11121
2
C11181
2
C11171
2
C1121 1
2
C1128 1
2
C11321
2
C1136 1
2
C1127 1
2
C1126 1
2
C11311
2
C1135 1
2
C1130 1
2
C11341
2
C1125 1
2
C1129 1
2
C11331
2
C11411
2
C1149 1
2
C1143 1
2
C1142 1
2
C1148 1
2
C1147 1
2
U0652AA8
AA10
N16N18P9P11P13P15P17R10R12R14
AA12
R16R18T9T11T13T15T17U8U10U12
AA14
U14U16U18V9V11V13V15V17W8W10
AA16
W12W14W16W18Y9Y11Y13Y15Y17
AA18N8N10N12N14
G23G24U29V29
AJ7AK7
AN9
AP24AP25AP26AP27AP28AR21AR22AR23
AP29
AL27AM27
AJ27AK27
AH27AG27
AH10AH12AH14AH16AH18AH20AH22AH24AH26AH28AH34AJ1AJ2AJ6AJ9AJ11AJ13AJ15AJ17AJ19AJ21AJ23AJ25AJ28AJ29AJ30AJ31AJ33AJ34AK1AK3AK4AK5AK6AK8AK10AK12AK14AK16AK18AK20AK22AK24AK26AK28AK29AK30
AK32AL3AL4AL5
AL9AL11
AL13
AL15AL17AL19AL21AL23AL25AL28AL29
AL30
AL34AM7
AM8AM10
AM12AM14
AH5AH8
C1152 1
2
C1151 1
2
C11401
2
C11391
2
C11381
2
C1146 1
2
C1145 1
2
C1144 1
2
C11371
2
C1150 1
2
C1161 1
2
C1160 1
2
C1182 1
2
C1181 1
2
C1180 1
2
11 OF 106
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32
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IN
OUT
OUT
OUT
IN
IN
OUT
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
OUT
OUT
OUT
OUT
IN
OUT
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
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PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
K95 AP00110010
PROTO 1PROTO 2EVT010
11103. READ2. DISABLE PU AND ENABLE PD
1010 FMI1 4CS W/TEST1011 RESERVED
1110 FMI0/1 4/4 CS W/TEST
1111 RESERVED
1101 FMI0/1 4/4 CS
0011 SPI3 W/TEST
0001 SPI3
PLACEMENT NOTE: NEAR U0652
TO GPS UART
TO BT UART
TO BB UMTS
TO BB USART
TO DOCK MUX
1001 FMI1 4 CS
0110 FMI0 4CS W/TEST
0010 SPI0 W/TEST
BOOT_CONFIG[3:0]
1000 FMI1 2 CS0111 RESERVED
0101 FMI0 4CS0100 FMI0 2CS
0000 SPI0
BOARD REVISION
BOOT CONFIG ID
DEVELOPMENT_JTAGJTAG_DAPDEVELOPMENT_JTAG
2-WIRE DAP SCAN DUMP
DEVELOPMENT_JTAG_TAPJTAG_DAP
JTAG
PRODUCTION
BOARD_ID[3]
BOARD_ID[2]
BOARD_ID[1]
BOARD_ID[0]
BOOT_CONFIG[2] (GPIO28)
BOOT_CONFIG[3] (GPIO29)
BRD_REV[2-0]
000
FOR REFERENCE
1. SET GPIO AS INPUT
S/W READ FLOW
FMI0/1 4/4 CSFMI0/1 4/4 CS WITH TEST
BOOT_CONFIG[3-0]
1101
1100 FMI0/1 2/2 CS
BOOT_CONFIG[0] (GPIO18)
K93 DEVK93 AP
BOARD_ID[3-0]
0100
011101100101
K94 APK94 DEV
K95 DEV
3. READ2. DISABLE PU AND ENABLE PD
BOOT_CONFIG[1] (GPIO25)
CURRENT SETTING ->
001
1. SET GPIO AS INPUT
S/W READ FLOW
BOARD_ID_3
BOARD ID
011 EVT2DVT100
3. READ2. ENABLE PU AND DISABLE PD1. SET GPIO AS INPUT
S/W READ FLOW
K94-K95
01005MF
10K5%1/32W
4 39
4 39
4 10 39
11 28 40
11 28 40
11 28 40
4
4 10 39
201
10K5%1/20WMF
201
10K5%1/20WMF
FMI_NOTEST
MF1/32W5%10K
01005
K9X_DEV
1/32W10K5%MF01005
K93-K94
1/32WMF
5%10K
01005
SHORT-01005NOSTUFF
SHORT-01005NOSTUFF
SHORT-01005NOSTUFF
11
11
31
31
31
31
31
31
30
30
30
30
31
31
31
31
7 13 40
7 13 40
7 13 40
7 13 40
201
25VCERM
100PF5%
NOSTUFFSIGNAL_MODEL=EMPTY
SIGNAL_MODEL=EMPTYNOSTUFF
5%1501/20WMF201
SIGNAL_MODEL=EMPTY
201
5%1501/20WMF
NOSTUFFSIGNAL_MODEL=EMPTY
201
NOSTUFF
MF1/20W1505%
SIGNAL_MODEL=EMPTYNOSTUFF
201
5%
MF
1501/20W
SIGNAL_MODEL=EMPTY
25VCERM
100PF5%
NOSTUFF
201
5 19 35 39
5 19 35 39
01005
5%
100
1/32WMF
201
10K5%1/20WMF
FMI_TEST
100
JTAG_DAP
DEVELOPMENT_JTAG_TAP
1/32W
0.000%MF
01005
1/32W
0.000%MF
DEVELOPMENT_JTAG_TAP
01005100
JTAG_DAP
1/32W
0.00
0%MF
DEVELOPMENT_JTAG_TAP
01005
MF1/20W10K5%
201MF
10K5%1/20W201
5%10K
2011/20WMF
NOSTUFF
SYNC_MASTER=JAMES SYNC_DATE=N/A
AP: MISC & ALIASES
BOARD_ID_2_SPI_FLASH_DOUT
BOARD_ID_0_SPI_FLASH_CLK
BOARD_ID_1_SPI_FLASH_DIN
=PP1V8_H4
DP_TERM_C1251
DP_AP_TX_NDP_AP_TX_P
DP_TERM_C1250
DP_AP_TX_NDP_AP_TX_P
PP_DP_PAD_AVDD0
PP_DP_PAD_AVDD1
PP_AP_DP_AVDD_AUX
MAKE_BASE=TRUE
AP_TST_STPCLK
AP_FAST_SCAN_CLK
AP_HOLD_RESET
=PP1V8_H4
VIDEO_EMI_C_Y
VIDEO_EMI_Y_PR
JTAG_AP_TDO
JTAG_AP_TDI
JTAG_AP_TRST_L
AP_JTAG_SEL
JTAG_AP_TRST_L
BOOT_CONFIG_0
BOOT_CONFIG_1
BOOT_CONFIG_3
BOOT_CONFIG_2
AP_GPIO42_BRD_REV2
AP_GPIO40_BRD_REV0
UART_1_RXD
UART_1_CTS_LUART_1_RTS_L
UART_1_TXD
UART_2_RXDUART_2_TXD
UART_3_CTS_LUART_3_RTS_L
UART_3_RXDUART_3_TXD
UART_4_CTS_LUART_4_RTS_L
UART_4_RXDUART_4_TXD
UART_AP_1_CTS_LMAKE_BASE=TRUE UART_AP_1_RTS_LMAKE_BASE=TRUE
UART_AP_1_RXDMAKE_BASE=TRUE UART_AP_1_TXDMAKE_BASE=TRUE
UART_AP_2_RXDMAKE_BASE=TRUE UART_AP_2_TXDMAKE_BASE=TRUE
UART_AP_3_CTS_LMAKE_BASE=TRUE
UART_AP_3_RTS_LMAKE_BASE=TRUE UART_AP_3_RXDMAKE_BASE=TRUE UART_AP_3_TXDMAKE_BASE=TRUE
UART_AP_4_CTS_LMAKE_BASE=TRUE
UART_AP_4_RTS_LMAKE_BASE=TRUE UART_AP_4_RXDMAKE_BASE=TRUE UART_AP_4_TXDMAKE_BASE=TRUE
=PPIO_NAND_H4 =PP3V3_NAND_H4
UART_0_RXDUART_0_TXD MAKE_BASE=TRUE
UART_AP_0_RXD
MAKE_BASE=TRUE
UART_AP_0_TXD
I2C0_SDA_1V8MAKE_BASE=TRUE
I2C0_SCL_1V8MAKE_BASE=TRUE
CHS_SDACHS_SCL
AP_TESTMODE
VIDEO_EMI_CVBS_PB
AP_GPIO41_BRD_REV1
R12051
2
R12021
2 R12101 2
R12121 2
R12131 2
R12111 2
R12141 2
R12071
2
R12081
2
R12091
2
R12011
2
R12001
2
R12031
2
R12061
2
R12041
2
XW0602 1 2
XW0601 1 2
XW0603 1 2
C12511
2
R12521
2
R12531
2
R12511
2
R12501
2
C12501
2
R12601 2
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5
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4 5 7 10 13 32
7
7
7
4
4
4
4 5 7 10 13 32
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6 9 32
5
5
23
23
4
5
http
://m
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p.su
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RX_VHIGH/USB_2D+TX_VHIGH/USB_2D-
CH.3_OUTCH.2_OUTCH.1_OUT
VID_EN
USB_1D-USB_1D+
SEL
DGNDAGND
CH.1_INCH.2_INCH.3_IN
USB_D-USB_D+
RX_VLOWTX_VLOW
VA_1
VDH
VA_0
VDL
OUT
OUT
OUT
OUT
INOUT
IN
BI
BI
BI
BI
IN
IN
IN
IN
IN
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
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Apple Inc.
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B
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YIN
CIN
NOTE: PLACE R0960-62 NEAR U0900
H4P UART0 DOCK SERIAL
LDO3 PROVIDES 50MA TO BOTH H4P AND U1300IF THATS NOT ENOUGH, STUFF R1371 AND NOSTUFF R1370
CVBSIN
NOTE:BB USB DOCK SERIALDOCK_BB_EN = 1:
DOCK_BB_EN = 0:
NOTE:
BB USB H4P FS USB
~15MA
THS7380IZSYRUCSP
10 28 40
10 28 40
75
1/20WMF
1%
201
JTAG_DAP
201MF
1%
75
JTAG_DAP
1/20W
201
1%
MF
75
JTAG_DAP
1/20W
10 28 40
0.00
MF01005
0%1/32W
NOSTUFF
0%
0.00
1/32WMF
01005
0.1UF10%X5R201
6.3V
MF
100K5%
1/32W01005
28 39
28 39 10
10
31 39
31 39
4 39
4 39
7 40
7 40
7 40
01005
6.3V5%
NP0-C0G
56PF6.3V
0.1UF10%X5R201
100K5%
MF01005
1/32W
5
35
1/32W01005
5%1.00M
MF
AP: VIDEO BUFFER,BB USB MUXESSYNC_DATE=N/ASYNC_MASTER=JAMES
PP3V0_U0900_FILTR
VOLTAGE=3.0V
MIN_NECK_WIDTH=0.1MM
MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.2MM
BUF_C_YBUF_CVBS_PB
UART_AP_0_RXDUART_AP_0_TXD
=PP3V0_VIDEO_BUFFER
DOCK_BB_EN
USB_FS_D_PUSB_BB_D_N USB_FS_D_NUSB_BB_D_P VIDEO_EMI_C_Y
VIDEO_EMI_Y_PR
VIDEO_EMI_CVBS_PB
=PP3V0_VIDEO_BUF
DAC_AP_OUT2DAC_AP_OUT3
DAC_AP_OUT1
PORT_DOCK_VIDEO_AMP_EN
BUF_Y_PR
=PP3V2_S2R_USBMUX
USB_FS_P_ACC_RXUSB_FS_N_ACC_TX
U1300
B2B3
A3 A2A4 A1B4 B1
D3E3
E1E4
C2
D1D4
F1F2
F4F3
C1
C4
E2
D2
C3
R13601 2
R13611 2
R13621 2
R13711 2
R13701 2
C13701
2
R13721
2
C1301 1
2
C1300 1
2
R13201
2
R13151
2
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051-8962
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BI
IO0_1
CE6*
IO0_0
IO1_0IO1_1
CE7*
CLE0CLE1
ALE0
IO4_1
RE0*RE1*
R/B0*R/B1*
IO6_0
IO2_0
WE1*
CE2*CE3*CE4*CE5*
CE0*
WE0*
R
CE1*
IO4_0
ALE1
INC
VSSQ
VCC
VCCQ
IO7_0IO7_1
IO5_1IO5_0
VSS
IO6_1
IO3_1IO3_0IO2_1
INC_VDDI
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IO0_1
CE6*
IO0_0
IO1_0IO1_1
CE7*
CLE0CLE1
ALE0
IO4_1
RE0*RE1*
R/B0*R/B1*
IO6_0
IO2_0
WE1*
CE2*CE3*CE4*CE5*
CE0*
WE0*
R
CE1*
IO4_0
ALE1
INC
VSSQ
VCC
VCCQ
IO7_0IO7_1
IO5_1IO5_0
VSS
IO6_1
IO3_1IO3_0IO2_1
INC_VDDI
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
BI
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
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Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
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D
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8 7 5 4 2 1
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#TABLE_5_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#TABLE_5_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
64GB FLASH CONFIGURATIONS16GB FLASH CONFIGURATIONS
32GB FLASH CONFIGURATIONS
6 12 39
NAND-XXNM-64GX8
VLGA5-N90
LGA
OMIT
6 39
6 39
6 39
6 39
6 39
6 39
6 39
6 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
LGA
OMIT
NAND-XXNM-64GX8
VLGA5-N90
6 12 39
6 12 39
6 39
6 39
6 39
6 39
6 39
6 39
6 39
6 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
10%1UF
402X5R6.3V
6.3VX5R402
1UF10%
2.2UF20%6.3VCERM402-LF
0.1UF10%
X5R201
6.3V6.3V10%
201X5R
0.1UF
20%2.2UF6.3VCERM402-LF201
X5R
10%6.3V0.1UF
10%6.3VX5R201
0.1UF
100K
1/20WMF
1%
2011/20W
100K
201
1%
MF
25VCERM0201
82PF5%
0201
25V
82PFCERM
5%
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
6 12 39
335S0722 SANDISK 32NM 32GB RAWU1400,U141064GB_PROD335S0702
HYNIX 26NM 32GB PPN335S0782 335S0702 U1400,U141064GB_PROD
335S0791 64GB_PROD SAMSUNG 27NM 32GB RAWU1400,U1410335S0702
64GB_PROD335S0665 335S0702 U1400,U1410 SAMSUNG 35NM 32GB RAW
U1400,U1410 64GB_PROD2335S0702 TOSHIBA 32NM 32GB RAW
32GB_PROD HYNIX 26NM 16GB PPNU1400,U1410335S0701335S0781
32GB_PROD335S0790 SAMSUNG 27NM 16GB RAW335S0701 U1400,U1410
335S0701335S0682 SAMSUNG 35NM 16GB RAWU1400,U141032GB_PROD
HYNIX 26NM 16GB PPN335S0781 335S0701 U140016GB_PROD
TOSHIBA 32NM 16GB RAW U1400,U1410 32GB_PROD335S0701 2
335S0790 SAMSUNG 27NM 16GB RAW335S0701 U140016GB_PROD
335S0682 335S0701 SAMSUNG 35NM 16GB RAWU140016GB_PROD
TOSHIBA 32NM 16GB RAW U14001335S0701 16GB_PROD
NANDSYNC_DATE=N/ASYNC_MASTER=JONATHAN
F0AD
F0AD
F0ADF1AD
F1AD
F1AD
F1AD
=PP3V3_NAND
F0RE_L
F1WE_L
NAND0_RB
F0ADF1AD
F1ADF0AD
NAND0_RB
F0AD
F0AD
F1AD
F1ADF0AD
F1CLE
F1RE_L
F0ALE
NAND1_RB
F0RE_LF1RE_L
F0CLEF1CLE
F1CE7_L
F1CE3_L
F0CE2_L
F0WE_L
F0AD
F0AD
F0ADF1AD
NAND0_VDDL
F0CE6_LF1CE6_LF0CE7_L
NAND1_VDDL
F1WE_L
F1AD
F0CE0_L
F1AD
F1AD
F0ADF1AD
F1AD
NAND1_RB
F0ADF1AD
=PP3V3_NAND
F0ADF1ADF0AD
F1CE0_LF0CE1_LF1CE1_L
F0WE_L
F0ALEF1ALE
F0CLE
F1CE5_LF0CE5_LF1CE4_LF0CE4_L
F0AD
F1ALE
F0CE3_LF1CE2_L
C14021
2
C14011
2
C14001
2C14121
2
C14111
2
C14101
2
R14001 2 R1401
1 2
C14131
2
C14031
2
U1400C1D2
A5C5A1OA0G5F2OB0OE0
A3C3
A7OA8OB8
G3G1H2J1J3L1K2N3L5N5K6L7J5J7H6G7
OC0OC8OD0OD8OF0OF8
E5E7
C7D6
B6M6N1N7
B2
F6
L3
M2
OE8
E3E1
U1410C1D2
A5C5A1OA0G5F2OB0OE0
A3C3
A7OA8OB8
G3G1H2J1J3L1K2N3L5N5K6L7J5J7H6G7
OC0OC8OD0OD8OF0OF8
E5E7
C7D6
B6M6N1N7
B2
F6
L3
M2
OE8
E3E1
C14141
2
C14041
2
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12 32
12 12
12 12
12 32
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GND
VCC
NCNC
YA
OUT
OUT
OUT
OUT
BI
BI
OUTIN
IN
IN
IN
IN
BI
BI
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
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DISPLAYPORT AC COUPLING
DISPLAYPORT HOT PLUG DETECT
1/32WMF
100K1%
01005
MF1/32W100K1%
01005
1/32W220K
MF
5%
01005CRITICAL
SOT88674LVC1G07
6.3VX5R201
0.1UF10%
NOSTUFF
5%
MF
10K1/32W01005
MF1/32W0.000%
01005
28 40
28 40
28 40
28 40
13 28 40
13 28 40
7 28 35
7 10 40
7 10 40
7 10 40
7 10 40
7 40
7 40
10% X5R0.1UF 6.3V 201
10% X5R0.1UF 6.3V 201
10% X5R0.1UF 6.3V 201
10% X5R0.1UF 6.3V 201
10% X5R0.1UF 6.3V 201
10% X5R0.1UF 6.3V 201
VIDEO: DISPLAY PORTSYNC_DATE=N/ASYNC_MASTER=JAMES
RADAR:8481319U1701311S0341311S0536
DP_AP_HPD
=PP3V0_IO_MISC
FW_ZENER_PWR DP_BUF_HPD
=PP1V8_H4
DP_AP_AUX_N
DP_AP_TX_P
DP_AP_TX_N
DP_AP_TX_P
DP_AP_TX_N
DP_EMI_TX_P
DP_EMI_TX_P
DP_EMI_TX_N
DP_EMI_TX_N
DP_AP_AUX_P DP_EMI_AUX_P
DP_EMI_AUX_N
=PP3V0_IO_MISC
DP_EMI_AUX_N
DP_EMI_AUX_P
C1702 1 2
C1703 1 2
C1704 1 2
C1705 1 2
C1706 1 2
C1707 1 2
R17201
2
R17231
2
R17311
2
U1701
2
3
1 5
6
4
C17501
2
R17511
2
R1750
1 2
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4 5 7 10 32
13 32
13 28 40
13 28 40
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OUT
OUT
OUT
OUT
OUT
BI
IN
OUT
OUT
OUT
BI
MONITOR5
VDD33A_OSC
VSYNC
PPC
MONITOR6
MONITOR4
TCLKN
TEST
MONITOR1
S_DNDATA2S_DPDATA2
S_DNDATA1S_DPDATA1
S_DPDATA0S_DNDATA0
VDD33A_18LDO
VDD33A_12LDO_1
VDD33A_12LDO_0
VDD33A_12LDO_2
VDD33P_LVDS
VDD33A_LVDS
VDD33D_LVDS
TCLKP
TCNTCP
TBN
TBP
TANTAP
PWM
VSS33A_18LDO
VSS33A_12LDO_0
VSS33A_12LDO_1
VSS33A_LVDS
MONITOR3MONITOR2
MONITOR0
M_DPDATA0
S_DPCLKS_DNCLK
M_DNDATA0
TDPTDN
ROUT_LVDS
SWI
RESET*
VSS33D_LVDS
VSS12D_PLL
VSS33P_LVDS
MLC_SCLMLC_SDA
EDID_SCLEDID_SDA
M_DPCLK
M_VREG_0P4V
M_DNCLK
CAP_12LDO_5CAP_12LDO_3CAP_12LDO_1CAP_12LDO_0
CAP_18LDO
BIST
S_DNDATA3S_DPDATA3
WC*
E2
E0
SDASCL
E1
VSS
VCC
EEPROM
THM_P
PP
PP
PP
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
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TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM
WHEN WC_L IS LOW, CAN WRITE TO EEPROMWHEN WC_L IS HIGH, CANNOT WRITE TO EEPROM
MLC EEPROM:RAW APN 335S0661
16 40
16 40
16 40
16 40
16
8.45K1/20W201MF
1%
15
15
16
16
15
15
201
1/20W5%
4.7K
MF201
1/20W5%
4.7K
MF
201MF
1%1/20W100K
X5R201
10%10V2.2NF FBGA1
S6T2MLC
OMIT
MLP
M24C64
80-OHM-0.2A-0.4-OHM
0201-1
80-OHM-0.2A-0.4-OHM
0201-1
0201-1
80-OHM-0.2A-0.4-OHM
X5R-CERM6.3V20%
402
4.7UF6.3V20%
4.7UF
402X5R-CERM
20%
402
6.3V4.7UF
X5R-CERM
0.1UF20%10VCERM402 402
CERM
0.1UF10V20% 20%
10V0.1UF
402CERM
402
20%6.3V
4.7UF
X5R-CERM
201MF
1/20W1%
100K1%
MF1/20W100K
201
10K
MF1/20W
1%
201
X5R-CERM
4.7UF6.3V20%
402
201
100K1/20W
1%
MF
NOSTUFF
201
100K1/20W
MF
1%
NOSTUFF
SMP4MM
4.7UF
X5R-CERM402
20%6.3V
NOSTUFF
P4MMSM
NOSTUFF
P4MMSM
402
0.1UF20%10VCERM
5%82PF
0201CERM25V
6
7 14 40
7 40
7 14 40
7 40
6.3VX5R-CERM
4.7UF
402
20%
7 40
7 40
7 40
7 40
7 40
7 14 40
16 40
16 40
16 40
16 40
CRITICALMLC EEPROM 100MHZ LVDS,2MHZ SWI1 100MHZ_PANELU2001341S2799
138S0652 138S0618 RADAR:8377307C2000,C2001,C2002,C2003,C2010,C2011,C2012,C3609,C3611,C3616
SYNC_DATE=N/ASYNC_MASTER=MIKE
VIDEO: MLC
MLC_MUX_SDA_3V3MLC_MUX_SCL_3V3
TP_PM_LCD_BKLT_PWM
NC_MLC_MONITOR3
MLC_MONITOR0_PD
=PP3V3_MLC
NC_MLC_MONITOR2
MIPID_AP_CLK_P
NC_MIPI_MLC_MASTER_CLK_P
NC_MLC_MONITOR6NC_MLC_MONITOR5NC_MLC_MONITOR4
NC_LVDS_DATA_P
MIPID_AP_DATA_P
NC_MIPI_MLC_MASTER_CLK_N
MIN_NECK_WIDTH=0.1 MMMIN_LINE_WIDTH=0.2 MMVOLTAGE=0.4V
NET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MM
MLC_VREG_0V4
PP3V3_MLC_18LDO_12LDO
NET_SPACING_TYPE=PWR
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
MAX_NECK_LENGTH=3 MM
MIN_LINE_WIDTH=0.4 MM
NC_MIPI_MLC_MASTER_DATA_PNC_MIPI_MLC_MASTER_DATA_N
MLC_CAP_1V2_LDO_5VOLTAGE=1.2V
NET_SPACING_TYPE=PWR
MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMMAX_NECK_LENGTH=3 MM
NC_MLC_MONITOR1
MIPID_AP_DATA_P
RST_MLC_L
LVDS_DATA_NLVDS_DATA_P
LVDS_CLK_N
MIPID_AP_DATA_NMIPID_AP_DATA_P
MIPID_AP_DATA_N
MIPID_AP_DATA_P
MLC_SDA_3V3MLC_SCL_3V3
LVDS_DDC_DATALVDS_DDC_CLK
PM_MLC_PPC_OUT
LVDS_DATA_P
LVDS_DATA_NLVDS_DATA_P
=PP3V3_MLC
MLC_2WC_L
MLC_BISTMLC_TEST
=PP3V3_MLC
SWI_MLC
MIPID_AP_DATA_N
MLC_CAP_1V8LDO
MIN_LINE_WIDTH=0.4 MMVOLTAGE=1.2V
MIN_NECK_WIDTH=0.2 MMMAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
MLC_CAP_1V2LDO_1_3
NET_SPACING_TYPE=PWR
VOLTAGE=1.2V
MAX_NECK_LENGTH=3 MM
MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM
MIPID_AP_DATA_N
MIPID_AP_DATA_NMIPID_AP_DATA_P
MIPID_AP_CLK_NMIPID_AP_CLK_P
LVDS_CLK_P
PP3V3_MLC_LVDS
MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
NET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWRMAX_NECK_LENGTH=3 MMMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMVOLTAGE=3.3V
PP3V3_MLC_DIG_12LDO
MLC_CAP_1V2LDO_0
MIN_LINE_WIDTH=0.4 MMVOLTAGE=1.2V
MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
MIN_NECK_WIDTH=0.2 MM
TP_MLC_VSYNC
ROUT_LVDS
NC_LVDS_DATA_N
LVDS_DATA_N
C2000 1
2
C2003 1
2
C2001 1
2
C2002 1
2
R20011
2
C20041
2
U2000
B7
E3H7
A7
A4
C3
A8B6
C2
B2
C1
B1
B3
A6A5
H5G3G4G5
F4E4D3
G6D4
B5
C5
F2
D2
E2
G2
H2
F1
D1
E1
G1
H1
H6
G7G8
F7
F8
C7
C8
E7
E8
D7
D8
B8
F3
H8
B4
A2
C6
H4
E5
D5
A3
H3C4
A1
D6
F6
E6
F5
U2001
1
2
3
6 5
9
8
4
7
FL2000
1 2
FL2001
1 2
FL2002
1 2
C2010 1
2
C2011 1
2
C2012 1
2
C20131
2
C20141
2
C20151
2
R20021
2
R20031
2
R20061
2
R20081
2
R20101
2
PP20001
PP20091
PP20111
C20171
2
C20161
2
R20501
2
R20511
2
R20521
2
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14 16 32
14 16 32
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SYNC_MASTER=MIKE
VIDEO: MLC ALIASESSYNC_DATE=N/A
MLC_MUX_SCL_3V3MLC_MUX_SDA_3V3MLC_SDA_3V3
MLC_SCL_3V3
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14 14
14
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DSG
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
SYM_VER-2
SYM_VER-2
SYM_VER-2
SYM_VER-2
OUT
TABLE_ALT_ITEM
TABLE_ALT_ITEM
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TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
3 A
RDS(ON)
CABLINE-CA CONNECTOR: 518S0787NOTE: CONNECTOR ON PANEL IS FLIPPED
(LVDS DDC POWER)
THE CHOKE
LVDS CONNECTOR
NC
SIA413DJSIA413DJ
IMAX
CHANNEL
VGS MAX
100MOHM @-1.5V
+/- 8V
P-TYPE
MOSFET
NOSTUFF RESISTORS ARE THERE TOINVESTIGATE POSSIBILITY OF REMOVING
5%
MF
10K1/20W201
10K5%1/20W201MF
FERR-120-OHM-1.5A
0402
1000PF
201
16VX7R
10%
603X5R6.3V20%10UF0.1UF
X5R201
10%6.3V
MF
1%1/20W100K
201
2N7002TXGSOT-523-3
CRITICAL
SIA413DJSC70-6L
10%
X5R6.3V
0201
0.015UF
1/20W39K1%
MF201
NOSTUFF
1%10K1/20W201MF
NOSTUFF
201
1%
MF1/20W10K
MF1/20W1%
201
21.5K
10%50V
402
820PF
CERM
5%
402CERM50V
100PF
25VCERM0201
82PF5%5%
82PF
0201CERM25V
5%82PF
0201CERM25V
25VCERM0201
82PF5%
82PF
0201
25V5%
CERM
0402
FERR-240-OHM-25%-300MA
14
14
14
14 40
14 40
14 40
14 40
14 40
14 40
14 40
14 40
35
35
35
35
35
35
90-OHM-50MATCM0605
TCM060590-OHM-50MA
TCM060590-OHM-50MA
TCM060590-OHM-50MA
MF1/20W5%
0
201
CABLINE-CAF-RT-SM
CRITICAL
35
10%
201
1000PF
X7R16V
Q2200376S0796 RADAR:8403895376S0961
VIDEO: LVDS CONNECTORSYNC_DATE=N/ASYNC_MASTER=ALEX
376S0903 376S0796 Q2200 RADAR:8403865
RADAR:8376383155S0583 155S0460L2202,L2212,L2222,L2232,L5500,L5501,L5600,L5601,L5702,L5716
LVDS_CLK_N
LED_IO_3LED_IO_4
LCDVDD_PWREN_L
PM_MLC_PPC_OUT
=PP3V3_LCD
=PP3V3_MLC
PP3V3_S0_LCD_FERR
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 MM
LVDS_DATA_N
LVDS_DATA_N
LVDS_DATA_P
LVDS_CLK_P
R2250_1LCDVDD_PWREN_L_R
LVDS_DATA_P
LVDS_DATA_CONN_P
LED_IO_5
LVDS_DATA_P
LVDS_DATA_N LED_IO_1LED_IO_2
LVDS_CLK_CONN_N
VOLTAGE=3.3VMIN_LINE_WIDTH=0.30 MM
PP3V3_LCDVDD_SW_FMIN_NECK_WIDTH=0.20 MM
BOARD_TEMP4
LVDS_DATA_CONN_NLVDS_DDC_DATA
LVDS_DDC_CLK
LVDS_DATA_CONN_N
=PPLED_REG
BOARD_TEMP4_N
LVDS_DATA_CONN_P
=PP3V3_MLC
NC_LCD_PGAMMA
PPLED_BACK_REG
VOLTAGE=20.4VMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.2 MM
MAX_NECK_LENGTH=3 MMNET_SPACING_TYPE=PWR
LED_IO_6
LVDS_CLK_CONN_P
LVDS_DATA_CONN_PLVDS_DATA_CONN_N
C22061 2
R22001
2
R22011
2
L2201
1 2
C22001 2
C22021
2
C22031
2
R22051
2
Q22013
1
2
Q2200
1
3
47
C22041 2
R22031
2
R22101
2
R22111
2
R22041 2
C22201
2
C22331
2
C22411
2
C22401
2
C22301
2
C22321
2
C22311 2
L2200
1 2
L2202
1
2 3
4
L2232
1
2 3
4
L2222
1
2 3
4
L2212
1
2 3
4
R22501 2
J2201
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
5
6
7
8
9
22 OF 106
A.0.0
051-8962
16 OF 42
32
14 16 32
40
40
40
40
32
35
40
14 16 32
40
40
40
http
://m
ycom
p.su
/x/
CTRL
PGND
THRML
L
VIN
DO
FB
SW
PAD GND
VCCA
1B1
1B22A2
1A12A1
1A2
2DIR2OE*
1DIR1OE*
2B2
2B1
GND
VCCB
VSTM26VSTM25VSTM24VSTM23
MUX19
MUX17
BON_L0BON_L1BON_L2BON_L3BON_L4BON_L5
MUX0MUX1MUX2MUX3MUX4MUX5MUX6MUX7MUX8MUX9MUX10MUX11MUX12MUX13
MUX16MUX15
MUX18
MUX20MUX21MUX22MUX23
NC
VSTM1VSTM0
VSTM6VSTM5VSTM4VSTM3VSTM2
VSTM8
VSTM11VSTM10
VSTM7
VSTM16VSTM15VSTM14VSTM13VSTM12
VSTM21VSTM20VSTM19VSTM18VSTM17
VSTM22
VSTM27
VSTM31VSTM30VSTM29VSTM28
VSTM32
VSTM36VSTM35VSTM34VSTM33
VSTM37
VSTM42VSTM41VSTM40VSTM39VSTM38
VSTM47VSTM45
VSTM44VSTM43
A_AD_R2A_AD_R1A_AD_R0
MUX14
VSTM46
GND
VSTM9
VDDHVCC_DIG
VCC
OE
A
NC
Y
GND
NCOE*
IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUTIN
IN
IN
IN
OUT
OUT IN
OUT
OUT
OUT
OUT
OUT
TABLE_5_ITEM
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
MIN_NECK_MIDTH SHOULD BE 0.4MM
MATES WITH LEFTMOST GRAPE FLEX TAIL
BOOST CONVERTOR
NC
NC
MATES WITH RIGHTMOST GRAPE FLEX TAIL
NC
P/N 518S0817
NC
NC
NC
NC
NC(A -> B)
TO Z1/Z2
NCNC
NC
NCNCNCNC
NC
NC
NC
NC
NCNC
NCNC
NCNC
NCNCNC
NCNCNC
NCNC
NCNC
TO Z2
APN:311S0485
NC
LOAD CURRENT ~ 153UA
CONNECTORS TO GRAPE FLEX
603-1
25VX5R
10%1UF
4.7UH-700MA-280MOHM
VLF
TPS61045
CRITICAL
QFN-1
SM
0.1UF6.3V
201X5R
10%X5R201
6.3V10%0.1UF
201
5%1/20WMF
10K10K
201MF
5%1/20W
MF1/20W201
5%3.3K
5%10K
201
1/20WMF
6.3VX5R
10%
201
0.1UF
10%
201X5R6.3V0.1UF
5%1/20WMF
10K
201
PQFP1
SN74AVCH4T245RSV
CRITICAL
402X5R25V10%
0.1UF
402X5R25V10%
0.1UF
402X5R25V10%
0.1UF
6.3VX5R
0.1UF10%
201
BGAGROUNDHOG
CRITICALOMIT
LLP
CRITICAL
SN74LVC1G126DRYR-M
LLP
CRITICAL
SN74LVC1G125DRYR-M
5 17 40
5 17 40
5 17 40
6
5 17 40
5 17 40
5 17 40
6
18
17 18
18
17 18
5 17 40 18
17 18
17 18
17 18
18
5 17 40 18
18
18
18
18
18
10%16V470PF
201X5R-X7R
F-RT-SM
502250-8237
F-RT-SM
502250-8237
402
1%1M
1/16WMF-LF
1%1/20W201
71.5K
MF2.2UF
X5R6.3V10%
603
NP0-C0G5%
201
25V
33PF
B0520WSXG
SOD-323
0.1UF10%
X5R402
16V
1%
201MF
0.1
1/20W
U3009311S0524 311S0533
U3010311S0525 311S0532
311S0523 311S0485 U3007
SYNC_MASTER=RAMSIN SYNC_DATE=N/A
GRAPE: GROUNDHOG,CONN,BOOST
1 IC,ASIC,GROUNDHOG B0,120B BGA U3003 CRITICAL343S0525
MIN_LINE_WIDTH=0.2MM
VR_BOOST_SW
VR_BOOST_FBK
SPI_GRAPE_SCLK
MUX_IN
MT_PANEL_OUT
=PP3V0_GRAPE
MUX_IN
MUX_INMUX_IN
MUX_IN
MUX_IN
=PP3V0_GRAPE
MUX_INMUX_INMUX_IN
MUX_INMUX_IN
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
SPI_GRAPE_MOSI
Z1_CS_OE
SPI_GRAPE_MISO
MIN_NECK_WIDTH=0.25MM
PP18V_R_GRAPEVOLTAGE=18V
MIN_LINE_WIDTH=0.6MMNET_SPACING_TYPE=PWR
PP18V_GRAPEMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMVOLTAGE=18VNET_SPACING_TYPE=PWR
GRAPE_FW_DNLD_EN_L
AGND_U3000MIN_LINE_WIDTH=0.2MM
PP18V_GRAPE=PP3V0_GRAPE_MARIO1
Z1_SCLKZ2_H_CS_L
Z1_MOSI
Z1_MISO
Z2_H_CS_L
Z1_CS_OE
PM_BOOST_EN
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMUX_IN
MUX_INMUX_IN
MUX_INMUX_IN
Z1_BON_L
Z1_BON_L
Z1_B_ADR
Z1_CS_OE
Z1_CS_L
MT_PANEL_OUT
SPI_GRAPE_CS_L
DIR_U3007
Z1_B_ADR
MT_PANEL_OUT
GRAPE_MOSI
GRAPE_SCLKMAKE_BASE=TRUESPI_GRAPE_SCLKMAKE_BASE=TRUESPI_GRAPE_CS_L GRAPE_CS_L
=PP3V0_GRAPE
RST_GRAPE_Z1_L
MAKE_BASE=TRUE
RST_GRAPE_L
RST_GRAPE_Z2_L
MAKE_BASE=TRUESPI_GRAPE_MOSI
MAKE_BASE=TRUE
SPI_GRAPE_MISO GRAPE_MISO
MT_PANEL_OUT
MIN_LINE_WIDTH=0.2MM
VR_BOOST_L
Z1_BON_LZ1_BON_L
Z1_BON_L
=PP3V0_GRAPE
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_INMT_PANEL_INMT_PANEL_INMT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_INMT_PANEL_IN
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUTMT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
=PP3V0_GRAPE
Z1_B_ADR
MT_PANEL_OUT
MT_PANEL_OUT
MT_PANEL_INMT_PANEL_IN
MT_PANEL_OUT
MT_PANEL_INMT_PANEL_IN
MT_PANEL_OUT
MT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
Z1_BON_L
MUX_IN
MUX_IN
MUX_IN
MUX_INMT_PANEL_OUTMT_PANEL_OUTMT_PANEL_OUTMT_PANEL_OUT
MT_PANEL_OUT
C30001
2
R3009 1
2
R30121
2
C3008 1
2
D30001 2
C30091 2
L3000
1 2
U3000
53
4
6
1
7
8
9
2
XW3000
1
2
C30011
2
R30661 2
C30311
2
C30301
2
R30311
2
R30301
2
R30321
2
R30251
2
C30411
2C30501
2
R30331
2
U30076
7
15
14
41
8
9
13
12
516
10
11
3 2
C3005 1
2
C3007 1
2
C3053 1
2
C30061
2
U3003
A10B9A9
C7A7B7B8A8C8
C9D7
G7G8
E3E5E6E7F6F7G5G6
B1C1
I5J8J9K8J10I10H10F11C11E10
E1
A11B4A5A2
F2H1J1J2J3K4H5
C6D3
F5F8F9G3G4G9H3H4H7H8
D4
H9J6K7
D5D6D8D9E4E8F4
A6
B6E9F3
A1B2
H2I2K1K2I3K3J4I4K6H6
C2
K5J5I7K9I8K10I6J7
K11I9
D1
J11I11H11G11G10F10
C10D10E11D11
D2
B11B10C4A4
B5
C5A3
B3
E2F1G1G2I1
U3010
2
3
1
6
4
U30092
3
1
6
4
C30021
2
J3010
1
1011
1213
1415
1617
1819
2
2021
2223
2425
2627
2829
3
3031
3233
3435
3637
38
39
4
40
41
56
78
9
J3011
1
1011
1213
1415
1617
1819
2
2021
2223
2425
2627
2829
3
3031
3233
3435
3637
38
39
4
40
41
56
78
9
30 OF 106
A.0.0
051-8962
17 OF 42
5
5
18
17
17 18 32
18
18
18
18
18
17 18 32
18
18
18
18
18
17
17
17
17
17 32
18
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17 18
18
18
18
18
18
18
18
17
18
17
17 18 32
17
18
18
18
17 18 32
18
18
18
18
18
18
18
18 18
18 18
18 18
18 18
18 18
18 18
18 18
18 18
18 18
18
17 17
17 17
17 17
17 17
17
17 17
17 17
17 17
17 17
17 17
17 17
17 17
17 17
17 17
17
17 17
17 17
17 17
17
17
17
17 18 32
18
17
17
18
18
17
18
18
17
17
17
17
18
18
18
18
18
17
17
17
17
17
http
://m
ycom
p.su
/x/
OUT
OUT
IN
IN
IN
OUT
IN
IN
IN
IN
IN
OUT
IN
IN
OUT
IN
IN
RESET*
DONEGO
MOSI
IN9
VDDDIG
PCLK
STMINSTMOUT
BON_L1BON_L0
TM
IN0IN1
IN30IN31
IN29
IN22IN23IN24IN25IN26IN27IN28
IN21IN20
IN11IN12IN13IN14IN15IN16IN17IN18
IN10
IN8
IN6IN5IN4
IN7
IN3IN2
IN53IN52IN51IN50IN49IN48IN47IN46IN45IN44IN43IN42IN41IN40IN39
IN32IN33IN34IN35IN36IN37IN38
IN60IN61IN62IN63
IN59IN58IN57IN56IN55IN54
GNDANA
B_ADR2
BON_L2BON_L3BON_L4BON_L5
B_ADR0B_ADR1
MISO
CS*SCLK
IN19
VDDANA
VDDIO
V18
GNDIOGNDDIG
VDDANA VDDCORE
TM0TM1
RESET*
LFOO
A_CS*
A_SDI
IN7_0
H_SCLK
VDDLDO
JTAG_TDIJTAG_TCK
IN9_1IN9_0
IN8_1IN8_0
IN7_1
IN6_1IN6_0
IN5_1
IN4_1IN4_0
IN3_1IN3_0
IN2_1IN2_0
IN11_1IN11_0
IN10_1IN10_0
IN1_1IN1_0
IN0_1IN0_0
H_SDOH_SDI
H_CS*
GPIO7GPIO6
FLOO
BOOT_CFG1BOOT_CFG0
BON_L5BON_L4BON_L3BON_L2BON_L1BON_L0
B_ADR1
ARMTAPMD*A_SDO
A_SCLK
GPIO1GPIO0
GPIO2GPIO3
VDDIO
GPIO5
CLKINCLKOUT
EXTFLLIN
JTAG_TDOJTAG_TMS
GPIO4
IN5_0
B_ADR2
B_ADR0
GND
TABLE_ALT_ITEM
TABLE_ALT_ITEM
II NOT TO REPRODUCE OR COPY ITIII NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCETHE POSESSOR AGREES TO THE FOLLOWING:
THE INFORMATION CONTAINED HEREIN IS THE
36
BRANCH
REVISION
DRAWING NUMBER SIZE
DR
IV ALL RIGHTS RESERVED
SHEET
PAGE TITLE
C
A
D
2 1
PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.
Apple Inc.
PAGE
NOTICE OF PROPRIETARY PROPERTY:
A
B
C
345678
D
B
8 7 5 4 2 1
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
NC
PULL UP = RESERVED FOR FUTURE
NOTE: PLATEFORM DETECTION PIN "H5"
ARE EACH GENERATED WITHIN
FLOATING = K93/K94
NCNC
MIN_NECK_MIDTH SHOULD BE 0.4MM
PULL DOWN = K48
NCNC
NCNC
NC
NC
NCNC
NC
NCNC
INTERNAL PU
ZEPHYR 1+ ASIC
NC
NC
NC
NC
NC
NC
1
1
0
1
0
1
AUTONOMOUS
DEPENDENT 2
SLAVE
DEPENDENT 100
CFG1 CFG0 MODE
NC
NC
NC
NC
NC
NCNC
NC
NC
NC
NCNC
NC
NC
NC
NC
NC
NC
NCNC
NC
NCNC
ARM9 MCU (Z2 BASED