DDE 3223 FET Amplifiers: JFET AC Analysis

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Transcript of DDE 3223 FET Amplifiers: JFET AC Analysis

FET AMPLIFIERSJunction Field Effect Transistor

AC Analysis

Field Effect Transistor

FET device controls output current by means of small input voltage

Where BJT has β, FET has transconductance factor, gm

Unit for gm: Siemen or Ω-1

Definition of gm using transfer characteristic.

Output drain current overInput gate voltage

Slope at point of operation

Calculating gm at various bias points.

Slope of the characteristic at the point of operation

gm can be written as yfs on specification sheets.

When VGS = 0 V, gm is can be denoted as gm0 (maximum gm )

The initial equation then becomes

P

GS

P

DSSm V

V

V

Ig 1

||

2

||

20

P

DSSm V

Ig

P

GSmm V

Vgg 10

Mathematical Definition of gm

For a JFET with IDSS = 8 mA and VP = - 4V, determine

(a) Maximum gm

(b) Value of gm when VGS = -1.5V

Solutions

(a) Maximum gm when VGS = 0V

(b) When VGS = -1.5V

Exercise on gm

Plotting gm versus VGS

When VGS = 0V, gm is maximum

When VGS = VP, gm is zero

Plot gm versus ID with IDSS = 8mA and VP = -4V

P

GS

P

DSSm V

V

V

Ig 1

||

2

||

20

P

DSSm V

Ig

Example

Effects of ID on gm

Relationship between ID dan gm can be obtained from Shockley Equation:

gm can also be written as

DSS

D

P

GS

I

I

V

V1

GSm m0

P

Dm m0

DSS

Vg g 1

V

Ig g

I

gm ID

gm0 IDSS

0.707 gm0 IDSS/2

0.5 gm0 IDSS/4

0 0 mA

Plotting gm versus ID

Dm m0

DSS

Ig g

I

||

20

P

DSSm V

Ig

where

ExamplePlot gm versus ID with

IDSS = 8mA and VGS = -4V

||

20

P

DSSm V

Ig

Dm m0

DSS

Ig g

I

gm ID

gm0 IDSS

0.707 gm0 IDSS/2

0.5 gm0 IDSS/4

0 0 mA

FET Impedance

FET input impedance, Zi is sufficiently large. Usually in the range of 109 (1000M)

FET output impedance, Zo is similar in magnitude to conventional BJTs.

Output impedance appears as yos with units of s

iZ FET

Definition of rd using FET drain characteristics.

FET AC equivalent circuit.

JFET fixed-bias configuration.

Substituting the JFET AC equivalent circuit unit

i GZ FET R

Determining Zo.

o d D

d D

Z FET = r || R

if r 10R

iSet V 0

Determining Zo.

o D

d D

Z FET = R

if r 10R

iSet V 0

Determining Av

v o i m d D

v o i m D d D

A = V V = -g r || R

A = V V = -g R when r 10R

Determining Av

o m gs d D

gs i

o m i d D

V = -g V r || R

V = V

V = -g V r || R

Example

m d

i

o

V

V d

1. g and r

2. Z

3. Z

4. A

Determine the

following for the n

5. A ignoring effect

etwor

of r

k

IDSS=10mAVP=-8V

yOS=40S

IDQ=5.625mAVGSQ=-2V

Solutions

DSSm0

P

2 10mA2Ig = = =

V 8V2.5mS

d

os

1 1r = = =

y 4025 k

S

i GZ = R = 1MΩ

o d DZ = r || R = 2k | 1.25k = 85k|

IDQ=5.625mAVGSQ=-2VIDSS=10mAVP=-8V

yOS=40S

Solutions..

o d DZ = r || R = 2k | 1.25k = 85k|

d vWithout r , A = -3.76

d vWith r , A = -3.48

oV m D d

i

VA = = -g R || r

V

oV m D

i

VA = = -g R

V

Self-Bias JFET configuration.

JFET AC equivalent circuit.

Redrawn Network

Zi = ?Zo = ?AV = ?

JFET voltage-divider configuration

Network under AC conditions

Redrawn network

Important Parameters

DmV

d

dDsgmo

gsi

V

Ddo

i

RgAThus

elrIf

rRVgV

and

VV

A

RrZ

RRZ

,arg

)||(

:

||

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