Operating Systems: A Modern Perspective, Chapter 4
Slide 4-1
Copyright © 2004 Pearson Education, Inc.
4ComputerOrganization
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-2
Copyright © 2004 Pearson Education, Inc.
CSCI 3753 Announcements
• Moodle - posted last Tuesday’s lecture
• Programming shell assignment 0 due Thursday at 11:55 pm, not 11 am
• Homework #1 due next Thursday at 11 am
• Read Chapters 3 and 4 in the textbook, skip 4.7 and 4.8
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-3
Copyright © 2004 Pearson Education, Inc.
Stored Program Computers and
Electronic Devices
Pattern
Fixed Electronic Device
Variable Program
Stored Program Device
Jacquard Loom
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-4
Copyright © 2004 Pearson Education, Inc.
Program Specification
int a, b, c, d;. . .a = b + c;d = a - 100;
Source
; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a
; Code for d = a - 100 load R4,=100 subtract R3,R4 store R3,d
Assembly Language
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-5
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Machine Language
; Code for a = b + c load R3,b load R4,c add R3,R4 store R3,a
; Code for d = a - 100 load R4,=100 subtract R3,R4 store R3,d
Assembly Language
10111001001100…110111001010000…010100111001100…010111010001100…110111001010000…010100110001100…010111001101100…1
Machine Language
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-6
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The von Neumann Architecture
Control Unit(CU)
Central Processing Unit (CPU)
DeviceDevice
Address BusData Bus
Arithmetical Logical Unit(ALU)
Primary Memory Unit(Executable
Memory)
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-7
Copyright © 2004 Pearson Education, Inc.
The ALU
R1R2
Rn
. . .
Status RegistersFunctional Unit
Left Operand
Right Operand
Result
To/from Primary Memory
load R3,bload R4,cadd R3,R4store R3,a
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-8
Copyright © 2004 Pearson Education, Inc.
Control Unit
3046305030543058
Primary Memory
Fetch UnitFetch Unit
Decode UnitDecode Unit
Execute UnitExecute Unit
PC
IR
Control Unit
load R3,bload R4,cadd R3,R4store R3,a
10111001001100…110111001010000…010100111001100…010111010001100…1load R4, c
3050
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-9
Copyright © 2004 Pearson Education, Inc.
Control Unit Operation
PC = <machine start address>;IR = memory[PC];haltFlag = CLEAR;while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; // fetch phase};
• Fetch phase: Instruction retrieved from memory
• Execute phase: ALU op, memory data reference, I/O, etc.
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-10
Copyright © 2004 Pearson Education, Inc.
Primary Memory Unit
MAR
MDR
Command
012
n-1
1234 98765Read Op:
1234
1. Load MAR with address
read
2. Load Command with “read”
98765
3. Data will then appear in the MDR
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-11
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Processor Modes
• Mode bit: Supervisor or User mode
• Supervisor mode– Can execute all machine instructions– Can reference all memory locations
• User mode– Can only execute a subset of instructions– Can only reference a subset of memory
locations
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-12
Copyright © 2004 Pearson Education, Inc.
Kernels
• The part of the OS critical to correct operation (trusted software)
• Executes in supervisor mode
• The trap instruction is used to switch from user to supervisor mode, entering the OS
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-13
Copyright © 2004 Pearson Education, Inc.
Supervisor and User Memory
UserSpace
UserSpace
SupervisorSpace
SupervisorSpace
UserProcess
UserProcess
SupervisorProcess
SupervisorProcess
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-14
Copyright © 2004 Pearson Education, Inc.
Procedure Call and Message Passing Operating Systems
call(…);
trap
return;
send(…, A, …);receive(…, B, …);
receive(…A, …); …send(…, B, …);
send/receive
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-15
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System Call Using the trap Instruction
…fork();…
fork() {…trap N_SYS_FORK()…}
sys_fork()
sys_fork() {/* system function */ … return;}
KernelTrap Table
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-16
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A Thread Performing a System Call
User Space Kernel Space
fork();
sys_fork() {
}
Thread
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-17
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Examples of Exceptions in Pentium Systems
Class Cause Async/
Sync
Return behavior
Trap Intentional exception
Sync always returns to next
instruction
Fault Potentially recoverable
error
Sync might return to current
instruction
Abort nonrecover-
able error
Sync never returns
Interrupt signal from I/O device
Async always returns to next
instruction
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-18
Copyright © 2004 Pearson Education, Inc.
Examples of Exceptions
• Kinds of Exceptions– traps, e.g. system calls– interrupts– faults– aborts
• Pentium: Table of 256 different exception types– some assigned by CPU designers (divide by zero,
memory access violations, page faults)– some assigned by OS, e.g. system calls
• Pentium CPU contains exception table base register that points to this table
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-19
Copyright © 2004 Pearson Education, Inc.
Examples of Exceptions in Pentium Systems
Exception Number
Description Exception Class
0 Divide error fault
13 General protection fault
fault
14 Page fault fault
18 machine check abort
32-127 OS-defined Interrupt or trap
128 System call Trap
129-255 OS-defined Interrupt or trap
Exception Table
OSassigns
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-20
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The Device-Controller-Software Relationship
Application Program
Device ControllerDevice Controller
DeviceDevice
Sof
twar
e in
the
CP
U
Abstract I/O Machine
•Device manager•Program to manage device controller•Supervisor mode software
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-21
Copyright © 2004 Pearson Education, Inc.
Device Controller Interface
CommandCommand StatusStatusData 0Data 0
Data 1Data 1
Data n-1Data n-1LogicLogic
busy done Error code . . .. . .busy done 0 0 idle 0 1 finished 1 0 working 1 1 (undefined)
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-22
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Performing a Write Operation
while(deviceNo.busy || deviceNo.done) <waiting>;deviceNo.data[0] = <value to write>deviceNo.command = WRITE;while(deviceNo.busy) <waiting>;deviceNo.done = TRUE;
• Devices much slower than CPU
• CPU waits while device operates
• Would like to multiplex CPU to a different process while I/O is in process
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-23
Copyright © 2004 Pearson Education, Inc.
CPU-I/O Overlap
CPUCPU
DeviceDevice
…
Rea
dy P
roce
sses
CPUCPU
DeviceDevice
…
Rea
dy P
roce
sses
I/O Operation
CPUCPU
DeviceDevice
…
Rea
dy P
roce
sses
Uses CPU
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-24
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Polling I/O - Busy Waiting…// Start the device…While((busy == 1) || (done == 1)) wait();// Device I/O complete…done = 0;
…while((busy == 0) && (done == 1)) wait();// Do the I/O operationbusy = 1;…
busy done
Sof
twar
eH
ard
war
e
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-25
Copyright © 2004 Pearson Education, Inc.
Determining When I/O is Complete
CPUCPU
DeviceDevice DeviceDevice DeviceDevice
Interrupt Pending
• CPU incorporates an “interrupt pending” flag• When device.busy FALSE, interrupt pending flag is set• Hardware “tells” OS that the interrupt occurred• Interrupt handler part of the OS makes process ready to run
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-26
Copyright © 2004 Pearson Education, Inc.
Control Unit with Interrupt (Hardware)
PC = <machine start address>;IR = memory[PC];haltFlag = CLEAR;while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest) { memory[0] = PC; PC = memory[1]};
memory[1] contains the address of the interrupt handler
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-27
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Interrupt Handler (Software)
interruptHandler() { saveProcessorState(); for(i=0; i<NumberOfDevices; i++) if(device[i].done) goto deviceHandler(i); /* something wrong if we get to here … */
deviceHandler(int i) { finishOperation(); returnToScheduler();}
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-28
Copyright © 2004 Pearson Education, Inc.
A Race Condition
saveProcessorState() { for(i=0; i<NumberOfRegisters; i++) memory[K+i] = R[i]; for(i=0; i<NumberOfStatusRegisters; i++) memory[K+NumberOfRegisters+i] = StatusRegister[i];}
PC = <machine start address>;IR = memory[PC];haltFlag = CLEAR;while(haltFlag not SET) { execute(IR); PC = PC + sizeof(INSTRUCT); IR = memory[PC]; if(InterruptRequest && InterruptEnabled) { disableInterupts(); memory[0] = PC; PC = memory[1]};
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-29
Copyright © 2004 Pearson Education, Inc.
Revisiting the trap Instruction (Hardware)
executeTrap(argument) { setMode(supervisor); switch(argument) { case 1: PC = memory[1001]; // Trap handler 1 case 2: PC = memory[1002]; // Trap handler 2 . . . case n: PC = memory[1000+n];// Trap handler n};
• The trap instruction dispatches a trap handler routine atomically
• Trap handler performs desired processing
• “A trap is a software interrupt”
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-30
Copyright © 2004 Pearson Education, Inc.
The Trap Instruction Operation
SMode
TrustedCode
trap
User Supervisor
Branch Table
2
3
1
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-31
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Direct Memory Access
PrimaryMemory
CPU
Controller
Device
PrimaryMemory
CPU
Controller
Device
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-32
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Memory-Mapped I/O: Addressing Devices
PrimaryMemory
Device 0
Device 1
Device n-1
PrimaryMemory
Device 0
Device 1
Device n-1
Dev
ice
Add
ress
esM
emor
y A
ddre
sses
Mem
ory-
Map
ped
Add
ress
es
No need forspecialinstructions toaccess a device
MMU takescare of themapping
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-33
Copyright © 2004 Pearson Education, Inc.
Intel System Initialization
ROM
CMOS
RAM
Boot DevicePOSTPOST
BIOSBIOS
Boot ProgBoot Prog
LoaderLoader
OSOS
…Hardware Process
Data Flow
Power Up
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-34
Copyright © 2004 Pearson Education, Inc.
Bootstrapping
Bootstrap loader (“boot sector”)
Primary Memory
1
0x0001000
Fetch UnitFetch Unit
Decode UnitDecode Unit
Execute UnitExecute Unit
00001000000100
……
PC
IR
BIOS loader 0x0000100
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-35
Copyright © 2004 Pearson Education, Inc.
BootstrappingBootstrap loader (“boot sector”)
Primary Memory
Loader
1
2
Fetch UnitFetch Unit
Decode UnitDecode Unit
Execute UnitExecute Unit
00010000001000
……
PC
IR
BIOS loader 0x00001000x0001000
0x0008000
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-36
Copyright © 2004 Pearson Education, Inc.
BootstrappingBootstrap loader (“boot sector”)
Primary Memory
Loader
OS
12
3Fetch UnitFetch Unit
Decode UnitDecode Unit
Execute UnitExecute Unit
00080000008000
……
PC
IR
BIOS loader 0x00001000x0001000
0x0008000
0x000A000
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-37
Copyright © 2004 Pearson Education, Inc.
Bootstrapping
Bootstrap loader (“boot sector”)
Primary Memory
Loader
OS
12
3
4. Initialize hardware5. Create user environment6. …
Fetch UnitFetch Unit
Decode UnitDecode Unit
Execute UnitExecute Unit
000A000000A000
……
PC
IR
BIOS loader 0x00001000x0001000
0x0008000
0x000A000
Operating Systems: A Modern Perspective, Chapter 4
Slide 4-38
Copyright © 2004 Pearson Education, Inc.
A Bootstrap Loader Program
FIXED_LOC: // Bootstrap loader entry pointload R1, =0load R2, =LENGTH_OF_TARGET
// The next instruction is really more like // a procedure call than a machine instruction// It copies a block from FIXED_DISK_ADDRESS// to BUFFER_ADDRESS
read BOOT_DISK, BUFFER_ADDRESSloop: load R3, [BUFFER_ADDRESS, R1]
store R3, [FIXED_DEST, R1]incr R1bleq R1, R2, loopbr FIXED_DEST
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