External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP External Use SILICON SYSTEMS GROUP
Black Diamond® 3 PECVD System
Silicon Systems Group
July 12th, 2011
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP SILICON SYSTEMS GROUP
These presentations contain forward-looking statements, including those regarding
market outlooks; technology roadmaps; the proposed Varian merger; and Applied’s
market positions, products, growth opportunities, strategies and business outlooks.
These statements are subject to known and unknown risks and uncertainties that could
cause actual results to differ materially from those expressed or implied by such
statements, including but not limited to: the level of demand for Applied’s products, which
is subject to many factors, such as uncertain global economic and industry conditions,
demand for electronic products and semiconductors, government renewable energy
policies and incentives, and customers’ new technology and capacity requirements; the
satisfaction of conditions precedent to the proposed merger with Varian, including the
ability to secure regulatory approvals in a timely manner or at all; Applied’s ability to (i)
develop, deliver and support a broad range of products and expand its markets, (ii) align
its cost structure with business conditions, (iii) successfully execute its acquisition
strategy and realize synergies, (iv) obtain and protect intellectual property rights, and (v)
attract, motivate and retain key employees; and other risks described in Applied’s SEC
filings. All forward-looking statements are based on management’s estimates, projections
and assumptions as of July 12, 2011, and Applied undertakes no obligation to update any
forward-looking statements.
Safe Harbor
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
Reflexion GT™ for Tungsten
New Products Released At 2011 Semicon West
3
Vantage® Vulcan™ RTP
Centura® DPN HD
Endura® Versa™ XLR W PVD
Endura® HAR Cobalt PVD
Centura® Integrated Gate Stack
Producer® Black Diamond™ 3
Producer® Nanocure™ 3
TRANSISTOR-ENABLING PRODUCTS
INTERCONNECT-ENABLING PRODUCTS
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP 4
Mechanical
>150
DOWNSTREAM
PROCESS STEPS
Electrical
REQUIREMENTS
OF LOW-K FILM
Lower capacitance
Lower power consumption
Higher mechanical strength
Packaging yield
Uniform curing
Less device variability
Low-k Leadership for the Next Decade Producer Black Diamond 3 and Producer Nanocure 3
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP 5
Served Available Market Opportunity ~$500M
Source: Gartner 2011 market size data for IMD films + cure
Advanced Interconnect is a Growing Inflection
0
10
20
30
40
50
60
130 90 45 22/14
Upcoming Inflections
UV Cure
Low-k deposition
Barrier
BE
OL
Is
ola
tio
n F
ilm
Ste
ps
Technology Node
16 20
28
>49
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
Higher mechanical strength
Packaging yield
Lower capacitance
Lower power consumption
Best-in-class uniformity
Less device variability
Low-k Leadership For The Next Decade Producer Black Diamond 3 And Producer Nanocure 3
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
Porosity Engineering
Higher Strength with Lower k
0.0
0.2
0.4
0.6
0.8
1.0
2.2 2.4 2.6 2.8 3
Non-Porous Films Porous Films
Str
on
ger
*
Black Diamond 3
Black Diamond II
Black Diamond
Lower k * Normalized Young’s Modulus
7
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
Strength Enabled by Patented Chemistry
8
size
volu
me
Pore Distribution
BD3
BDII
Better isolation with
engineered porosity
Less interconnected,
more uniform pores
Ordered structure from
designer chemistry
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP 9
A nanometer sized pore
is half the width of a
DNA strand
Black Diamond 3 film is
engineered on the inside
with nano pores
A Human DNA Strand
Picture source: Wikipedia.org
How Small Is a Nano Pore?
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP 10
Interconnect power is
~⅓ of total chip power consumption*
Lowering the dielectric constant, k,
improves insulation and lowers
device power use
Lowering Interconnect Power Consumption
Source: Chandra, G.; Kapur, P.; Saraswat, K.C.; "Scaling trends for the on chip power dissipation”
Multilayer
low-k films
insulate the
copper
wiring
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP 11
Generations of Low-k Technology Leadership
*Source: Tada, M.; Inoue, N.; Hayashi, Y.; , "Performance Modeling of Low- /Cu
Interconnects for 32-nm-Node and Beyond
FSG
k ~ 3.6
Black Diamond
k ~ 3.0
Black Diamond II
k ~ 2.5
2
2.4
2.8
3.2
3.6
4USG
k ~ 4.0
Logic Technology Node (nm)
Bulk
Die
lectr
ic C
onsta
nt (k
)
Every generation lowers
interconnect power by ~10%*
Black Diamond 3
k ~2.2
130nm 90/65nm 45/32nm 22/15nm
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
| EXTERNAL USE
Cu low k
Interface
layer barrier
Interfacial Engineering Offers Lower Effective k
12
Higher k
interface layer
Black Diamond 2
Blok Barrier
Low k bulk
layer
Interface Layer (before)
Black Diamond 3
Blok Barrier
Higher k
interface layer
Low k bulk
layer
Thinner Interface Layer (now)
32/28nm 22/20nm 15/14nm
Interface layer is scaling to smaller device
nodes enabled by Black Diamond 3
45/40nm
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
Engineered porosity offers
higher mechanical strength for
chip packaging yield
Extreme low k dielectric (k ~2.2)
lowers power consumption
Thinner interface layer offers
lower k for smaller device nodes
Black Diamond 3 With Nanocure 3 UV Expands Leadership in Low-k Dielectrics
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
SILICON SYSTEMS GROUP
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