ZAB_3BHS105863E01_B

35
ABB Data sheet a 06-08-07 Gille M. c Issued: 00-07-07 Buschor Document Format Language Page b 26-08-08 Huwyler S. Rev. d Check 1: 00-07-07 Roth A. Department 1 Department 2 e Check 2: Der. from / Repla: Released: 00-07-07 Buschor Replaced by: FEATURES 32 digital inputs for 24VDC 36 digital outputs for 24VDC 7 analog inputs ±10V 8 analog outputs ±10V Interface with UNS 0880 CIN Interface with UNS 0882 PSI Interface with UNS 2880 COB (2nd channel) Interface with UNS 2881 MUB Interface with UNS 2882 EGC Interface with UNS 2861 HIR Hardware expandable, i.e. with UNS 0887 CAP 2 fast I/O channels ARCnet connection DDCC interface HDLC interface for MMI (CMT) ISBX port RS485 panel bus interface BRIEF DESCRIPTION The UNS 2880 Controller Board (COB) is the central processor unit of the UNITROL 5000 system. The UNS 2880 processes all analog and digital inputs and outputs and processes the measured values. It also functions as a gate controller and generates the firing pulses for the converter. It has various diagnostic functions. The UNS 2880 can, as an option, be connected together with a second UNS 2880 (2-channel operation, redundancy). The UNS 2882 serves as a back-up device, which takes over the most important converter functions in the event of failure of the UNS 2880. The normal working range is 50/60 Hz. In combination with the UNS 2882 (EGC), 16 2/3 Hz, single-phase operation can also be covered. Together with the UNS 2861 (HIR), an operating range of up to 600 Hz is possible. UNITROL 5000 EXCITATION SYSTEM Controller Board COB UNITROL UNS 2880a/b-P, V.1 3BHS105863 E01 TA A 4 E 1 35 ABB ATPT1 Rev. No. of pages Optical In Optical Out Electrical In Electrical Out Micro- processor and ASIC's ARCnet Controller COB

Transcript of ZAB_3BHS105863E01_B

Page 1: ZAB_3BHS105863E01_B

ABB Data sheet

a 06-08-07 Gille M. c Issued: 00-07-07 Buschor Document Format Language Page

b 26-08-08 Huwyler S. Rev. d Check 1: 00-07-07 Roth A.

Department 1 Department 2 e Check 2:

Der. from / Repla: Released: 00-07-07 Buschor Replaced by:

FEATURES • 32 digital inputs for 24VDC • 36 digital outputs for 24VDC • 7 analog inputs ±10V • 8 analog outputs ±10V • Interface with UNS 0880 CIN • Interface with UNS 0882 PSI • Interface with UNS 2880 COB (2nd channel) • Interface with UNS 2881 MUB • Interface with UNS 2882 EGC • Interface with UNS 2861 HIR • Hardware expandable, i.e. with UNS 0887 CAP • 2 fast I/O channels • ARCnet connection • DDCC interface • HDLC interface for MMI (CMT) • ISBX port • RS485 panel bus interface

BRIEF DESCRIPTION

The UNS 2880 Controller Board (COB) is the central processor unit of the UNITROL

5000 system. The UNS 2880 processes all analog and digital inputs and outputs and processes the measured values. It also functions as a gate controller and generates the firing pulses for the converter. It has various diagnostic functions. The UNS 2880 can, as an option, be connected together with a second UNS 2880 (2-channel operation, redundancy). The UNS 2882 serves as a back-up device, which takes over the most important converter functions in the event of failure of the UNS 2880. The normal working range is 50/60 Hz. In combination with the UNS 2882 (EGC), 16 2/3 Hz, single-phase operation can also be covered. Together with the UNS 2861 (HIR), an operating range of up to 600 Hz is possible.

UNITROL5000 EXCITATION SYSTEM Controller Board COB

UNITROL

UNS 2880a/b-P, V.1

3BHS105863 E01

TA A 4 E 1 35

ABB ATPT1

Rev. No. of pages

Opt

ical

In

Opt

ical

Out

Ele

ctric

al In

Ele

ctric

al O

ut

Micro-processor

andASIC's

ARCnetController

COB

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CONTENTS FEATURES.....................................................................................................................................1

BRIEF DESCRIPTION ....................................................................................................................1

1 DEVICE CIRCUIT DIAGRAM .......................................................................................5

2 FUNCTIONAL DESCRIPTION......................................................................................6 2.1 Schematic circuit diagram .............................................................................................6 2.2 Central processor unit ...................................................................................................6 2.2.1 Processor......................................................................................................................6 2.2.2 Memory.........................................................................................................................6 2.3 ASIC function (DC94)....................................................................................................7 2.4 Digital inputs .................................................................................................................7 2.4.1 User-specific digital inputs.............................................................................................7 2.4.2 System-specific digital inputs ........................................................................................7 2.4.3 Special digital inputs .....................................................................................................7 2.4.3.1 HWCOD3......................................................................................................................7 2.4.3.2 CONV_AL .....................................................................................................................7 2.5 Digital outputs ...............................................................................................................7 2.5.1 User-specific digital outputs...........................................................................................8 2.5.2 System-specific digital outputs ......................................................................................8 2.6 Analog inputs ................................................................................................................8 2.6.1 User-specific analog inputs ...........................................................................................8 2.6.2 Excitation current (IDC) .................................................................................................8 2.6.3 Zero current detection ...................................................................................................8 2.6.4 Excitation voltage (UDCMEAS) .....................................................................................8 2.6.5 Synchronous voltage (UNMEAS) ..................................................................................8 2.6.6 Analog signal ANTC......................................................................................................9 2.6.6.1 Heat sink temperature (jumper S3 in position 1-2).........................................................9 2.6.6.2 External current measurement (jumper S3 in position 3-4)............................................9 2.6.7 Special analog inputs ....................................................................................................9 2.6.7.1 ACOD1 .........................................................................................................................9 2.6.7.2 Balancing line AGL........................................................................................................9 2.7 Analog outputs ..............................................................................................................9 2.7.1 Programmable analog outputs (AO01, AO02) ...............................................................9 2.7.2 Programmable analog outputs (AO21 … AO24)............................................................9 2.7.3 Excitation current (AO03, IACT) ....................................................................................9 2.7.4 Excitation voltage (AO04, UDCout) ...............................................................................9 2.8 I/O expansion (X21) ......................................................................................................9 2.9 Hardware coding .........................................................................................................10 2.10 Line synchronization ...................................................................................................10 2.11 Firing pulses................................................................................................................10 2.12 Freewheeling function .................................................................................................11 2.13 Communication ...........................................................................................................11 2.13.1 ARCnet .......................................................................................................................11 2.13.2 High-Level Data Link Control (HDLC, A132/133).........................................................11 2.13.3 Distributed Drives Communication System (DDCS, A130/131)) ..................................12 2.13.4 RS 485........................................................................................................................12 2.13.5 Fast data exchange with the second channel UNS 2880 (X18) ...................................12 2.13.6 ISBX interface (X11) ...................................................................................................12 2.13.7 Interface to Measuring Unit Board UNS 2881 (X31) ....................................................12

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2.14 Real Time Clock RTC..................................................................................................12 2.15 Watchdog....................................................................................................................12 2.16 Voltage monitoring ......................................................................................................13

3 CONFIGURATION......................................................................................................14 3.1 Grounding ...................................................................................................................14 3.2 Jumpers ......................................................................................................................14 3.3 ARCnet node addresses .............................................................................................14 3.4 Synchronization...........................................................................................................14 3.4.1 Synchronous voltage measurement, 3-phase/single-phase ........................................14 3.4.2 Synchronizing pulse ....................................................................................................14 3.5 Cables.........................................................................................................................15

4 COMMISSIONING AND FUNCTION CHECK.............................................................16 4.1 System overview.........................................................................................................16 4.2 Function check............................................................................................................17 4.2.1 COB status (7-segment display A100) ........................................................................17 4.2.2 ARCnet status (7-segment display A101)....................................................................17

5 TECHNICAL DATA ....................................................................................................18 5.1 Power supply (X37).....................................................................................................18 5.2 Input values.................................................................................................................18 5.2.1 Analog inputs AI1, AITAC, (X1) ...................................................................................18 5.2.2 Analog inputs AI2 … 4, (X1)........................................................................................18 5.2.3 Analog inputs AI_OPT1, AI_OPT2 (X1).......................................................................18 5.2.4 Digital inputs DI01 …17 (X2), DI21 … 36 (X4), DI52 … 53 (X5) ..................................18 5.3 Output values..............................................................................................................19 5.3.1 Analog outputs AO01 … AO02 (X2), AO21 … AO24 (X4, X5).....................................19 5.3.2 Analog outputs AO03 (IACT), AO04 (UDC) (X2) .........................................................19 5.3.3 Digital outputs DO01 … 19 (X1), DO21 … 39 (X3), DO1INT, DO51 … 54 (X5)...........19 5.3.4 Pulse transformer supply voltage SR1, SR2 (X13) ......................................................19 5.3.5 Pulse outputs BZP1 … 6, SYN_IMP (X13) ..................................................................19 5.4 Optical transmission values (HFBR-1528, HFBR-2528) ..............................................19 5.4.1 Transmission power (A131, A133) ..............................................................................19 5.4.2 Reception level (A130, A132)......................................................................................19 5.5 Environment................................................................................................................20 5.5.1 Standards applied .......................................................................................................20 5.5.2 Permissible ambient temperatures ..............................................................................20 5.5.3 Climatic stability ..........................................................................................................20 5.5.4 Mechanical stability .....................................................................................................20 5.5.5 Electromagnetic compatibility (EMC), interference immunity .......................................20 5.5.6 Electromagnetic compatibility (EMC) interference transmission ..................................21 5.6 Permissible installation altitude without reduction of technical data .............................21 5.7 IP protection degree for protection against contact, foreign bodies and water .............21 5.8 Reliability.....................................................................................................................21

6 CONSTRUCTION DATA ............................................................................................22 6.1 Printed circuit board ....................................................................................................22 6.2 Weight.........................................................................................................................22 6.3 Control and display elements ......................................................................................22 6.4 Flat cables, terminals ..................................................................................................22 6.5 Connector pin assignments, signal designations.........................................................23

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6.6 Mechanical drawing ....................................................................................................34

7 ORDERING INFORMATION.......................................................................................34

8 REVISION HISTORY ..................................................................................................35

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1 DEVICE CIRCUIT DIAGRAM

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2 FUNCTIONAL DESCRIPTION

2.1 Schematic circuit diagram

2.2 Central processor unit

2.2.1 Processor

The UNS 2880a-P (COB) is equipped with an AM80186EM AMD processor. The clock frequency is 32 MHz.

2.2.2 Memory

Program memory 256k * 16 A1202

The program, including system and parameter values (default parameters), is stored in a Flash PROM. Further programs can be loaded into the PROM via the RS-485 (X33/34) or HDLC interface (A132/A133).

Parameter memory 128k * 8 A1203

Application-specific functions and parameters are stored in a Flash PROM.

RAM 2 x 128k * 8 A1200, A1201

Instantaneous values, error and alarm messages and other values are stored in the static RAM. The RAM has a back-up power supply.

Microprocessor

ASIC

Firing UnitInterface A/D

DDCC(Fieldbus)

2nd ChannelChangeover

Control

Memory RAM

D/A

Extensionconnector

Digital IO

Memory Flash

User I/OCurrentmeasurement

Voltagemeasurement

Panelbus IF(RS 485

Interface)

ARCNET

Register

ISBXconnector

HDLC(CMT)

MUBconnector

MISC

DPRAM

DPRAM

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2.3 ASIC function (DC94) Most of the measuring and control functions of the UNS 2880 are carried out by the ASIC: • Communication with the service panel (RS 485). • Hardware watchdog function: The watchdog counter interrupts the microprocessor as soon as

it has reached the value which is programmed into the watchdog alarm register. The thyristor firing pulses and the user-specific inputs/outputs are also reset via the watchdog output.

• A/D converter control: The ASIC selects the channels which are to be converted, starts the conversion and reads the results. The channels must be selected beforehand by software means. The A/D converters are read serially by the ASIC.

• D/A converter control: The ASIC controls some of the A/D converters. The A/D converters are actuated serially.

• Generation of the thyristor firing pulses: The ASIC generates different types of pulse patterns. This allows different thyristors and pulse amplifiers to be controlled.

2.4 Digital inputs

2.4.1 User-specific digital inputs

32 digital inputs DI01 … DI16 and DI21 … DI36 are available.

2.4.2 System-specific digital inputs

DI17 (TCHFN of the standby channel), DI52, DI53 and HWCOD3 are system inputs which are not user definable.

2.4.3 Special digital inputs

2.4.3.1 HWCOD3 In combination with UNS 2861, the signal HWCOD3 is used to indicate a fault in the power section.

2.4.3.2 CONV_AL CONV_AL is the collective alarm, which can be triggered by each UNS 0880 (CIN).

2.5 Digital outputs Group 1: DO01 … DO18, CH_ON (DO19), DO51 … DO54, DO1INT.

Signals of group 1 are only active if DO01 = „1“. Group 2: DO21 … DO38, CH_ON (DO39).

Signals of group 2 are only active if DO21 = „1“. The digital outputs are overload-protected. If a fault occurs, a whole group becomes inactive (via pulldown resistors set to low). In order for the group to be activated again, DO01 or DO21 must be set to „0“ and back to „1“.

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2.5.1 User-specific digital outputs

36 digital outputs DO01 … DO18 and DO21 … DO38 are available.

2.5.2 System-specific digital outputs

DO19 (CH_ON for FIO 1), DO39 (CH_ON for FIO 2), DO51 … DO54 and DO1INT are system outputs which cannot be configured by the user. DO1INT is connected with DO01.

2.6 Analog inputs

2.6.1 User-specific analog inputs

Seven standard user inputs are available. AI1 … AI4 and AITAC are bipolar inputs, AI_OPT1 and AI_OPT2 are unipolar. Analog signals are measured with a 12-bit A/D converter. Two multiplexers switch between the channels which are to be measured. The A/D conversion is completely controlled from the ASIC (see section 2.3).

2.6.2 Excitation current (IDC)

Two excitation current values are measured with the A/D converter: • Peak current value during a firing cycle using a peak value detector (IDCPEAK). • Current at the end of a firing cycle (IDCEND). The excitation current is also measured with a VCO. The measured value is used as the average current during a firing cycle.

2.6.3 Zero current detection

IDCM (from UNS0882) below 0.15V causes a processor interrupt.

2.6.4 Excitation voltage (UDCMEAS)

The excitation voltage is measured by means of a differential amplifier. Due to the high voltage, external resistors in the range 5 … 15 MΩ are required (fitted on the UNS0882). At nominal voltage and on condition that the UNS0882 (PSI) is configured according to the data sheet, + 4 V is present at the output. The excitation voltage is also measured with a VCO.

2.6.5 Synchronous voltage (UNMEAS)

The 3-phase synchronous voltage is measured by means of differential amplifiers. Due to the high voltage, external resistors in the range 5 … 15 MΩ are required (fitted on the UNS 0882). At nominal voltage and on condition that the UNS 0882 (PSI) is configured according to the data sheet, + 4 V is present at the output.

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2.6.6 Analog signal ANTC

2.6.6.1 Heat sink temperature (jumper S3 in position 1-2) One analog input is reserved for the measurement of the heat sink temperature by means of an external PTC resistor.

2.6.6.2 External current measurement (jumper S3 in position 3-4) In this configuration, the DC field current can be measured by means of a shunt and a transducer (processed in the PSI).

2.6.7 Special analog inputs

2.6.7.1 ACOD1 In combination with the UNS 2882 (EGC), the control voltage Uc is measured from the signal ACOD1.

2.6.7.2 Balancing line AGL The signal AGL is proportional to the loading of the entire converter. It is generated jointly by all UNS 0880 (CIN).

2.7 Analog outputs

2.7.1 Programmable analog outputs (AO01, AO02)

Two analog outputs are controlled by the ASIC. Both outputs are updated simultaneously.

2.7.2 Programmable analog outputs (AO21 … AO24)

Four analog outputs are controlled by the microprocessor. All four outputs are updated simultaneously.

2.7.3 Excitation current (AO03, IACT)

The excitation current output serves as a connection for an analog display instrument. The excitation current is output on the UNS 0882 (PSI) at connector X12:9/10 and amplified on the UNS 2880 (COB). IACT is scaled so that 5 V appears at the output at IDCNOM.

2.7.4 Excitation voltage (AO04, UDCout)

The excitation voltage output serves as a connection for an analog display instrument. The excitation voltage is measured on the UNS 0882 (PSI) and amplified on the UNS 2880 (COB). UDCOUT is scaled so that 5 V appears at the output at UDCNOM.

2.8 I/O expansion (X21) This interface is used for hardware extensions, i.e. UNS 0887a-P (Communication Adapter Card).

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2.9 Hardware coding The signal STWA is used to detect whether the UNS 0882 (PSI) is connected via connector X12.

2.10 Line synchronization In order to synchronize the firing of the thyristors with the line, the synchronizing pulse SC1 is generated from the chained voltage U_VU. SC1 is phase-shifted in relation to U_VU.

( ) ( )CRfCR ×××Π×−×=××−×=∆ 2arctan2arctan2 ωϕ For R = 332 kΩ and C = 15 nF, the phase shift at 50 Hz is 114.8°.

In order to mask the commutation breaks, U_VU can be temporarily held synchronous to the breaks by means of a holding element. If an external gate controller is used, the external synchronizing pulse EXTSC1 can be used. The jumper S2 must be set appropriately for this purpose (see section 3.2).

2.11 Firing pulses Firing pulses and selection of the converter bridge or current direction are generated in the ASIC. The CPU selects the converter bridge (TWIN Mode) or the current direction (forwards or backwards bridge) by setting SR1 or SR2. The firing pulses are prevented if the connector X12 is not connected, if the supply voltage is outside of the tolerance range, following a Master Reset or if the watchdog is tripped.

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2.12 Freewheeling function When operating under a high-impedance load, there is a danger of destructive overvoltages if the field breaker is opened while under current. In order to prevent excessive overvoltages, the thyristors have to be fired. This creates a freewheeling path for the induced current. The freewheeling function is triggered if an overvoltage of reversed polarity in comparison with normal operation is present in the excitation voltage UDC. The threshold voltage is UNUDC ×> 45.2 if CURDIR1 is set UNUDC ×−< 45.2 if CURDIR2 is set The freewheeling function can also be triggered by software means. In both cases it must be enabled in the ASIC DC94.

2.13 Communication

2.13.1 ARCnet

The ARCnet is used for communication with the converter interface UNS 0880 (CIN) and (optionally) with the UNS 2880 (COB) of the standby channel, with one or two AF C094 (LCP) control panels and with other ARCnet-I/O-nodes of the UNITROL

5000 system. The communication takes place via DPRAM and with the aid of semaphores. The node address must be set before powering up. The permitted settings are shown in section 3.3. The nodes transmit in descending sequence according to their node number. All signals defined in the software are transmitted exactly once during a transmission cycle. The transmission delay per node is defined as follows: Device UNS 2880 (COB) UNS 0880a (CIN) I/O Transmission delay SV1 3.5 ms 3.5 ms 1.7 ms The entire transmission cycle is calculated from: ∑=

iiZ SVt ; i = 1 … # nodes

Communication on the ARCnet nodes takes place with a fixed task time (DPRAM-handshake between main processor and ARCnet processor): Device UNS2880a (COB) UNS0880a (CIN) Task time tCOB = 20 ms tCIN = 20 ms This produces the worst-case reaction time2: CINCOBZR tttt ++=

2.13.2 High-Level Data Link Control (HDLC, A132/133)

The UNS 2880 features an optical HDLC channel, which is typically used for communication with the PC-based Commissioning and Maintenance Tool (CMT). New operating software may also be loaded via the HDLC channel.

1 The transmission time is included in the transmission delay. 2 It is the time between the alteration of a signal in the transmitter and the output of the signal in the receiver.

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2.13.3 Distributed Drives Communication System (DDCS, A130/131))

The UNS 2880 has an integrated DDCS channel with a transfer rate from up to 4 Mbits/s. This channel can be used for fieldbus modules.

2.13.4 RS 485

The UNS2880 has two RS 485 interfaces. One interface is intended for the connection of the Service Panel UNS 0874 (SPA) via X33 or X34. The second interface (X18) is reserved for later applications.

2.13.5 Fast data exchange with the second channel UNS 2880 (X18)

Four digital outputs (+15V) and four digital inputs (+15V) are provided at connector X18 for fast data exchange between two UNS 2880s. The function of these inputs and outputs is defined in the software.

2.13.6 ISBX interface (X11)

This interface is reserved for future applications.

2.13.7 Interface to Measuring Unit Board UNS 2881 (X31)

UNS 2880 and UNS 2881 communicate with one to another via a dual port RAM with the aid of semaphores.

2.14 Real Time Clock RTC The real time clock can be programmed in the system. The setting range extends from 1.1.2000, 00:00:00 to 31.12.2099, 23:59:59. The resolution of the real time clock is 1 second; the daily deviation of the second pulse is typically 1 second (maximum 6 seconds at 70°C).3 Because of buffering, the time is also maintained over several days if the supply voltage is switched off. The same buffering also supplies the RAM.

Minimum buffer time: hA

FVI

QUt 4

)101002(1)25( =

+××−=×=

µ

2.15 Watchdog The UNS 2880 has an internal watchdog on the ASIC DC94 (see chapter 2.3).

3 The resolution down to milliseconds is generated in the processor.

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2.16 Voltage monitoring The different supply voltages are monitored. If a voltage falls below the threshold value, an error signal is generated and the supply voltage for the firing pulses is switched off. Supply voltage +15V -15V +24V Threshold value + 13.4 V - 13 V +19.9 V The +5V supply voltage is monitored separately. If the voltage falls below the threshold value, a Master Reset is triggered by the hardware. All I/O registers are set to 0 and the firing pulses are suppressed. Supply voltage +5V Threshold value +4.65 V The -5V supply voltage is also monitored. If the voltage falls below the threshold value, the ARCnet output is switched off. Supply voltage -5V Threshold value - 3.4 V

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3 CONFIGURATION

3.1 Grounding The device is earthed via the mounting bolts. It must be ensured that the device is mounted on a well-earthed base plate/rail.

3.2 Jumpers

1 – 2 Loading of parameter default values on power-up

3 – 4 Normal operation (standard position)

S2

5 – 6 Activate Boot Strap Loader on power-up (for development only, DO NOT USE without authorization!)

7 – 8 Use of the external synchronizing pulse S2

9 – 10 Use of the internal synchronizing pulse (standard position)

1 – 2 Temperature measurement via external sensor (PTC resistor) S3

3 – 4 External current measurement or unused (standard position)

3.3 ARCnet node addresses

S2121 S2120 COB channel

Address

High Byte Low Byte

1 1 0 1

2 2 0 2

3.4 Synchronization

3.4.1 Synchronous voltage measurement, 3-phase/single-phase

Position 3-phase (default) Single-phase

R6246 R6249

0 Ω not fitted

o

3.4.2 Synchronizing pulse

For explanation see section 2.10 Line synchronization. Position Without holding

function With holding function

R6263 0 Ω not fitted

R6279 not fitted 0 Ω This function must be activated in the software at the same time! This function is only available in future versions.

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3.5 Cables The connections between the Controller Board UNS 2880 and the peripheral devices are made using prefabricated flat cables, coaxial cables and fiber optic cables.

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4 COMMISSIONING AND FUNCTION CHECK

4.1 System overview

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4.2 Function check

4.2.1 COB status (7-segment display A100)

COB error codes E00 Boot Flash Memory Error E01 Main Flash Memory Error E02 RAM Error E05 No Control Program E06 DC94 ASIC Error, following a restart with other hardware error E38 ARCnet DPRAM Access Error

4.2.2 ARCnet status (7-segment display A101)

Hardware error

Software controlled error message

*) Several status messages are displayed in sequence of 0.7s.

Software controlled alarm message

Board defective

Start sequence

Download of firmware

Boot Strap Loader active

Board defective

Board defectiveothers

everything ok

ARCnet Firmware doesn't startInvalid node address

Start sequency

No bus access, check bus cable to other ARCNET-nodes on the bus

everything ok

two identical addresses on the busWaiting for ARCnet configuration

others Board defective Platzhalter

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5 Technical data

5.1 Power supply (X37) Nominal voltage Us1 24 VDC Permitted voltage range ± 10 % Current consumption Is1 without load ≤ 10 mA

Nominal voltage Us2 + 15 VDC Permitted voltage range ± 5 % Current consumption Is2 ≤ 160 mA

Nominal voltage Us3 - 15 VDC Permitted voltage range ± 5 % Current consumption Is3 ≤ 120 mA

Nominal voltage Us4 5 VDC Permitted voltage range ± 5 % Current consumption Is4 ≤ 700 mA Nominal voltage Us5 3.3 VDC Permitted voltage range ± 5 % Current consumption Is4 ≤ 500 mA

5.2 Input values

5.2.1 Analog inputs AI1, AITAC, (X1)

Input voltage range Un - 10 ... + 10 V Continuous permitted overload 1.5 * Un Common mode range ± 20 V Input resistance 200 kΩ Resolution 12-bit + sign

5.2.2 Analog inputs AI2 … 4, (X1)

Input voltage range Un - 10 ... + 10 V Continuous permitted overload 1.5 * Un Common mode range ± 40 V Input resistance 200 kΩ Resolution 11-bit + sign

5.2.3 Analog inputs AI_OPT1, AI_OPT2 (X1)

Input voltage range Un 0 ... 5 V Continuous permitted overload 1.5 * Un Input resistance 10 kΩ Resolution 12-bit unipolar

5.2.4 Digital inputs DI01 …17 (X2), DI21 … 36 (X4), DI52 … 53 (X5)

Input voltage range log. 1 10 … 24 VDC Input voltage range log. 0 0 … 2 VDC Input current at 24 V 2 mA Filter time constant 2.2 ms

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5.3 Output values

5.3.1 Analog outputs AO01 … AO02 (X2), AO21 … AO24 (X4, X5)

Output voltage range ± 10 V Output current ≤ 4 mA Resolution 11-bit + sign

5.3.2 Analog outputs AO03 (IACT), AO04 (UDC) (X2)

Output voltage range ± 15 V Output current ≤ 4 mA

5.3.3 Digital outputs DO01 … 19 (X1), DO21 … 39 (X3), DO1INT, DO51 … 54 (X5)

Output voltage log. 1 ≥ Us1- 2 VDC Output voltage log. 0 open Output current together 350 mA Overload threshold value for driver shutdown 500 mA

5.3.4 Pulse transformer supply voltage SR1, SR2 (X13)

Output voltage ON ≥ Us1- 2 VDC Output voltage OFF open Output current (not overload-proof) ≤ 1 A

5.3.5 Pulse outputs BZP1 … 6, SYN_IMP (X13)

Pulse output, active 0V Pulse output, passive ≥ Us1- 2 VDC Output current (not overload-proof) ≤ 350 mA

5.4 Optical transmission values (HFBR-1528, HFBR-2528)

5.4.1 Transmission power (A131, A133)

Light output after 0.5 m optical fiber cable at 60 mA (CMT/HDLC) - 6.9 dBm Light output after 0.5 m optical fiber cable at 50 mA (fieldbus) - 9.4 dBm Maximum cable length (with POF-cable) < 20 m

5.4.2 Reception level (A130, A132)

Minimum reception level - 20 dBm

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5.5 Environment

5.5.1 Standards applied

HQ SN-62.1008d] Product Standard for Power Station Installations applied by Hydro Quebec, Canada

[EN 50081-2, EN 50082-2] Generic standards of the European Union IEC/EN 60…, IEC/EN 61…, IEEE-STD International Standards The UNS2880 (COB) fulfils the relevant requirements of these standards.

5.5.2 Permissible ambient temperatures

Compliance with technical data 0 ... + 55 °C Operation 0 ... + 70 °C Storage - 25 ... + 85 °C

5.5.3 Climatic stability

Cold according to: IEC 60068-2-1 [HQ SN-62.1008d] Test Ad

-25 C°, 2h Dry heat according to: IEC 60068-2-2 [HQ SN-62.1008d] Test Bd

55 C°, 16h Humid heat according to: IEC 60068-2-3 [HQ SN-62.1008d] Test Ca

40 C°, 4 days 93 +2/-3 %

5.5.4 Mechanical stability Vibration according to IEC 60255-21-1 [HQ SN-62.1008d] 2 … 150 Hz Response test, class 2 2 g in each axis Endurance test, class 2 2 g in each axis Seismic stability 2 …35 Hz according to IEC 60255-21-3 and IEEE-STD 344-1987 2 g in each axis according to IEEE-STD 344-1987 5 g in each axis

5.5.5 Electromagnetic compatibility (EMC), interference immunity Immunity to high-frequency electromagnetic fields according to IEC/EN 61000-4-3 [EN 50082-2 / HQ SN-62.1008d] 80 ... 1000 MHz Testing level 3 10 V/m Evaluation criteria for operating behavior [IEC/EN] A

[HQ SN-62.1008d] N1

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5.5.6 Electromagnetic compatibility (EMC) interference transmission

according to EN 55011 / CISPR 11 [EN 50081-2], class A, group 1 Distance to measuring point 30m Limiting values of transmitted interference from 30-230 MHz: 30 dB [µV/m] Limiting values of transmitted interference from 230-1000 MHz 37 dB [µV/m] according to CISPR 22 [HQ SN-62.1008d] , class A, group 1 Distance to measuring point 10m Limiting values of transmitted interference from 30-230 MHz: 40 dB [µV/m] Limiting values of transmitted interference from 230-1000 MHz 47 dB [µV/m]

5.6 Permissible installation altitude without reduction of technical data according to IEC 68-2-13 max. 2'000 m above sea level

5.7 IP protection degree for protection against contact, foreign bodies and water according to DIN 40050 IP 00

5.8 Reliability Failure rate at 40°C ambient atmosphere, GB 6400 FIT

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6 Construction data

6.1 Printed circuit board Dimensions (Lx W x H) 254 x 130 x 35 [mm]

6.2 Weight Mass 450 g

6.3 Control and display elements

Control elements: HEX switch S2120, S2121 ARCnet node address Jumpers S2 Program start mode Type of synchronization S3 Configuration of IF_DC_TEMP Display elements: 7-segment display, red A100 COB status 7- segment display, red A101 ARCnet status

6.4 Flat cables, terminals Connector Connection to Flat cable Identification number Remarks

X1, X2, X3, X4 UNS 0883 (FIO) 34-pin HIER466818 Pxxxx xxxx = cable length in cm

UNS 2861 (HIR)

connector X51

X5

UNS 2882 (EGC)

16-pin

supplied with UNS 4881, V2

UNS 0882 (PSI) 16-pin 3BHE004578Rxxxx X12

UNS 2882 (EGC)

connector X121

16-pin supplied with UNS 4881, V2

X13 UNS 0880 (CIN) 16-pin 3BHE005115Rxxxx

X18 UNS 2880 (COB) 16-pin 3BHE005104R0185

X31 UNS 2881 (MUB) 34-pin

X37 UNS 2881 (MUB) 26-pin

3BHB007087 supplied with UNS 2881 (MUB)

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6.5 Connector pin assignments, signal designations

X1 Flat cable connection to UNS 0883 / UNS 0886 / UNS 2882

Pin designation Signal designation Function Signal

flow 1 AI_OPT1 Analogue input(+) IN 2 GND Ground - 3 AI_OPT2 Analogue input(+) IN 4 GND Ground - 5 AITAC+ Analogue input(+) IN 6 AITAC- Analogue input(-) IN 7 AI1+ Analogue input(+) IN 8 AI1- Analogue input(-) IN 9 AI2+ Analogue input(+) IN 10 AI2- Analogue input(-) IN 11 AI3+ Analogue input(+) IN 12 AI3- Analogue input(-) IN 13 AI4+ Analogue input(+) IN 14 AI4- Analogue input(-) IN 15 GND Ground - 16 CH_ON Digital output 19 OUT 17 DO18 Digital output 18 OUT 18 DO17 Digital output 17 OUT 19 DO16 Digital output 16 OUT 20 DO15 Digital output 15 OUT 21 DO14 Digital output 14 OUT 22 DO13 Digital output 13 OUT 23 DO12 Digital output 12 OUT 24 DO11 Digital output 11 OUT 25 DO10 Digital output 10 OUT 26 DO09 Digital output 09 OUT 27 DO08 Digital output 08 OUT 28 DO07 Digital output 07 OUT 29 DO06 Digital output 06 OUT 30 DO05 Digital output 05 OUT 31 DO04 Digital output 04 OUT 32 DO03 Digital output 03 OUT 33 TRIP Digital output 02 OUT 34 CH FAIL NOT Digital output 01 OUT

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X2 Flat cable connection to UNS 0883 / UNS 2882 Pin

designation Signal

designation Function Signal flow

1 NC - 2 NC - 3 NC - 4 DI01 Digital input 01 IN 5 DI02 Digital input 02 IN 6 DI03 Digital input 03 IN 7 DI04 Digital input 04 IN 8 DI05 Digital input 05 IN 9 DI06 Digital input 06 IN 10 DI07 Digital input 07 IN 11 DI08 Digital input 08 IN 12 DI09 Digital input 09 IN 13 DI10 Digital input 10 IN 14 DI11 Digital input 11 IN 15 DI12 Digital input 12 IN 16 DI13 Digital input 13 IN 17 DI14 Digital input 14 IN 18 DI15 Digital input 15 IN 19 DI16 Digital input 16 IN 20 GND Ground - 21 GND Ground - 22 GND Ground - 23 GND Ground - 24 GND Ground - 25 + 24 V + 24 VDC to I/O - 26 + 24 V + 24 VDC to I/O - 27 GND Ground - 28 NC - 29 NC - 30 IACT Analogue output 03 OUT 31 UDC Analogue output 04 OUT 32 AO01 Analogue output 01 OUT 33 AO02 Analogue output 02 OUT 34 CH FAIL NOT Digital input 17 IN

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X3 Flat cable connection to UNS 0883 / UNS 2882 Pin

designation Signal

designation Function Signal flow

1 NC - 2 GND Ground - 3 NC - 4 GND Ground - 5 NC - 6 NC - 7 NC - 8 NC - 9 NC - 10 NC - 11 NC - 12 NC - 13 NC - 14 NC - 15 GND Ground - 16 DO39 Digital output 39 OUT 17 DO38 Digital output 38 OUT 18 DO37 Digital output 37 OUT 19 DO36 Digital output 36 OUT 20 DO35 Digital output 35 OUT 21 DO34 Digital output 34 OUT 22 DO33 Digital output 33 OUT 23 DO32 Digital output 32 OUT 24 DO31 Digital output 31 OUT 25 DO30 Digital output 30 OUT 26 DO29 Digital output 29 OUT 27 DO28 Digital output 28 OUT 28 DO27 Digital output 27 OUT 29 DO26 Digital output 26 OUT 30 DO25 Digital output 25 OUT 31 DO24 Digital output 24 OUT 32 DO23 Digital output 23 OUT 33 DO22 Digital output 22 OUT 34 DO21 Digital output 21 OUT

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X4 Flat cable connection to UNS 0883 / UNS 0886 / UNS 2882 Pin

designation Signal

designation Function Signal flow

1 NC - 2 NC - 3 NC - 4 DI21 Digital input 21 IN 5 DI22 Digital input 22 IN 6 DI23 Digital input 23 IN 7 DI24 Digital input 24 IN 8 DI25 Digital input 25 IN 9 DI26 Digital input 26 IN 10 DI27 Digital input 27 IN 11 DI28 Digital input 28 IN 12 DI29 Digital input 29 IN 13 DI30 Digital input 30 IN 14 DI31 Digital input 31 IN 15 DI32 Digital input 32 IN 16 DI33 Digital input 33 IN 17 DI34 Digital input 34 IN 18 DI35 Digital input 35 IN 19 DI36 Digital input 36 IN 20 GND Ground - 21 GND Ground - 22 GND Ground - 23 GND Ground - 24 GND Ground - 25 +24V + 24 VDC to I/O - 26 +24V + 24 VDC to I/O - 27 GND Ground - 28 NC - 29 NC - 30 AO23 Analogue output 23 OUT 31 AO24 Analogue output 24 OUT 32 AO21 Analogue output 21 OUT 33 AO22 Analogue output 22 OUT 34 NC -

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X5 Flat cable connection to UNS 2882 Pin

designation Signal

designation Function Signal flow

1 DO51 Digital output 51 OUT 2 DO52 Digital output 52 OUT 3 DO53 Digital output 53 OUT 4 DI51 Digital input 51 IN 5 DI52 Digital input 52 IN 6 DI53 Digital input 53 IN 7 EXTSC1 External synchronization clock IN 8 ACOD1 UDCOUT IN 9 DO54 ALARMRESET EGC OUT 10 AO23 Analogue output 23 OUT 11 GND Ground - 12 GND Ground - 13 5V + 5 V Power supply - 14 5V + 5 V Power supply - 15 15V + 15 V Power supply - 16 N15V - 15 V Power supply -

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X11 Plug-in connection to ISBX module Pin

designation Signal

designation Function Signal flow

1 +24V + 24 V Power supply - 2 MPFP_N Power supply primary power failure OUT 3 GND Ground - 4 5V + 5 V Power Supply - 5 RES_COM Active high reset output OUT 6 RXD1 Receive serial data IN 7 BA3 Address bus A3 output OUT 8 MPST_N Optional board connected IN 9 BA2 Address bus A2 output OUT 10 ALE CPU address latch enable OUT 11 BA1 Address bus A1 output OUT 12 INT3 CPU interrupt 3 IN 13 BWR_N Write control OUT 14 INT2 CPU interrupt 2 IN 15 BRD_N Read control OUT 16 READY CPU asynchronous ready IN 17 GND Ground - 18 5V + 5 V Power Supply - 19 BD7 Data bus bit 7 IN/OUT 20 CBMCS1_N Dual port RAM chip select OUT 21 BD6 Data bus bit 6 IN/OUT 22 CBMCS0_N Address counter chip select OUT 23 BD5 Data bus bit 5 IN/OUT 24 CLKOUTA 32 MHz clock frequency from CPU 25 BD4 Data bus bit 4 IN/OUT 26 RTS_ISBX Receive or transmit serial data IN 27 BD3 Data bus bit 3 IN/OUT 28 TXD_ISBX Transmit serial data OUT 29 BD2 Data bus bit 2 IN/OUT 30 NC - 31 BD1 Data bus bit 1 IN/OUT 32 DTR_N CPU data transmit or receive OUT 33 BD0 Data bus bit 0 IN/OUT 34 DRQ0 CPU DMA request 0 IN 35 GND Ground - 36 5V + 5 V Power Supply -

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X12 Flat cable connection to UNS 0882 / UNS 2882 Pin

designation Signal

designation Function Signal flow

1 GND Ground - 2 IF_DC_TEMP Heat sink temperature input IN 3 STWA Board plug in detection IN 4 USYNR Voltage Phase R IN 5 HWCOD3 Hardware coding input 3 IN 6 UE+ Positive input of exciter voltage IN 7 GND Ground - 8 GND Ground - 9 IDC IN 10 IDC

Exciter current input IN

11 IDCM IN 12 IDCM

Exciter current input for zero current detection IN

13 GND Ground - 14 USYNS Voltage Phase S IN 15 UE- Negative input of exciter voltage IN 16 USYNT Voltage Phase T IN

X13 Flat cable connection to UNS 0880 / UNS 2882 Pin

designation Signal

designation Function Signal flow

1 BZP1 Thyristor firing command output OUT

2 SR2 Current direction 2 pulse transformer power supply OUT

3 BZP2 Thyristor firing command output OUT

4 SR2 Current direction 2 pulse transformer power supply OUT

5 BZP3 Thyristor firing command output OUT

6 SR1 Current direction 1 pulse transformer power supply OUT

7 BZP4 Thyristor firing command output OUT

8 SR1 Current direction 1 pulse transformer power supply OUT

9 BZP5 Thyristor firing command output OUT 10 SYN_IMP Synchronization pulse OUT 11 BZP6 Thyristor firing command output OUT 12 GND Ground - 13 NC - 14 GND Ground - 15 AGL Equalizing line IN 16 CONV ALARM Converter alarm IN

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X18 Flat cable connection to UNS 2880 (2nd channel) Pin

designation Signal

designation Function Signal

flow 1 - NC - 2 - NC - 3 - NC - 4 - NC - 5 GND Ground - 6 RXTX- RS-485 interface IN/OUT 7 GND Ground - 8 RXTX+ RS-485 interface IN/OUT 9 BBRP12 OUT 10 BBBP12 OUT 11 BFQP12 OUT 12 BAEP12

Handshaking signals for 2-channel changeover control

OUT 13 MAEP12 IN 14 MFQP12 IN 15 MBBP12 IN 16 MBRP12

Handshaking signals for 2-channel changeover control

IN

Plug-in X18 Channel I Special cable for fast data exchange plug-in X18 Channel II

12345 GND6 Rx / Tx -7 GND8 Rx / Tx +

16 BBRP1215 BBBP1214 BFQP1213 BAEP1212 MAEP1211 MFQP1210 MBBP129 MBRP12

1234

GND 5Rx / Tx - 6

GND 7Rx / Tx + 8BBRP12 9BBBP12 10BFQP12 11BAEP12 12MAEP12 13MFQP12 14MBBP12 15MBRP12 16

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X21 Plug-in connection for I/O expansion module Pin

designation Signal

designation Function Signal

flow 1 GND Ground - 2 5V + 5 V Power supply - 3 BD0 Data bus bit 0 IN/OUT 4 BD1 Data bus bit 1 IN/OUT 5 BD2 Data bus bit 2 IN/OUT 6 BD3 Data bus bit 3 IN/OUT 7 BD4 Data bus bit 4 IN/OUT 8 BD5 Data bus bit 5 IN/OUT 9 BD6 Data bus bit 6 IN/OUT 10 BD7 Data bus bit 7 IN/OUT 11 A1 Address bus bit 1 OUT 12 A2 Address bus bit 2 OUT 13 A3 Address bus bit 3 OUT 14 A4 Address bus bit 4 OUT 15 A5 Address bus bit 5 OUT 16 A6 Address bus bit 6 OUT 17 A7 Address bus bit 7 OUT 18 A8 Address bus bit 8 OUT 19 A9 Address bus bit 9 OUT 20 A10 Address bus bit 10 OUT 21 A11 Address bus bit 11 OUT 22 RESH Reset OUT 23 CSIOEXT_N CPU chip select for I/O extension OUT 24 RD_N Read control OUT 25 WR_N Write control OUT 26 INT2 CPU interrupt 2 IN 27 UDCOUT Exciter voltage OUT 28 T0OUT CPU timer 0 OUT 29 UN Line voltage OUT 30 CHA Incremental encoder channel A IN 31 CHB Incremental encoder channel B IN 32 CHZ Incremental encoder zero pulse IN 33 GND Ground - 34 READY CPU asynchronous ready IN 35 N15V - 15 V Power supply - 36 15V + 15 V Power supply -

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X31 Flat cable connection to UNS 2881 Pin

designation Signal

designation Function Signal

flow 1 - NC - 2 - NC - 3 - NC - 4 GND Ground - 5 - NC - 6 A12 Address bus bit 12 OUT 7 CSMUB_SEM_N Chip select for semaphore sector OUT 8 AO03 (IACT) Exciter current OUT 9 CSMUB_H1_N Chip select for host interface OUT 10 - NC - 11 INT2 CPU interrupt 2 IN 12 BWR_N Dual port RAM write control OUT 13 BRD_N Dual port RAM read control OUT 14 CSMUB_CS_N Chip select for data sector OUT 15 RES_COM Reset OUT 16 A11 Address bus bit 11 OUT 17 A10 Address bus bit 10 OUT 18 A9 Address bus bit 9 OUT 19 A8 Address bus bit 8 OUT 20 A7 Address bus bit 7 OUT 21 A6 Address bus bit 6 OUT 22 A5 Address bus bit 5 OUT 23 A4 Address bus bit 4 OUT 24 A3 Address bus bit 3 OUT 25 A2 Address bus bit 2 OUT 26 A1 Address bus bit 1 OUT 27 BD7 Data bus bit 7 IN/OUT 28 BD6 Data bus bit 6 IN/OUT 29 BD5 Data bus bit 5 IN/OUT 30 BD4 Data bus bit 4 IN/OUT 31 BD3 Data bus bit 3 IN/OUT 32 BD2 Data bus bit 2 IN/OUT 33 BD1 Data bus bit 1 IN/OUT 34 BD0 Data bus bit 0 IN/OUT

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X33 RS-485 connection to panel Pin

designation Signal

designation Function Signal

flow 1 TLR Transmit / receive control OUT 2 GND Ground - 3 A- Negative communication line IN/OUT 4 A+ Positive communication line IN/OUT 5 GND Ground - 6 +24V + 24 V Power supply -

X34 RS-485 connection to UNS 2880 (2nd channel) Pin

designation Signal

designation Function Signal

flow 1 TLR Transmit / receive control OUT 2 GND Ground - 3 A- Negative communication line IN/OUT 4 A+ Positive communication line IN/OUT 5 GND Ground - 6 +24V + 24 V Power supply -

X37 Flat cable connection to UNS 2881 Pin

designation Signal

designation Function Signal

flow 1 - NC - 2 MPFP_N Power supply or watchdog failure IN 3 GND Ground - 4 5V + 5 V Power supply - 5 GND Ground - 6 5V + 5 V Power supply - 7 GND Ground - 8 5V + 5 V Power supply - 9 GND Ground - 10 5V + 5 V Power supply - 11 - NC - 12 - NC - 13 - NC - 14 - NC - 15 YN15V - 15 V Power supply - 16 YN15V - 15 V Power supply - 17 GNDA Ground - 18 GNDA Ground - 19 Y15V + 15 V Power supply - 20 Y15V + 15 V Power supply - 21 24V + 24 V Power supply - 22 24V + 24 V Power supply - 23 - NC - 24 - NC - 25 - NC - 26 - NC -

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6.6 Mechanical drawing

7 Ordering information

UNS 2880 A-P: Controller Board COB 3BHB005727R0001 UNS 2880 B-P: Controller Board COB 3BHE006422R0001 3BHE006422R0002

(no technical differences between A and B type and rubric 1 and 2)

254.68.911.4

92.8

31.8

74.8

281.

4

X1

X3

X4

X2

31.1

81.9

11.4 10.914.7

42.0

41.4

18.0

3.8

0.0

X12.5 Y54.4

X169.9 Y96.8 X237.5 Y96.8

X143.6 Y6.3

X17.5 Y131.8

X237.5 Y271.8

X242.5 Y54.4

X17.5 Y271.8

X97.2 Y96.8

Fixing hole, Ø 4.8, grounded

1

1

1

1

0-Point

A100

A101

S2

1

S3

1

X5

1

X131

X121

X181

S2120

S2121

1 26 1 26

X37 X31

16

X33

16

X34

1 1

X21 X11

Subprint X21Subprint X11

X59.7 Y258.4

X122.0 Y259.7

X142.3 Y129.5X63.5 Y131.4

X228.6 Y207.6

X163.6 Y128.1

X228.6 Y111.1

A131A133 A130A132

A2100

X61

R62

46

R62

49

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8 Revision history

Rev. ind.

Page / Chapter

Description Datum Dept./Init.

- Initial edition 30.08.02 ATPT1 / CB

Divers Orthography 07.06.04 ATPT1 / CB

35 / 8 Revision history 07.06.04 ATPT1 / CB

A several Added version B (hardware changes because of obsolete components, and no technical differences!)

07.08.2006 ATPT1 / MG

B several Added description of interface to UNS 887 26.08.2008 ATPT1 / SH