WebTA/WebChip Perl Utilities for Post-Processing Synthesis Results of SoC Designs

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WebTA/WebChip Perl Utilities for Post- Processing Synthesis Results of SoC Designs Steven Leung Brocade Communication Systems March 14, 2002

description

WebTA/WebChip Perl Utilities for Post-Processing Synthesis Results of SoC Designs. Steven Leung Brocade Communication Systems March 14, 2002. Outline. Introduction What Do We Want? Information better organized Automation to reduce manual efforts WebTA/WebChip Design Data IO GUI - PowerPoint PPT Presentation

Transcript of WebTA/WebChip Perl Utilities for Post-Processing Synthesis Results of SoC Designs

Page 1: WebTA/WebChip Perl Utilities for Post-Processing Synthesis Results of SoC Designs

WebTA/WebChip Perl Utilities for Post-Processing Synthesis Results of SoC Designs

Steven Leung

Brocade Communication Systems

March 14, 2002

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Outline

Introduction

What Do We Want?– Information better organized– Automation to reduce manual efforts

WebTA/WebChip Design– Data IO– GUI– Main script flow (WebTA)– Webization

Demo

Conclusions

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Introduction: What is the Issue?

SoC designs: Blocks today are chips yesterday

Key implement issue in achieving TTM: “Timing Closure”One aspect of the timing closure problem:

Timing constraints take weeks, if not months, to clean

Major constraint types: Clocks, IO Timing, F-/M-Paths– Block vs. Chip– Synthesis vs. STA– Pre-layout vs. Post-layout– Logical vs. physical

Most of the time spent on exception path specifications

How can we speed up the constraints dev/mgmt process?

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Introduction: Motivation

Recap: Timing closure Constraints F/M paths– Feedback from violation reports

Why does it take months to clean?– Coding/planning problems– Incompatibility between tools– Information not well organized– Labor intensive

WebTA is developed to address the last two areas– Information better organized– Automation to reduce manual work

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What Do We Want?

Information better organized– Separate viols into groups based on

• R-R vs. IO-related

• Setup vs. Hold

• Clock-pairs

Orig. rpt size: 80MB+1.45M lines31k+ timing path viols4.5hrs to generate

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What Do We Want?

Information better organized– Timing information hierarchy

statistics

summary

– Extensive links to provide top-down, directed, immediate access

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What Do We Want?

Automation to reduce manual work– Recognize “similar” paths and display just once

# of viol paths reduced from 31k to < 1.4k!

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What Do We Want?

Automation to reduce manual work– Capture false/multicycle path specs while designers examine

the path violations

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design.cnstr.rpt

Data I/O: WebTA

WebTA

webta.html

webta_stat.html

Statistics Cell/Net/Area Timing violations DFT/Test violations

webta.cmdinput_file_basename designoutput_file_prefix webtadelay_warning_threshold 0.15delay_error_threshold 0.3...

webta.stat

webta_smry.html

List of path summary in each timing path group

webta_smry_cgi.html

Command Syntax: webta [design]design.tim.max.rpt

design.area.rptdesign.ref.rpt

design.qor.rptdesign.atpg.rpt

design.test.chk

webta_detail.html

webta_sim_path.html

webta_log.html

Timing path details

Other non-timing detailsSimilar path information

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block_list_file

WebChip

Data I/O: WebChip

dir1webchip.html

webchip_ctrl.html

webchip_stat.html

Command Syntax: webchip block_list_file

File Format[# ]dir [<#_of_inst>]

/webta.stat

dir2/webta.stat

dirn/webta.stat

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WebTA/WebChip Design: GUI

* : setup viol

+ : DFT viol

multipleinstantiation

support

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WebTA Design: Script Overview

Main Script Flow– Step 1: Collect path slack info and generate summary

– Data structure is the key– Step 2: Suppress similar paths and add html/cgi

Webization Techniques– HTML tags: Simple labeling and links setting– CGI basic– Adding GUI widgets through the FORM tag

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Startpoint: u_clocks/dbs_div2_reg/Q (clock source 'clk_dei')Endpoint: u_tslice_0/tsl_s_phase_reg (rising edge-triggered flip-flop clocked by clk_dbs)Path Group: clk_dbsPath Type: max

Point Incr Path------------------------------------------------------------clock clk_dei (rise edge) 0.00 0.00u_clocks/dbs_div2_reg/Q (FD1SQAFP) 0.00 0.00 r . . .data arrival time -9.26------------------------------------------------------------slack (VIOLATED) -6.60

WebTA Design: Main Script Flow (1a)

Collecting info in the path report

$st$start_clk

$end

$end_clk

$slk

$type

$is_iport$is_oport

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WebTA Design: Main Script Flow (1b)

Defining the variable $path_type as follows:

$type $is_iport $is_oport $path_type CommentsMax 0 0 0 Setup, R-R

Max 1 0 1 Setup, I-R

Max 0 2 2 Max, R-O

Max 1 2 3 Max, I-O

Min 0 0 4 Hold, R-R

Min 1 0 5 Hold, I-R

Min 0 2 6 Min, R-O

Min 1 2 7 Min, I-O

$path_type = $is_iport + $is_oport + $type eq ‘min’ ? 4 : 0;

$path_type is used as index to a reg array @slk_of, which stores references of hashes holding path-slack pairs

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WebTA Design: Main Script Flow (1c)

Data structure that stores the slacks of ALL paths

$slk_of[$path_type]

Sort and dump out the entire table to a smry.tmp file; and generate statistics along the way

@slk_of%{ }–>

(anonymous hash)

valuekey

where $grp = “$start_clk–$end_clk”

{“$grp:$st->$end”} = $slk

grpi:startj->endk slk

Each path is assigned a unique PID, which is storedexactly the same way ( %{$pid_of[$path_type]}–>{…} )

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WebTA Design: Main Script Flow (2a)

– “Similar” (Identify elements in the name that are exactly the same)• Bus situation: abc[0] is similar to abc[12] • Multiple instantiations: u_dlm0/abc[0] is similar to u_dlm2/abc[3]

Transformed to a canonical form where digits are replaced by ‘#’– Perl: s/\d+/#/g

smry.tmp file

Main task in Step 2: Suppressing “similar” paths

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WebTA Design: Main Script Flow (2b)

Read back the already sorted endpt summaries from the tmp fileSave all lines to be printed to the array @smry_lines

– For path lines, generate the canonical form ($path_pi) for $st->$end

– First time see $path_pi => to be printed, save the path

Suppressing similar paths (cont.)

Save paths whose $path_pi already seen in a temp arrayAt end of each group, generate the similar path msg and put it into

the @add_line array using $path_pi’s index to the @smry_lines array

– Remember the index to @smry_lines associated with $path_pi

Print lines in @smry_lines and @add_lines together later

%line_no_of

i$path_pi

123u_sns_bs/ll#/sns_

@add_linemsg addedi

123 *** 3 similar paths

R-R_SG15122

… …

@smry_lineslines to be printedi

123 clk_dei-bs2_rbc1 –2

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Webization-1: HTML Tagging

Simple HTML header to disable formatting

<html><head></head><body bgcolor=#FFFFE0><pre>

and displayed text

Labeling and targeting

<frameset rows=15%,25%,60%> <frame name=stat src='webta_stat.html'> <frame name=smry src='webta_smry.html'> <frame name=detail src=webta_detail.htm

webta.html . . .<a href=webta_smry.html #R-R_SG9 target =smry>R-R_SG9</a>. . .

webta_stat.html

webta_smry.html

. . .<a name=R-R_SG9> R-R_SG9: Num of ...

Group ID is used in link,Group ID

label,

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Webization-2: CGI Basic

httpd (server)

static html

browser

executable

when req starts with cgi-bin/*

var1 = val1 var2 = val2. . .

FORM

var1 = val1 var2 = val2. . .cgi-lib.pl

perl script

Server passes req info thru ~20 env variables: QUERY_STRING REQUEST_METHOD CONTENT_LENGTH …

Program returns a header (+ content): Content-type: text/html

or Location: <URL>Header must end with a blank line.

CGI(Common Gateway Interface)

GET: Form data appended to URL, limited sizeREQUEST_METHOD

POST: Form data not passed thru URL, unlimited size; program obtains form data thru STDIN

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Webization-3: Adding GUI Widgets

• <form action=url method=get|post [target=frame]>

• </form>

• <textarea rows=# cols=# name=name> … </textarea>

• <input type=gui_type name=var value=val>

• <select name=var > options </select>

Options: <option value=val [selected]> … </select>

size=# maxlength=#

Additional Attributes

checked

checked

checkbox

submit/reset

radio

text

button (In 4.0: button becomes a form object itself)

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output display

CGI Script to Generate F/M-Paths (1)

browser

--------<a name=R-R_SG6>R-R_SG6: Num of [distinct] paths = 1, Total slacks clk_pci-clk_sgp -0.33 <a target=detail href=webta_detail1.html <input type=radio name=PType_R-R_S9325 value=false_path> False <input type=radio name=PType_R-R_S9325 value=mcycle_path> Multi- <input type=radio name=PType_R-R_S9325 value=0> Reset <input type=checkbox name=R-R_S9325_from value=u_pci/pci_io/ipci <input type=checkbox name=R-R_S9325_to value=u_pci/pci_dec/ipci_ *** 3 similar start-end-pts (<a target=detail href=webta_l <input type=checkbox name=R-R_S9325_from_Pi value=u_pci/pci_io <input type=checkbox name=R-R_S9325_to_Pi value=u_pci/pci_dec/ --------

{

html source

R-R_S9325

R-R_S9325

PType_R-R_S9325=false_pathR-R_S9325_from=u_pci/pci_IR-R_S9325_to=u_pci/pci_dec

to server

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CGI Script to Generate F/M-Paths (2)

cgi-lib.pl

2.Recover the PIDs from PType_PID key-value pairs and separate them into false/mcycle path groups

3.For each PID in each group, write out the set_false/multicycle_path command and the -from/-to args, with the values derived from the PID_from[_pi]/PID_to[_pi] variables if they exist

1.Output the CGI header

Script flow of gen_xcpt_paths

%value_of

PType_R-R_S9325R-R_S9325_fromR-R_S9325_to

key valuefalse_path

u_pci/pci_io/ipci_c_be_reg_0_u_pci/pci_dec/ipci_par_reg_3_

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WebTA/WebChip: Demo

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Conclusions

The design of WebTA/WebChip utilities presented– Data I/O– Main script flow– Webization techniques

• HTML and Web GUI widget basics

• CGI to enable user interaction with web-based info

Web interface of synthesis/STA results to provide– Hierarchically organized timing and other statistics information– Top-down, directed, immediate access to any level of details– “Similar” timing path recognition to reduce amount of data– From timing viol reports to false/multicycle path spec via CGI

Help to speed up constraints development to achieve FTAT– Demo example: DB: 80+MB ~3MB ; Viol paths: 31k 1.4k