Eggleston 1

Waveguide-Integrated Optical Antenna

nanoLEDs for On-Chip Communication

Michael Eggleston, Kevin Messer, Seth Fortuna, Eli

Yablonovitch, Ming C. Wu

Department of Electrical Engineering and Computer Sciences

University of California Berkeley

Eggleston 2

Power Consumption in Modern CPUs

• 50% - 80% of CPU power dissipation is in wire interconnects

• Energy Required to charge a wire ~CV2

• Minimum energy to send one bit across a chip:

Intel’s 45nm Process Interconnect Layers

(Source: Intel)

CV2 ≈ 2pF

cm∗ 1cm ∗ 1V

2

= 𝟐𝒑𝑱

Concept Drawing of 3D Integrated

Processor with Optical Interconnects

(Source: IBM)

= 𝟐𝒂𝑱

17 photons @ 0.8eV/photon ≈

Eggleston 3

Optical Source for Energy-Efficiency

Interconnect

Semiconductor Laser:

• Excessive energy consumption

due to bias current

• e.g., for lasers with 1µA

threshold, and bias at 5x

threshold, E ~ 400 aJ/bit at

10Gbps

Optical antenna-enhanced

nanoLED:

• No bias current

• Optical antenna enhance

bandwidth by up to 1000x

(10 to 100 Gbps possible)

• Energy consumption ~2x

photon energy

Semiconductor

Emitter

Semiconductor

Emitter

Eggleston 4

Arch-Dipole Antenna Based nanoLED

LC matching circuit

Antenna Arms

InGaAsP

Gold

Optical Antenna Expected Enhancement:

Eggleston, et. al, IEEE 23rd ISLC (2012).

InGaAsP

TiO2

Optical Emission Spectra

1200 1300 1400 1500 16000

500

1000

1500

2000

Counts

Wavelength (nm)

35x

Bare

Antenna

Antenna Coupled

Bare Ridge

150nm

Free-Standing Structure

𝜏𝑜𝜏=1

4

𝐿

𝑑

2

≈ 33𝑥

Gap Spacing (d) = 35nm

Length (L) = 400nm

Eggleston 5

InP Waveguide Design

InP

InGaAsP Arch-Antenna

z

x y

Arch-Dipole on InP Substrate

n = 3.1

n = 1

InGaAsP

Arch Antenna

z

x En

erg

y D

en

sity (

dB

)

0-

-20-

n = 1

n = 1.56 z

x

Arch-Dipole on InP Waveguide 57%

15%

Radiated

Power 14% 14%

z

x y

3.5%

96.5%

Radiated

Power

InP Waveguide

Eggleston 6

InP Waveguide Design

Thicker InP Substrate

38%

13%

Radiated

Power 24.5% 24.5%

InP Waveguide

n = 1.56

n = 1

z

x

z

x y

Yagi-Uda Structure 22%

13%

Radiated

Power 50% 15%

z

x y

n = 1

z

x

n = 1.56

InP Waveguide

Eggleston 7

Waveguide Fabrication

Etch InGaAsP ridge and

deposit antenna

InGaAs Etch Stop

InP Substrate

Wet-etch InP

Waveguide

InGaAs Etch Stop

InP Substrate

InP InP

InGaAsP Arch-Antenna InGaAsP

Ridge

Bond to carrier wafer

and remove substrate

InP InP

n = 1.56

n = 1

150nm

InGaAsP Ridge

Arch-Antenna

InP

Waveguide

200nm InP Waveguide

InGaAsP

Hardmask

Eggleston 8

InP Waveguide

250nm

Optical Emission Measurements

Linear

InGaAs CCD

Waveguide-

Coupled Antennas

fs-Laser Probe

Sample probed with a

720nm Ti:Sapphire fs-

pulsed laser from the

back-side.

100x

NA 0.8

100x

NA 0.8

Optical emission is

collected with a front-side

0.8NA objective and

imaged on a LN-cooled

CCD.

Eggleston 9

Total Light Emitted From Waveguide

Coupled nanoLED

1100 1200 1300 1400 15000

1000

2000

3000

4000

5000

6000

7000

Counts

Wavelength (nm)

12x

Bare

Antenna

Yagi-Uda

Expected Enhancement:

Gap (d) = 40nm, Length (L) = 300nm

𝜏𝑜𝜏=1

4

𝐿

𝑑

2

≈ 𝟏𝟒𝒙

Bare InGaAsP

Ridge

100nm

Antenna Coupled

Yagi-Uda Coupled

Eggleston 10

Optical Emission Spatial Map

Uncoupled Light

50um z

x

Backward-coupled Light Forward-coupled Light

Distance Along Waveguide(um)

Counts

-30 -20 -10 0 10 20 300

15000

30000

0

15000

30000

0

15000

30000

10sec Integration

η𝑐𝑜𝑢𝑝𝑙𝑖𝑛𝑔 ≈ 50%

η𝑐𝑜𝑢𝑝𝑙𝑖𝑛𝑔 ≈ 50%

𝜼𝒄𝒐𝒖𝒑𝒍𝒊𝒏𝒈 ≈ 𝟕𝟎%

𝐹𝑟𝑜𝑛𝑡𝐵𝑎𝑐𝑘 = 1.6 ∶ 1

∗

*3:1 with narrower waveguides

Bare InGaAsP

Ridge

100nm

Antenna Coupled

Yagi-Uda Coupled

Eggleston 11

Integration with Silicon Photonics

• Epitaxial Lift-off is used to transfer III-V chips to

Silicon substrates

InP Substrate

III/V Epi Layer

Carrier

III/V Epi Layer

Silicon

III/V Epi Layer

Grow an epitaxial

film on InP

Bond chip to

temporary carrier

Transfer Epi to Silicon

and remove Carrier

100nm

InP/InGaAsP

Epitaxial Layer

Silicon

Al2O3

Cross-sectional SEM

InP Substrate

Carrier

III/V Epi Layer

Remove InP

Substrate

Eggleston 12

Silicon Photonics with Active III/V Material

• Silicon wafers and Silicon processing technology

can be used to make large-area photonics chips

with active III/V Matieral

1mm

InGaAsP

InP

Al2O3

Silicon

500nm

Top View SEM of Fabricated

III/V on Silicon Waveguides

Perspecive SEM of III/V on a

Silicon Waveguide

Eggleston 13

Summary

• Demonstrated a nanoLED with enhanced

spontaneous emission coupled to a multi-mode InP

Waveguide

– 70% Coupling Efficiency

– 50% Forward coupling

– Directional emission of 3:1

• Future Work

– Integrate nanoLED with single mode waveguide on Silicon

Photonics platform

Eggleston 14

Acknowledgements

• Financial support from:

– NSF Science and Technology Center for Energy Efficient

Electronics Science (E3S)

– AFOSR

• Support from BSAC and the Berkeley Marvell Nanolab