VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

10
Matthew R. Guthaus Department of Computer Engineering, University of California Santa Cruz http://vlsida.soe.ucsc.edu VLSI-SOC 2012 Update http://vlsisoc2012.soe.ucsc.edu

description

VLSI-SOC 2012 Update http://vlsisoc2012.soe.ucsc.edu. Status. Dates Oct. 7-10, 2012 Expectations 1 first evening reception (Oct 7) + 3 days (Oct 8-10) 100-120 on-site guests 40 rooms in hotel others assumed to get hotels nearby - PowerPoint PPT Presentation

Transcript of VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Page 1: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

Department of Computer Engineering, University of California Santa Cruz

http://vlsida.soe.ucsc.edu

VLSI-SOC 2012 Updatehttp://vlsisoc2012.soe.ucsc.e

du

Page 2: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Status

•Dates•Oct. 7-10, 2012•Expectations•1 first evening reception (Oct 7) + 3 days (Oct 8-10)

•100-120 on-site guests• 40 rooms in hotel• others assumed to get hotels nearby

•Up to 50 more off-site guests from Silicon Valley (no lodging)

2

Page 3: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Hotel

•Dream Inn –$159/night, recently remodeled, close, ocean view•http://www.dreaminnsantacruz.com•Will provide other “low cost” hotels, but won’t have reserved room block

3

Page 4: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Hotel Pictures

4

Page 5: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Meeting SpaceFloorplan

•Conference held at the hotel•3 Meeting rooms (with Ocean view)•3,500 square feet•Up to 250 people•We will divide these 3 rooms into a large and small session room

5

Page 6: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Menus

•Menus are already selected• Daily continental breakfast and lunch buffet• Dinner one night• Afternoon coffee breaks

6

Page 7: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

EasyChair

•Submission web site is up…•https://www.easychair.org/account/signin.cgi?conf=vlsisoc2012

•Linked on the main web site.•Also linked to IEEE paper templates.•Two special sessions:•Memristive computing•Open source tools and methodologies for research

7

Page 8: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Keynote Speakers

•Two confirmations•Yusuf Leblebici, EPFL•Luigi Capodieci, Global Foundries•Recruiting a third keynote

8

Page 9: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Registration via web site

•Payments will be made through Paypal•UCSC already has a registration module for web site that has been tested and used for similar sized events•Should be up on web site by paper submission deadline

•Similar fees to past years•Added single day registrations to encourage Silicon Valley visitors

9

Early Registration (before Sept 1, 2012)Member $525Non-Member $725Student Member $325Student Non-Memberr $525Day Registration (No Dinner) $300

Late Registration (on or after Sept 1, 2012)Member $725Non-Member $925Student Member $525Student Non-Memberr $725Day Registration (No Dinner) $300

Additional Banquet Ticket $50

Page 10: VLSI-SOC 2012 Update vlsisoc2012.soe.ucsc

Matthew R. Guthaus

IFIP WG 10.5 Meeting at DATE 2012VLSI-DAMarch 2012

Next Steps

•Please continue distributing CFP•Ayse Coskun as it at DATE•PhD forum information is up too… later deadline.•Submit papers via EasyChair•Review papers•TPC is set up•Working on the social event•Looked at whale watching boat tour, but it is too expensive/inconvenient

10


Photo by B. Koenemann 2005 VLSI-SoC 2016 Tallinn, Estonia Jaan Raik, Tallinn University of Technology.

Photo by B. Koenemann 2005 VLSI-SoC 2016 Tallinn, Estonia Jaan Raik, Tallinn University of Technology.

VLSI-SoC 2013 Program

VLSI-SoC 2013 Program

Embedded Memories based on SOC (VLSI Seminar)

Embedded Memories based on SOC (VLSI Seminar)

Introduction to VLSI 2020. 8. 17. · Introduction to VLSI ITI Ismailia Silicon technology roadmap low power SoC high performance MPU/SoC 2001 2004 2010 2001 2004 2010 gate length

Introduction to VLSI 2020. 8. 17. · Introduction to VLSI ITI Ismailia Silicon technology roadmap low power SoC high performance MPU/SoC 2001 2004 2010 2001 2004 2010 gate length

SOC Design Lab - VLSI Signal Processing Lab, EE, NCTUtwins.ee.nctu.edu.tw/courses/soclab_04/.../01_SoC... · SoC: System on Chip System A collection of all kinds of components and/or

SOC Design Lab - VLSI Signal Processing Lab, EE, NCTUtwins.ee.nctu.edu.tw/courses/soclab_04/.../01_SoC... · SoC: System on Chip System A collection of all kinds of components and/or

How to Test Complex VLSI/SoC - Yonsei Universitytera.yonsei.ac.kr/class/2010_1/lecture/Topic 12 DFT.pdf · How to Test Complex VLSI/SoC 2010 ... ATPG Scan hardware insertion Scan

How to Test Complex VLSI/SoC - Yonsei Universitytera.yonsei.ac.kr/class/2010_1/lecture/Topic 12 DFT.pdf · How to Test Complex VLSI/SoC 2010 ... ATPG Scan hardware insertion Scan

VLSI-SOC: FROM SYSTEMS TO CHIPS

VLSI-SOC: FROM SYSTEMS TO CHIPS

VLSI Algorithmic Design Automation Lab. THE TI OMAP PLATFORM APPROACH TO SOC.

VLSI Algorithmic Design Automation Lab. THE TI OMAP PLATFORM APPROACH TO SOC.

Matthew R. Guthaus Department of Computer Engineering, University of California Santa Cruz VLSI-SOC 2012 Update .

Matthew R. Guthaus Department of Computer Engineering, University of California Santa Cruz VLSI-SOC 2012 Update .

Research Laboratories Digital VLSI & SoC Design Lab ...soc.inha.ac.kr/images/Introduce.pdfDigital VLSI & Design Lab. 2000 Univ. of Minnesota( . •2005.02-2006.02 전자통신연구원(ETRI)

Research Laboratories Digital VLSI & SoC Design Lab ...soc.inha.ac.kr/images/Introduce.pdfDigital VLSI & Design Lab. 2000 Univ. of Minnesota( . •2005.02-2006.02 전자통신연구원(ETRI)

Robust Low Power VLSI R obust L ow P ower VLSI Aatmesh Shrivastava Taniya Siddiqua Incorporating Reliability in SoC Flow.

Robust Low Power VLSI R obust L ow P ower VLSI Aatmesh Shrivastava Taniya Siddiqua Incorporating Reliability in SoC Flow.

psnacet.edu.inpsnacet.edu.in/tt/pg/mevlsi/1.pdflpvlsi lib pdvlsi ece ece ece ece ece ece ece ece ece principal vlsi design lab cad soc cad vlsi ada ic soc rtes lib pdvlsi soc lp,'lsi

psnacet.edu.inpsnacet.edu.in/tt/pg/mevlsi/1.pdflpvlsi lib pdvlsi ece ece ece ece ece ece ece ece ece principal vlsi design lab cad soc cad vlsi ada ic soc rtes lib pdvlsi soc lp,'lsi

Kiyoung Choi (General Co-Chair) October 5, 2014 VLSI-SoC 2015 Report 23rd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)Daejeon,

Kiyoung Choi (General Co-Chair) October 5, 2014 VLSI-SoC 2015 Report 23rd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)Daejeon,

Robust Low Power VLSI R obust L ow P ower VLSI Memory Management Units for Instruction and Data Cache for OR1200 CPU Core Arijit Banerjee ASIC/SOC Class.

Robust Low Power VLSI R obust L ow P ower VLSI Memory Management Units for Instruction and Data Cache for OR1200 CPU Core Arijit Banerjee ASIC/SOC Class.

Mismanor : A Social Role-Playing Game April Grow agrow @ soe.ucsc

Mismanor : A Social Role-Playing Game April Grow agrow @ soe.ucsc

A.K. Kambham (imec), VLSI-T 2012 Lecture 8ee290d/fa13/LectureNotes/...Performance Embedded DRAM SoC Technology Featuring Tri-Gate Transistors and MIMCAP COB,” Symposium on VLSI Technology

A.K. Kambham (imec), VLSI-T 2012 Lecture 8ee290d/fa13/LectureNotes/...Performance Embedded DRAM SoC Technology Featuring Tri-Gate Transistors and MIMCAP COB,” Symposium on VLSI Technology

3. ASIC and SOC Design Methods: Structured VLSI Design Spring 2009 Rajesh K. Gupta.

3. ASIC and SOC Design Methods: Structured VLSI Design Spring 2009 Rajesh K. Gupta.

UC Santa Cruz School of Engineering soe.ucsc/classes/cmps171/Winter2011 ejw@cs.ucsc

UC Santa Cruz School of Engineering soe.ucsc/classes/cmps171/Winter2011 [email protected]

Spring 07, Jan 30 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 SOC Test Scheduling Vishwani D. Agrawal James.

Spring 07, Jan 30 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 SOC Test Scheduling Vishwani D. Agrawal James.

VLSI-SoC, Atlanta J. Dalmasso, ML Flottes, B. Rouzeyre CNRS/ Univ. Montpellier II France 1 17/10/2007.

VLSI-SoC, Atlanta J. Dalmasso, ML Flottes, B. Rouzeyre CNRS/ Univ. Montpellier II France 1 17/10/2007.