VCSEL I-V Test Subsystem - NI

USER MANUAL

VCSEL I-V Test SubsystemThe VCSEL I-V Test Subsystem provides a customizable solution to high-speed pulse testing on vertical-cavity surface-emitting laser(VCSEL) DUTs individually or testing on up to four VCSEL DUTs in parallel.

This manual contains an overview of the VCSEL I-V Test Subsystem and its components, procedures to set up and operate the subsystem, loadboard design guidelines, subsystem specifications, and additional reference information. Refer to ni.com/r/vcsel-docs or theVCSEL I-V Test Software Help, which is installed with the software, for API reference and example VI documentation.

ContentsVCSEL I-V Test Subsystem Overview...................................................................................................................................................................1

Subsystem Options..........................................................................................................................................................................................2Hardware Overview........................................................................................................................................................................................ 5Software Overview..........................................................................................................................................................................................7Theory of Operation........................................................................................................................................................................................7Measurement Overview.................................................................................................................................................................................. 8

Getting Started...................................................................................................................................................................................................... 13What You Need to Get Started...................................................................................................................................................................... 14Unpacking the VCSEL I-V Test Subsystem................................................................................................................................................. 15Installing Software........................................................................................................................................................................................ 16Connecting the PXIe-1092 to Safety Ground and a Power Source.............................................................................................................. 16Installing a Channel Expansion Kit...............................................................................................................................................................16Preparing the PXIe-4135 for Use with the NI-4134..................................................................................................................................... 17Installing the Safety Interlock Connector on the PXIe-4135........................................................................................................................ 17Testing the Safety Interlock...........................................................................................................................................................................18Grounding the NI-4134................................................................................................................................................................................. 18Connecting the NI-4134 to the PXIe-4135, the PXIe-8880, and Facility Power..........................................................................................18Installing the PCIe-8398 in Your Computer..................................................................................................................................................19Connecting the NI-4134 to the PXIe-4135, Your Computer, and Facility Power........................................................................................ 20

Performing Compensation and I-V Measurements...............................................................................................................................................21Performing System Compensation................................................................................................................................................................21Performing Pulse Compensation...................................................................................................................................................................22Connecting the NI-4134 and PXIe-5162 to a Load Board............................................................................................................................22Performing I-V Measurements......................................................................................................................................................................23

Load Board Design............................................................................................................................................................................................... 23Specifications........................................................................................................................................................................................................ 24

Definitions.....................................................................................................................................................................................................24Conditions..................................................................................................................................................................................................... 24Subsystem Pulse Generation Setting Specifications..................................................................................................................................... 25NI-4134 Specifications..................................................................................................................................................................................26BNC Cable Specifications.............................................................................................................................................................................26MXI-Express Interface Specifications.......................................................................................................................................................... 26Attenuator Specifications.............................................................................................................................................................................. 26Subsystem Component Specifications.......................................................................................................................................................... 27

Hardware Reference..............................................................................................................................................................................................27NI-4134 Front Panel......................................................................................................................................................................................27NI-4134 Back Panel...................................................................................................................................................................................... 28PXIe-5162 Front Panel..................................................................................................................................................................................28PXIe-4135 Front Panel..................................................................................................................................................................................29PXIe-1092 Front Panel..................................................................................................................................................................................31PXIe-1092 Back Panel.................................................................................................................................................................................. 31PXIe-8880 Front Panel..................................................................................................................................................................................32PCIe-8398 Front Panel..................................................................................................................................................................................33PXIe-8398 Front Panel..................................................................................................................................................................................33

Where to Go Next................................................................................................................................................................................................. 34

VCSEL I-V Test Subsystem OverviewThe VCSEL I-V Test Subsystem generates customizable high-speed pulse trains to characterize the current-voltage (I-V) relationship of aVCSEL DUT by measuring the pulse signal of the DUT.

The VCSEL I-V Test Subsystem provides the following two options to execute high-speed pulse testing on VCSEL DUTs:• VCSEL I-V Test PXI Subsystem on page 2• VCSEL I-V Test MXI Subsystem on page 3

http://www.ni.com/r/vcsel-docs

The content throughout this manual applies to all VCSEL I-V Test Subsystem options unless otherwise noted.

PXI Content applies to the VCSEL I-V Test PXI Subsystem.

MXI Content applies to the VCSEL I-V Test MXI Subsystem.

Subsystem Options

VCSEL I-V Test PXI SubsystemThe VCSEL I-V Test PXI Subsystem is a standalone subsystem that utilizes the following components:• PXIe-4135 source measure unit (SMU)• NI-4134 pulse generator• PXIe-5162 oscilloscope• PXIe-1092 chassis• PXIe-8880 controller• VCSEL I-V Test Software

For package test applications, you must design and supply a load board to use with the VCSEL I-V Test PXI Subsystem. Refer to the LoadBoard Design section to view a reference load board design and understand guidelines for the load board design.

Figure 1. PXI Subsystem Package Test Block Diagram

Attenuator

PXIe-1092 Chassis

PXIe-8880Controller

USB

PXIe-5162Oscilloscope

BNC

PXIe-4135SMU

Triax Triax

NI-4134Pulse Generator

BNCUSB

BNC

TriaxTriax

50 Ω

50 Ω

Force HI

Sense HI

Primary OUT

Secondary OUT

Remote Sense

Load BoardBNC BNC

BNC

PXI

Table 1. PXI Subsystem Package Test Block Diagram Key

Hardware Block Load Board Block DUT I/O I/O Connector

Resistor Switch Measurement Signal Data

For wafer test applications, the NI-4134 and PXIe-5162 use differential probes to probe each die on the wafer directly.

2 | ni.com | VCSEL I-V Test Subsystem

Figure 2. PXI Subsystem Wafer Test Block Diagram

Attenuator

PXIe-1092 Chassis

PXIe-8880Controller

USB


BNC

PXIe-4135SMU

Triax Triax


BNCUSB

BNC

TriaxTriax

50 Ω

50 Ω

Differential Probe

Differential Probe

Differential Probe

Wafer

Chuck

Anode

Cathode

Differential Probe

Differential Probe

Differential Probe

Force HI

Sense HI

Primary OUT

Secondary OUT

Remote Sense

PXI

Table 2. PXI Subsystem Wafer Test Block Diagram Key

Hardware Block Wafer Block DUT I/O I/O Connector


Ground

VCSEL I-V Test MXI SubsystemThe VCSEL I-V Test MXI Subsystem integrates with your computer by utilizing the following components:• PXIe-4135 source measure unit (SMU)• NI-4134 pulse generator• PXIe-5162 oscilloscope• PXIe-1092 chassis• MXI-Express Gen-3 x16 system consisting of a PCIe-8398 host interface card and a PXIe-8398 remote control module

Note The VCSEL I-V Test MXI Subsystem includes only one PXI chassis. To connect multiple PXI chassis to your computer,refer to the MXI-Express Gen-3 x16 User Manual.

• VCSEL I-V Test Software

For package test applications, you must design and supply a load board to use with the VCSEL I-V Test MXI Subsystem. Refer to the LoadBoard Design section to view a reference load board design and understand guidelines for the load board design.

VCSEL I-V Test Subsystem | © National Instruments Corporation | 3

https://www.ni.com/r/mxi-user-manual

Figure 3. MXI Subsystem Package Test Block Diagram

Attenuator

PXIe-1092 Chassis

PXIe-8398Control Module

Connector


BNC

PXIe-4135SMU

Triax Triax


BNCUSB

BNC

TriaxTriax50 Ω

50 Ω

Force HI

Sense HI

Primary OUT

Secondary OUT

Remote Sense

Load BoardBNC BNC

BNC

MXI

PCIe-8398Host Interface Card

PC

Connector

USB

Table 3. MXI Subsystem Package Test Block Diagram Key

Hardware Block Load Board Block DUT I/O I/O Connector


For wafer test applications, the NI-4134 and PXIe-5162 use differential probes to probe each die on the wafer directly.

Figure 4. MXI Subsystem Wafer Test Block Diagram

Attenuator

PXIe-1092 Chassis


BNC

PXIe-4135SMU

Triax Triax

PXIe-8398Control Module

Connector


BNCUSB

BNC

TriaxTriax50 Ω

50 Ω

Differential Probe

Differential Probe

Differential Probe

Wafer

Chuck

Anode

Cathode

Differential Probe

Differential Probe

Differential Probe

Force HI

Sense HI

Primary OUT

Secondary OUT

Remote Sense

MXI

PCIe-8398Host Interface Card

PC

Connector

USB


Table 4. MXI Subsystem Wafer Test Block Diagram Key

Hardware Block Wafer Block DUT I/O I/O Connector


Ground

Hardware OverviewThe VCSEL I-V Test Subsystem comprises the following hardware:• NI-4134 Pulse Generator—The NI-4134 is a pulse generator that receives voltage from an external PXIe-4135 SMU and generates high-

speed current pulses proportional to that voltage. This manual contains an overview of NI-4134 functionality when used as a componentof the VCSEL I-V Test Subsystem. Refer to the NI-4134 product certifications for more information about this pulse generator.

• PXIe-4135 Source Measure Unit—The PXIe-4135 is a high-precision, system source measure unit (SMU) that features 4-quadrantoperation, sources up to 20 W of DC power, and can pulse up to 500 W. Refer to the PXIe-4135 documentation for more in-depthinformation about this SMU.

• PXIe-5162 Oscilloscope—The PXIe-5162 high-speed oscilloscope device has four channels that sample at up to 5 GS/s with flexiblesettings for coupling, voltage range, and filtering. Refer to the PXIe-5162 documentation for more in-depth information about thisoscilloscope.

• PXIe-1092 Chassis—The PXIe-1092 chassis combines a high-performance 9-slot PXI Express backplane with a high-output powersupply and a structural design that has been optimized for maximum usability in a wide range of applications. Refer to the PXIe-1092documentation for more in-depth information about this chassis.

• PXI PXIe-8880 Controller—The PXIe-8880 is a high-performance embedded controller for use in PXI Express systems. Refer to the PXIe-8880 documentation for more in-depth information about this controller.

• MXI MXI-Express Gen-3 x16 System—The MXI-Express Gen-3 x16 system in the VCSEL I-V Test MXI Subsystem consists of aPCIe-8398 installed in a computer and connected to a PXIe-8398 in a PXI chassis.– PCIe-8398 Host Interface Card—The PCIe-8398 host interface card is installed in an external host and connected to the PXIe-8398

remote control module in order to control the PXI Express system. Refer to the PCIe-8398 documentation for more in-depthinformation about this host interface card.

– PXIe-8398 Remote Control Module—The PXIe-8398 is a PXI Express Gen-3 x16 remote control module that enables the controlof a PXI Express system from an external host such as a desktop PC, rackmount controller, or a separate master chassis, with asustained throughput up to 13.7 GB/s. Refer to the PXIe-8398 documentation for more in-depth information about this remote controlmodule.

Note Refer to the MXI-Express Gen-3 x16 User Manual for safety information about the PCIe-8398 on page 24 and thePXIe-8398 on page 28.

This manual contains only detailed reference information for the instrumentation when used together as a VCSEL I-V Test Subsystem. Ifneeded, refer to the product documentation for each subsystem component to review more in-depth information.

NI-4134 Operation ModeThe NI-4134 utilizes the fast positive pulse mode and fast negative pulse mode during DUT tests as part of the VCSEL I-V Test Subsystem.

Fast positive pulse mode and fast negative pulse mode generate pulses with either positive or negative polarity, respectively. These modes routepulses from the PXIe-4135 to the HIGH SPEED PULSE PRIMARY and HIGH SPEED PULSE SECONDARY outputs on the NI-4134 backpanel.

NI-4134 Impedance ConfigurationsThe NI-4134 has two impedance configurations suitable for different applications: full impedance and half impedance.

The impedance configuration of the NI-4134 is not software selectable; it is determined by the physical connections you make to the HIGHSPEED PULSE PRIMARY and HIGH SPEED PULSE SECONDARY outputs.

The ultimate impedance the NI-4134 provides at the DUT depends on which impedance configuration you are using and therefore the design ofyour DUT load board.

The following table summarizes the impedance configurations and their applications.


http://www.ni.com/r/4134-doc-search



http://www.ni.com/r/0nthri



https://www.ni.com/r/pcie-8398-doc-search

http://www.ni.com/r/pxie8398-doc-search

https://www.ni.com/r/mxi-user-manual

ImpedanceConfiguration

How to Configure Impedance Magnitude Application

Full impedance Connect HIGH SPEED PULSE PRIMARY to the DUT loadboard. Leave HIGH SPEED PULSE SECONDARYdisconnected.

50 Ω at the DUT Improving current outputresolution

Half impedance Connect both HIGH SPEED PULSE PRIMARY and HIGHSPEED PULSE SECONDARY to the DUT load board.

25 Ω at the DUT Enabling pulses of highercurrent

PXIe-4135 Safety Guidelines for System Design and ImplementationCaution Always refer to the specifications document for your device before connecting signals. Failure to observe the specifiedmaximum signal ratings can cause shock, a fire hazard, or damage to the devices connected to the PXIe-4135. NI is not liable for anydamage or injuries resulting from incorrect signal connections.

The PXIe-4135 is capable of generating hazardous voltages and working within hazardous voltage systems. It is the responsibility of thesystem designer, integrator, installer, maintenance personnel, and service personnel to ensure the system is safe during use.• Ensure operators cannot access the PXIe-4135, cables, the device under test (DUT), or any other instruments in the system while

hazardous voltages are present.• Operator access points can include, but are not limited to, guards, gates, sliding doors, hinge doors, lids, covers, and light curtains.• If using a test fixture enclosure, ensure that it is properly connected to safety ground.• Ensure that the PXIe-4135 is properly secured to the chassis using the two front panel mounting screws.• Double insulate all electrical connections that are accessible by an operator. Double insulation ensures protection if one layer of insulation

fails. Refer to IEC 61010-1 for specific insulation requirements.

PXIe-4135 Safety Interlock System IntegrationThe PXIe-4135 includes a safety interlock circuit that places the outputs of the SMU in a safe state, regardless of the programmed state of themodule.• Do not short the safety interlock pins directly at the connector under any circumstances.• Confirm on a regular basis that the safety interlock is functioning by performing a safety interlock test.• Install mechanical detection switches that open the safety interlock circuit when the operator attempts to access the test fixture, disabling

the hazardous voltage ranges of the instrument.• Ensure the mechanical detection switches close the safety interlock circuit only when the operator has properly closed all entry points to

the test fixture enclosure, enabling hazardous voltage ranges on the instrument.

Figure 5. System Level Connection, Typical

12

Safety Interlock Connector

Test Fixture Enclosure

Operator Access Door

Mechanical Detection Switches

Mechanical detection switch is actuatedby operator access point

34

1. Safety Interlock Input2. Safety Interlock Ground

3. Safety Interlock Pass Thru - Input4. Safety Interlock Pass Thru - Ground

Mechanical Detection Switch Recommendations

• Use high-reliability, fail-safe, normally open mechanical detection switches on all access points to the test fixture enclosure.• Use two normally open switches wired in series so that a single switch failure does not compromise safety protections.• Isolate switches so the operator cannot trigger or bypass the switches without the use of a tool.• Ensure the switches' certifications meet your test application requirements. NI recommends UL-certified safety switches to ensure

reliability.


• Install the switches in accordance with the switch manufacturer specifications.• Test the switches periodically to ensure proper implementation and reliability.

Related Information

Installing the Safety Interlock Connector on the PXIe-4135 on page 17

PXIe-4135 Safety Guidelines for System OperationCaution Hazardous voltages of up to the maximum voltage of the PXIe-4135 may appear at the output terminals if the safetyinterlock terminal is closed. Open the safety interlock terminal when the output connections are accessible. With the safety interlockterminal open, the output voltage level/limit is limited to ±40 V DC, and protection will be triggered if the voltage measured betweenthe device HI and LO terminals exceeds ±(42 Vpk ±0.4 V).

Caution Do not apply voltage to the safety interlock connector inputs. The interlock connector is designed to accept passive,normally open contact closure connections only.

To ensure a system containing the PXIe-4135 is safe for operators, components, or conductors, take the following safety precautions:• Ensure proper warnings and signage exist for workers in the area of operation.• Provide training to all system operators so that they understand the potential hazards and how to protect themselves.• Inspect connectors, cables, switches, and any test probes for any wear or cracking before each use.• Before touching any of the connections to the high terminal or high sense on the PXIe-4135, discharge all components connected to the

measurement path. Verify with a DMM before interaction with connections.

Software OverviewUse the VCSEL I-V Test Software to develop and deploy VCSEL I-V test applications. The VCSEL I-V Test Software enables you to interactwith the VCSEL I-V Test Subsystem, perform compensation, and execute I-V measurements in serial or parallel mode.

The VCSEL I-V Test Software contains the following components:• VIs—VCSEL I-V Test VIs provide programmatic support for creating VCSEL I-V test applications. Use the VCSEL I-V Test VIs to

create customized applications. To access the VCSEL I-V Test VIs, select View »Functions Palette and navigate to User Libraries »VCSEL I-V Test from the block diagram in LabVIEW.

• Example VIs—Example VIs demonstrate common VCSEL I-V test application types and programming techniques. You can modify anexample VI to fit an application, or you can copy and paste from one or more example VIs into a VI that you create. Use the NI ExampleFinder, available by selecting Help »Find Examples in LabVIEW, and navigate to Toolkits and Modules »VCSEL I-V Test to browsethe example VIs. You can also locate the example VIs in the labview\examples\VCSEL I-V Test directory.

Theory of OperationDuring test execution, the PXIe-4135 generates a voltage of up to 125 V to charge the pulse buffer circuit on the NI-4134. Once the pulsebuffer circuit is fully charged, the NI-4134 is ready to produce high speed electrical pulses. The high speed primary and secondary NI-4134outputs can each drive a pulse train of up to 2.1 A as long as the VCSEL forward voltage remains below 3.1 V.

The settings for each pulse in a pulse train are identical. A pause between each pulse train is required to prevent theVCSEL I-V Test Subsystem and the DUT from overheating. Refer to the Specifications section for more information about pulse trains,including burst time, break time, pulse setting restrictions, current programming, and voltage measurement range.

The following figure displays an example of a pulse train within a single pulse burst, which lasts less than one millisecond.


Figure 6. Pulse Train Diagram

Burst Time< 1 ms

Burst Time< 1 ms

Burst Time< 1 ms

Break Time Break Time

Pulse Train

Burst Period≥ 5 ms

The PXIe-5162 measures the DUT voltage at the moment the pulse reaches the DUT. This voltage measurement passes through a 30 dBattenuator on the PXIe-5162 front panel, which protects the PXIe-5162 from damage. The VCSEL I-V Test Subsystem then applies analgorithm to derive the DUT current using the DUT voltage and parameters gathered during the subsystem measurement compensationprocedures.

Note When the PXIe-5162 measures the DUT voltage, the PXIe-5162 meanwhile generates a digital trigger that other devices candetect. The VCSEL I-V Test Subsystem supports exporting a digital trigger to only PFI 0 or PFI 1 on the front panel of thePXIe-5162.

Two measurement compensation procedures are required to set the pulse current amplitude in order to accurately measure the I-V relationshipof the DUT. These compensation procedures characterize pulse trains with an open circuit, a shorted circuit, and a known-good DUT circuit.Refer to the Measurement Compensation section for more information about the VCSEL I-V Test Subsystem measurement compensation.

Measurement OverviewThe VCSEL I-V Test Subsystem allows high-speed pulse testing on up to four channels. Subsystems that contain multiple channels can utilizeeither serial mode to enable higher sample rate or parallel mode to enable higher throughput during test execution.

Measurement CompensationThe VCSEL I-V Test Subsystem requires system compensation and pulse compensation before the subsystem can perform I-V measurementson VCSEL DUTs. System and pulse compensation gathers data about subsystem components and pulse settings to characterize subsystemperformance and ensure accurate I-V measurements during test execution.

System compensation characterizes subsystem components, including the NI-4134 pulse generator, the PXIe-5162 oscilloscope, attenuators,and the BNC cables that connect these components to the load board. Perform system compensation if any connections within theVCSEL I-V Test Subsystem change, such as a cable replacement, or if the facility environment exceeds the environmental specifications for thesubsystem.

Pulse compensation characterizes the specified pulse train with an open circuit, a shorted circuit, and a known-good DUT circuit. Then, thesubsystem uses the compensation data to adjust the voltage output of the PXIe-4135 SMU in order to generate a pulse with the specifiedcurrent amplitude.

Perform pulse compensation after any changes to the settings for the pulse measurements that the VCSEL I-V Test Subsystem executes or afterany changes to the subsystem mode of operation. You can use the VCSEL I-V Test Software to perform system compensation and pulsecompensation.

Related Information

Performing System Compensation on page 21

Performing Pulse Compensation on page 22

Channel ConfigurationsThe VCSEL I-V Test Subsystem can support one channel or multiple channels for DUT testing, depending on the subsystem hardwareconfiguration.


The quantity of NI-4134 pulse generators and PXIe-4135 source measure units (SMU) in the subsystem determines the number ofmeasurement channels in the subsystem.• Channel Configurations for the VCSEL I-V Test PXI Subsystem on page 9• Channel Configurations for the VCSEL I-V Test MXI Subsystem on page 10

Related Information

Serial Operation Mode on page 12

Parallel Operation Mode on page 13

Channel Configurations for the VCSEL I-V Test PXI SubsystemA one-channel PXI subsystem configuration utilizes a single NI-4134 pulse generator and PXIe-4135 SMU and requires a connection to thePXIe-5162 oscilloscope, a connection to the PXIe-8880 controller, and a connection to the DUT. This one-channel subsystem can only test oneDUT at a time.

Figure 7. One-Channel PXI Subsystem Configuration Connection Diagram

BNC BNC

BNC

CH 0

50Ω: 5 Vpk MAX1MΩ: 42 Vpk MAX

CH 1

CH 2

CLKIN

PFI0

1OUT

NI PXIe-51621.5 GHz Oscilloscope

CH 3

ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI

SAFETY INTERLOCK3.3 V MAX

OUTPUT

3 A Pulse MAX

250 V MAX to

PXIe-4135Precision System SMU

±200 V , 1 A,

PeripheralExpansion Slot

Provides PowerFor Multi-Slot

Modules, ReferTo User Manual

For Details

PS FANSTEMPFANS FANS PXIe-1092

4 H 5 H3 H2 H

1 6 H 7H

8H

9 H

NI PXIe-8880Embedded Controller

10/100/1000

USER1USER2

PWR OK/FAULTDRIVEGPIB

10/100/1000

TRIG

RESET

ACT/LINK

1

ACT/LINK

2

Load BoardHIGH SPEED PULSE

TRIG OUT 0 TRIG OUT 1 TRIG IN

50 Ohm

10V MAX to150V MAX to

SECONDARY PRIMARY SCOPE OUT

1

4

2 5 3

6 7

8

55

PXI

1. PXIe-1092 chassis2. NI-4134 pulse generator3. Load board4. USB cable

5. BNC cable6. Force HI Triax cable7. Sense HI Triax cable8. 30 dB attenuator

Tip You can use the VCSEL I-V Test Subsystem One Channel Expansion Kit (s/n 866278-UPG1) to add a channel to thesubsystem, up to a maximum of four channels in a single PXIe-1092 chassis.

The multi-channel PXI subsystem configuration utilizes more than one NI-4134 pulse generator and PXIe-4135 SMU to test DUTs with higherthroughput than the one-channel configuration. This configuration requires a connection to a DUT for each subsystem channel. A multi-channel subsystem configuration typically includes four NI-4134 pulse generators and PXIe-4135 SMUs, but can also support two or threepairs of these instruments.


Figure 8. Multi-Channel PXI Subsystem Configuration Connection Diagram


4 H 5 H3 H2 H

1 6 H 7H

8H

9 H

NI PXIe-8880Embedded Controller

10/100/1000

USER1USER2

PWR OK/FAULTDRIVEGPIB

10/100/1000

TRIG

RESET

ACT/LINK

1

ACT/LINK

2

ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI


OUTPUT

3 A Pulse MAX

250 V MAX to


±200 V , 1 A,

ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI


OUTPUT

3 A Pulse MAX

250 V MAX to


±200 V , 1 A,

HIGH SPEED PULSE


50 Ohm



HIGH SPEED PULSE


50 Ohm



HIGH SPEED PULSE


50 Ohm



HIGH SPEED PULSE


50 Ohm



BNC BNC

BNC

Load Board

BNC BNC

BNC

Load Board

BNC BNC

BNC

Load Board

BNC BNC

BNC

Load Board

PXI

Channel Configurations for the VCSEL I-V Test MXI SubsystemA one-channel MXI subsystem utilizes a single NI-4134 pulse generator and PXIe-4135 SMU and requires a connection to the PXIe-5162oscilloscope, a connection to your computer, a connection between the PXIe-8398 remote control module and the PCIe-8398 host interfacecard installed in your computer, and a connection to the DUT. This one-channel subsystem can only test one DUT at a time.


Figure 9. One-Channel MXI Subsystem Configuration Connection Diagram

BNC BNC

BNC

CH 0


CH 1

CH 2

CLKIN

PFI0

1OUT


CH 3

ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI


OUTPUT

3 A Pulse MAX

250 V MAX to


±200 V , 1 A,

PXIe-8398

PWR/LINK

4

3

2

1

MXI-Express PeripheralExpansion Slot



For Details


4 H 5 H3 H2 H

1 6 H 7H

8H

9 H

Load BoardHIGH SPEED PULSE


50 Ohm



2

7

4 8 5

9 10

11

88

PXIe-8398

PWR/LINK

4

3

2

1

MXI-Express

6

1

MXI

41

3

1. PCIe-83982. PXIe-1092 chassis3. Host PC4. NI-4134 pulse generator5. Load board6. MXI-Express Gen-3 x8 cable

7. USB cable8. BNC cable9. Force HI Triax cable10. Sense HI Triax cable11. 30 dB attenuator

Tip You can use the VCSEL I-V Test Subsystem One Channel Expansion Kit (s/n 866278-UPG1) to add a channel to thesubsystem, up to a maximum of four channels in a single PXIe-1092 chassis.

The multi-channel MXI subsystem configuration utilizes more than one NI-4134 pulse generator and PXIe-4135 SMU to test DUTs withhigher throughput than the one-channel configuration. This configuration requires a connection to a DUT for each subsystem channel. A multi-channel subsystem configuration typically includes four NI-4134 pulse generators and PXIe-4135 SMUs, but can also support two or threepairs of these instruments.


Figure 10. Multi-Channel MXI Subsystem Configuration Connection Diagram


4 H 5 H3 H2 H

1 6 H 7H

8H

9 H

PXIe-8398

PWR/LINK

4

3

2

1

MXI-Express

ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI


OUTPUT

3 A Pulse MAX

250 V MAX to


±200 V , 1 A,

ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI


OUTPUT

3 A Pulse MAX

250 V MAX to


±200 V , 1 A,

HIGH SPEED PULSE


50 Ohm



HIGH SPEED PULSE


50 Ohm



BNC BNC

BNC

Load Board

BNC BNC

BNC

Load Board

BNC BNC

BNC

Load Board

BNC BNC

BNC

Load Board

HIGH SPEED PULSE


50 Ohm



HIGH SPEED PULSE


50 Ohm



MXI

1 4

Modes of Operation

Serial Operation ModeWhen serial operation mode is enabled, the VCSEL I-V Test Subsystem will interact with each measurement channel individually in a series.This mode enables each subsystem channel to utilize the maximum PXIe-5162 sample rate.

Note The subsystem operation mode does not affect the performance of a one-channel subsystem configuration.

Before testing can begin, the VCSEL I-V Test Subsystem must load system configuration information and pulse settings to initialize eachmeasurement channel. After the configuration information is loaded, the subsystem maps a specific NI-4134, PXIe-4135, PXIe-5162 channel,and other components to each subsystem channel.

During test execution, the subsystem uses the current settings you specify to generate pulses and measure signals channel-by-channel. After achannel completes an I-V measurement, the subsystem proceeds with the I-V measurement for the next channel.

Tip In serial operation mode, you can configure the PXIe-5162 to sample at up to 5 GS/s to provide optimal measurement qualityfor short pulse lengths, for example 5 ns.

Related Information

Channel Configurations on page 8


Parallel Operation ModeWhen parallel operation mode is enabled, the VCSEL I-V Test Subsystem configures the hardware in each subsystem channel simultaneouslybefore executing a pulse on each channel sequentially. This mode increases the test throughput of a multi-channel subsystem configuration.

Note The subsystem operation mode does not affect the performance of a one-channel subsystem configuration.

Before testing can begin, the VCSEL I-V Test Subsystem must load system configuration information and pulse settings to initialize eachmeasurement channel. After the configuration information is loaded, the subsystem maps a specific NI-4134, PXIe-4135, PXIe-5162 channel,and other components to each subsystem channel.

During test execution, the subsystem uses the current settings you specify to simultaneously generate pulses and measure signals on allchannels. After all channels complete the I-V measurement, the subsystem updates the current settings and proceeds with the next I-Vmeasurement.

In parallel operation mode, the maximum sample rate of the PXIe-5162 depends on the number of subsystem channels in theVCSEL I-V Test Subsystem. For example, the maximum sample rate per channel is up to 1.25 GS/s if all four subsystem channels are active. Ifonly channel 0 and channel 2 of the PXIe-5162 are active, the maximum sample rate per channel is up to 2.5 GS/s.

Note Refer to the Onboard Clock section of the PXIe-5162 Specifications for more information about sample rate ranges.

Related Information

Channel Configurations on page 8

Getting StartedRefer to the topics in this section to get started using the VCSEL I-V Test Subsystem. Complete the tasks in the following table in sequentialorder to ensure the VCSEL I-V Test Subsystem is ready for use.

Note If you are setting up a multi-channel subsystem configuration, you must repeat steps 5 through 10 in the following table foreach subsystem channel.

Table 5. VCSEL I-V Test Subsystem Set Up Process

Step Task Where to Go

1 Unpack the VCSEL I-V Test Subsystem. Unpacking the VCSEL I-V Test Subsystem on page 15

2 Install the VCSEL I-V Test Software. Installing Software on page 16

3 Connect the PXIe-1092 chassis to safety ground and a power source. Connecting the PXIe-1092 to Safety Ground and aPower Source on page 16

4 (If needed) Install a channel expansion kit. Installing a Channel Expansion Kit on page 16

5 Install the SMU LO/Sense LO connector assembly on the PXIe-4135. Preparing the PXIe-4135 for Use with the NI-4134 onpage 17

6 Install the safety interlock connector on the PXIe-4135. Installing the Safety Interlock Connector on thePXIe-4135 on page 17

7 Test the PXIe-4135 safety interlock connector. Testing the Safety Interlock on page 18

8 Connect the NI-4134 to safety ground. Grounding the NI-4134 on page 18

9 MXI Install the PCIe-8398 in your computer

Note If you are setting up the VCSEL I-V Test PXI Subsystem,skip this step.

Installing the PCIe-8398 in Your Computer on page 19

10 Perform only one of the following steps according to your subsystem option:• PXI Connect the NI-4134 to the PXIe-4135, the PXIe-8880, and facility

power.• MXI Connect the NI-4134 to the PXIe-4135, your computer, and facility

power.

Connecting the NI-4134 to the PXIe-4135, thePXIe-8880, and Facility Power on page 18

Connecting the NI-4134 to the PXIe-4135, YourComputer, and Facility Power on page 20

11 Perform system compensation. Performing System Compensation on page 21

12 Perform pulse compensation. Performing Pulse Compensation on page 22

13 Connect the NI-4134 and PXIe-5162 to the load board. Connecting the NI-4134 and PXIe-5162 to a LoadBoard on page 22

14 Perform an I-V measurement. Performing I-V Measurements on page 23



What You Need to Get StartedThe VCSEL I-V Test Subsystem is comprised of hardware components, software, and accessories which require assembly, installation, andsetup to prepare the subsystem to test VCSEL DUTs.

Hardware Components

The VCSEL I-V Test Subsystem is composed of the following hardware and instrumentation.• NI-4134 Pulse Generator (p/n 786944-01)• PXIe-4135 Source Measure Unit (p/n 783762-01)• PXIe-5162 Oscilloscope (p/n 782622-06)• PXIe-1092 PXI Chassis (p/n 784781-01)• PXI PXIe-8880 PXI Controller (p/n 783513-05)• MXI PCIe-8398 PCI Host Interface Card (p/n 784179-01)• MXI PXIe-8398 PXI Remote Control Module (p/n 784178-01)

The VCSEL I-V Test Subsystem can contain up to four NI-4134 pulse generators and PXIe-4135 SMUs. The number of pulse generators andSMUs in the subsystem corresponds to the number of subsystem channels that can perform I-V measurements during test execution.

PXI In the VCSEL I-V Test PXI Subsystem, the PXIe-5162, PXIe-8880, and each PXIe-4135 are installed in the PXI chassis during thesubsystem manufacturing process. During the subsystem set up process, you need to connect a standalone NI-4134 pulse generator to aPXIe-4135 and a load board with cables.

MXI In the VCSEL I-V Test MXI Subsystem, the PXIe-5162, the PXIe-8398, and each PXIe-4135 are installed in the PXI chassis during thesubsystem manufacturing process. During the subsystem set up process, you need to connect a standalone NI-4134 pulse generator to aPXIe-4135, your computer, and a load board with cables, install the PCIe-8398 to your computer, and connect the PCIe-8398 to the PXIe-8398.

NI offers a one-channel configuration and a four-channel configuration of the VCSEL I-V Test Subsystem, as well as an expansion kit to add achannel to a subsystem. Refer to the following table for part numbers of subsystem configuration options.

Table 6. Part Numbers of Subsystem Configuration Options

Subsystem Configuration Option Part Number

One-channel configuration PXI 866278-11 MXI 866278-21

Four-channel configuration PXI 866278-14 MXI 866278-24

Expansion kit 866278-UPG1

Load Board

The VCSEL I-V Test Subsystem requires a connection to a load board to test packaged VCSEL DUTs. You must design this load board foryour specific VCSEL I-V test application. Refer to the Load Board Design section to view a reference load board design and understand theload board design guidelines for the VCSEL I-V Test Subsystem.

Differential Probes

For wafer test applications, the NI-4134 and PXIe-5162 in the VCSEL I-V Test Subsystem require installation of a differential probe on eachinstrument BNC cable to execute wafer tests. You must supply the differential probes for your wafer test application. Ensure you usedifferential probes that can maintain 50 Ω impedance at the DUT.

Cables and Accessories

The following cables and accessories are required to set up the VCSEL I-V Test Subsystem.

Note The quantity of cables and attenuators included in the shipping kit corresponds to the channel configuration of theVCSEL I-V Test Subsystem. Refer to Channel Configurations for more information about cable connections and arrangement.

Table 7. VCSEL I-V Test Subsystem Cables and Accessories

Component Description Included in Kit?

BNC cables BNC (m)-to-BNC (m), RG-223, precision length tolerance, 2 m Yes

MXI MXI-Express Gen 3 x8 cable MXI-Express cable, Gen 3 x8, Copper, 3 m Yes

Triaxial cables Triax (m)-to-Triax (m), low noise, low leakage, 1 m Yes

USB cable Type A-to-Type B Yes

SMU output connector assembly LO/Sense LO output connector assembly Yes


Table 7. VCSEL I-V Test Subsystem Cables and Accessories (Continued)

Component Description Included in Kit?

SMU safety interlock connector Safety interlock to ensure PXIe-4135 outputs are in a safe state Yes

30 dB attenuator 30 dB fixed attenuator, BNC (m)-to-BNC (f), up to 3 GHz, 2 W Yes

Male BNC short connector Male BNC short connector required for system compensation procedure. Yes

Female BNC short connector Female BNC short connector required for system compensation procedure. Yes

NI-4134 grounding wire Grounding wire with ring lug for installation onto the NI-4134 front panel. Yes

NI-4134 power supply Power supply with a male connector for the NI-4134 front panel and an AC input. Yes

NI-4134 power cable AC power cable compliant with local standards No

PXIe-1092 chassis grounding wire 16 AWG wire to connect chassis to facility ground No

PXIe-1092 chassis power cable AC power cable compliant with local standards No

PXI PXIe-8880 DisplayPort cable DisplayPort 1.2 to connect PXI controller to a monitor No

PXI PXIe-8880 Ethernet cable Ethernet to connect PXI controller to the facility network No

Note Refer to the following part numbers to order additional cables, attenuators, or shorting caps.• Triaxial cable: 785659-01• BNC cables (x2): 787254-02• MXI-Express Gen 3 x8 cable (x1): 785550-03• VCSEL I-V Test Subsystem Replacement Accessories: 787883-01

– 30 dB Attenuator– Male BNC shorting cap– Female BNC shorting cap

Equipment

The following equipment is required for the subsystem set up process. This equipment is not included in the subsystem shipping kit.• #2 Phillips screwdriver• Insulation strip tool• Scissors, knife, or box cutter

Software

To perform high-speed pulse testing on the VCSEL I-V Test Subsystem, you need the following software:• VCSEL I-V Test Software• LabVIEW• NI-DCPower• NI-SCOPE• PXI Platform Services

You must install LabVIEW before installing VCSEL I-V Test Software.

Note Refer to the VCSEL I-V Test Software Readme for more information about compatible software versions.

Unpacking the VCSEL I-V Test Subsystem

Before you unpack the VCSEL I-V Test Subsystem, move the shipping container to the area in your facility where you will set up thesubsystem. Ensure there is adequate space around the container to unpack its contents.

Notice To prevent electrostatic discharge (ESD) from damaging the VCSEL I-V Test Subsystem while unpacking, ground yourselfusing a grounding strap or by holding a grounded object, such as your computer chassis.

Equipment

• Scissors, knife, or box cutter

Complete the following steps to unpack the VCSEL I-V Test Subsystem.1. Inspect the shipping container for damage.2. Open the shipping container.3. Cut open the anti-static barrier bag.


http://www.ni.com/r/vcselsoftware20.0.1rm

4. Remove each VCSEL I-V Test Subsystem component from the shipping container and inspect each component for any physical damage.

After you unpack the shipping container and inspect the shipment, dispose of the container and leftover packing materials per your facilitypolicies.

Note If you notice damage to the shipping container or its contents during inspection, file a claim with the shipment carrier. If youfile a claim, do not discard the shipping container or packing materials until your claim is resolved.

Installing SoftwareEnsure you have installed LabVIEW before you install the VCSEL I-V Test Software. Otherwise, you cannot find theVCSEL I-V Test Software on your computer.

Note Refer to the VCSEL I-V Test Software Readme to view the supported software versions for the VCSEL I-V Test Software.Refer to the LabVIEW Readme for information about installing and activating LabVIEW.

Complete the following steps to install the VCSEL I-V Test Software.1. Visit ni.com/r/vcsel-software-download to download and install the VCSEL I-V Test Software.

If you do not already have NI-DCPower, NI-SCOPE, and PXI Platform Services installed, NI automates installing NI-DCPowerNI-SCOPE, and PXI Platform Services when you install the VCSEL I-V Test Software.

2. Use the serial number on the Software Registration Card to activate the VCSEL I-V Test Software.

Note Refer to NI Software Activation to learn how to activate the VCSEL I-V Test Software.

Connecting the PXIe-1092 to Safety Ground and a Power SourceNote The PXIe-1092 chassis are designed with a three-position IEC 60320 C14 inlet for the U.S. that connects the ground line tothe chassis ground. For proper grounding, a suitable cordset must be used to connect this inlet to an appropriate earth safety ground.

If your power outlet does not have an appropriate ground connection, you must connect the premises safety ground to the chassis groundingscrew located on the rear panel.

Equipment

• Grounding wire (16 AWG)• #2 Phillips screwdriver• AC power cable

Complete the following steps to connect the PXIe-1092 chassis to safety ground and a power source.1. Connect a 16 AWG (1.3 mm) wire to the chassis grounding screw (#8-32 SEMS) using a grounding lug. The wire must have green

insulation with a yellow stripe or must be noninsulated (bare).2. Attach the opposite end of the wire to permanent earth ground using toothed washers or a toothed lug.3. Attach input power through the rear AC inlet using the AC power cable.

Installing a Channel Expansion KitIf you are using the VCSEL I-V Test Subsystem One Channel Expansion Kit to add a channel to an existing subsystem, you must install a newPXIe-4135 SMU into the PXI chassis. After you install the SMU in the chassis, you must finish the remaining steps of the subsystem set upprocess to completely assemble the new subsystem channel.

Before you begin this procedure, ensure that the PXIe-1092 chassis is powered off and connected to facility ground through the AC powercable or grounding terminal.

Equipment

• #2 Phillips screwdriver

Notice To prevent damage to the PXIe-4135 caused by ESD or contamination, handle the module using the edges or the metalbracket.

Complete the following steps to install a PXIe-4135 into the PXI chassis.1. Select the PXI chassis slot for the new PXIe-4135.

NI recommends installing the new PXIe-4135 in a chassis slot next to the PXIe-4135 SMUs already installed in the chassis. This hardwarearrangement ensures adequate temperature and noise control for subsystem hardware components.

Note Refer to the Channel Configurations section to view an example of the recommended hardware arrangement within aPXI chassis.

2. Unscrew the PXI filler panel from the PXI chassis using the #2 Phillips screwdriver.3. Remove the PXI slot blocker from the PXI chassis slot.4. Remove the black plastic covers from all the captive screws on the PXIe-4135 front panel.5. Touch any part of the chassis to discharge static electricity.


http://www.ni.com/r/vcselsoftware20.0.1rm

http://www.ni.com/r/vcsel-software-download

https://www.ni.com/documentation/en/ni-license-manager/latest/manual/manual-overview/

6. Ensure that the ejector handle is in the downward (unlatched) position.7. Place the PXIe-4135 edges into the guides at the top and bottom of the chassis. Slide the PXIe-4135 into the slot until it is fully inserted.8. Latch the module in place by pulling up on the ejector handle.9. Secure the PXIe-4135 front panel to the chassis using the front-panel mounting screws and the #2 Phillips screwdriver.

Note Tightening the top and bottom mounting screws increases mechanical stability and also electrically connects the frontpanel to the chassis, which can improve the signal quality and electromagnetic performance.

Related Information

PXIe-1092 Front Panel on page 31

Preparing the PXIe-4135 for Use with the NI-4134The PXIe-4135 requires installation of a LO/Sense LO connector assembly on the front panel before it can connect to an NI-4134 in theVCSEL I-V Test Subsystem.

Equipment

• SMU LO/Sense LO connector assembly• SMU shorting wire• Insulation strip tool• Screwdriver

Complete the following steps to set up a PXIe-4135 for use with an NI-4134 in the VCSEL I-V Test Subsystem.1. Open the LO/Sense LO connector assembly.2. Use an insulation tool to expose the wire conductors.

The maximum strip length is 10 mm (0.394 in.).3. Short both the LO and Sense LO terminals to the chassis ground terminal ( ) of the PXIe-4135.4. Clamp down using the screw terminals on the connector.5. Close the LO/Sense LO connector assembly.6. Connect the LO/Sense LO output connector assembly to the PXIe-4135; tighten the thumbscrew on the connector assembly to hold it in

place.

This connection allows current to return from the NI-4134 on the ground shield of the triaxial cables.

Repeat this procedure for each PXIe-4135 installed in the PXI chassis.

Related Information

PXIe-4135 Front Panel on page 29

Installing the Safety Interlock Connector on the PXIe-4135Each PXIe-4135 source measure unit (SMU) in the VCSEL I-V Test Subsystem requires a safety interlock circuit to ensure that the PXIe-4135outputs are in a safe state, regardless of the programmed state of the SMU.

Before you begin, verify that the safety interlock connector is wired to a test fixture that ensures operator safety.

Equipment

• Insulation strip tool

Complete the following steps to prepare a cable for the safety interlock connector and install the safety interlock connector onto the front panelof a PXIe-4135 SMU.1. Measure and mark your strip length on the safety interlock cable.

Note The required wire strip length for the safety interlock cable is 7.5 mm (0.295 in.) minimum and 10 mm (0.394 in.)absolute maximum. The acceptable AWG range for the safety interlock cable is 16-24.

2. Use an insulation strip tool to expose cable of the appropriate length.3. The safety interlock connector accepts both solid and multi-strand conductor cabling. If you are using a multi-stranded cable, twist the

strands together before insertion. For additional cabling reliability, strip and tin multi-stranded conductors before insertion.4. Insert the cable.5. Inspect for loose strands and tighten any retention screws on the safety interlock connector assembly to hold it in place.6. Connect the safety interlock connector to the device.

After you connect the PXI chassis to facility power, perform the safety interlock test to ensure the interlock is installed correctly.

Related Information

PXIe-4135 Safety Interlock System Integration on page 6


Testing the Safety InterlockYou can use LabVIEW or the NI-DCPower soft front panel to test the PXIe-4135 safety interlock. Refer to the Testing the Safety Interlocksection of the PXIe-4135 Getting Started Guide for more information about testing the safety interlock.

Tip To ensure safe operation of the PXIe-4135, periodically test the safety interlock for proper functionality. The recommended testinterval is at least once per day of continuous usage.

Notice Ensure the PXIe-4135 is disconnected from the NI-4134 before testing the safety interlock. The safety interlock testgenerates voltages up to 200 V, which could damage the NI-4134 if connected.

Grounding the NI-4134You must connect the NI-4134 grounding terminal to the grounding electrode system of the facility.

Required Equipment

• Grounding wire• #2 Phillips screwdriver

Complete the following steps to ground the NI-4134.1. Remove the grounding screw from the grounding terminal on the NI-4134.2. Attach the ring lug to the grounding terminal.

FORCE HI

POWER

INPUT 12V2.5 W MAX

POWERTXRXACTIVE

#8-32

GUARD

SENSEHI

SENSE HI

GUARD

HI

INPUTS FROM SMU

15

3. Tighten the grounding screw to 0.5 N⋅m (4.4 lb⋅in) of torque.4. Attach the other end of the wire to the system ground using a method that is appropriate for your application.

Repeat this procedure for each NI-4134 in the VCSEL I-V Test Subsystem.

PXI Connecting the NI-4134 to the PXIe-4135, the PXIe-8880, and Facility PowerAfter you connect the NI-4134 to the facility ground, connect the NI-4134 to a PXIe-4135 source measure unit (SMU) and the PXIe-8880controller in the PXI chassis.

Note This topic applies to only the VCSEL I-V Test PXI Subsystem.

Before you begin this procedure, ensure that a LO/Sense LO connector assembly is installed on each PXIe-4135 in the PXI chassis and thateach NI-4134 is connected to the facility ground.



Equipment

• Triax (m)-to-Triax (m) cables (x2)• USB cable, type-A to type-B (x1)• NI-4134 power supply (x1)• AC power cable (x1)• #2 Phillips screwdriver

Complete the following steps to connect an NI-4134 to a PXIe-4135 SMU and a PXIe-8880 controller in the PXI chassis, and to facility power.1. Connect a triaxial cable to the FORCE HI output on the PXIe-4135.2. Connect the opposite end of the triaxial cable to the FORCE HI input on the NI-4134 front panel.3. Connect a triaxial cable to the SENSE HI output on the PXIe-4135.4. Connect the opposite end of the triaxial cable to the SENSE HI input on the NI-4134 front panel.5. Connect the USB cable to the USB type B input on the NI-4134 front panel.6. Connect the opposite end of the USB cable to a USB type A input on the PXIe-8880 controller in the PXI chassis.7. Connect the NI-4134 power supply to the 2-contact MINI-COMBICON connector on the NI-4134 front panel.8. Fasten the NI-4134 power supply to the NI-4134 using the #2 Phillips screwdriver.9. Connect the NI-4134 power supply to facility power using the AC power cable.

If your VCSEL I-V Test Subsystem contains multiple PXIe-4135 SMUs and NI-4134 pulse generators, repeat this procedure for each SMU andpulse generator pair in the subsystem to set up each subsystem channel.

After you complete this procedure for each PXIe-4135 and NI-4134 pair in the subsystem, you must perform system compensation and pulsecompensation before you begin testing VCSEL DUTs.

Related Information



MXI Installing the PCIe-8398 in Your ComputerNote This topic applies to only the VCSEL I-V Test MXI Subsystem.

Equipment

• Host PC with an available PCI Express Gen-3 x16 slot

Note To determine if your computer is compatible with the PCIe-8398, refer to Mitigating MXI-Express PC Incompatibility.

Complete the following steps to install the PCIe-8398 in your computer.1. Power off your computer.

Caution To protect both yourself and the computer from electrical hazards, your computer should remain off until you finishinstalling all hardware as instructed.

2. Remove the top cover or access port to the PCI Express expansion slots.3. Touch the metal part of the power supply case inside the computer to discharge any static electricity that might be on your clothes or body.4. Unplug the computer and wait 30 seconds to allow the energy stored in the computer’s power supply to fully dissipate.5. Select any available PCI Express expansion slot (Gen-3 x16).6. Locate the metal bracket that covers the cut-out in the back panel of the computer for the slot you have selected. Remove and save the

bracket-retaining screw and the bracket cover.7. Line up the PCIe-8398 with the slot on the back panel. Slowly lower the PCIe-8398 until its card-edge connector is resting on the

expansion slot receptacle. Using slow, evenly distributed pressure, press the PCIe-8398 straight down until it seats in the expansion slot, asshown in the following figure.

8. Secure the PCIe-8398 to the back panel rail using a bracket retaining screw.9. Replace the computer cover.10. Plug in the computer.


https://www.ni.com/r/mxi-express-compatibility

Figure 11. Installing the PCIe-8398

12 3

1. PCIe-83982. PCI Express x16 Card-Edge Connector3. PCI Express Slot (x16)

MXI Connecting the NI-4134 to the PXIe-4135, Your Computer, and Facility PowerAfter you connect the NI-4134 to the facility ground, connect the NI-4134 to a PXIe-4135 source measure unit (SMU) and your computer.

Note This topic applies to only the VCSEL I-V Test MXI Subsystem.

Before you begin this procedure, ensure that a LO/Sense LO connector assembly is installed on each PXIe-4135 in the PXI chassis and thateach NI-4134 is connected to the facility ground.

Equipment

• Triax (m)-to-Triax (m) cables (x2)• USB cable, type-A to type-B (x1)• MXI-Express Gen 3 x8 cable (x1)• NI-4134 power supply (x1)• AC power cable (x1)• #2 Phillips screwdriver

Complete the following steps to connect an NI-4134 to a PXIe-4135 SMU in the PXI chassis and the PC.1. Connect a triaxial cable to the FORCE HI output on the PXIe-4135.2. Connect the opposite end of the triaxial cable to the FORCE HI input on the NI-4134 front panel.3. Connect a triaxial cable to the SENSE HI output on the PXIe-4135.4. Connect the opposite end of the triaxial cable to the SENSE HI input on the NI-4134 front panel.5. Connect the MXI-Express cable to the ports 1-2 of the PXIe-8398 in the PXI chassis.6. Connect the opposite end of the MXI-Express cable to the ports 1-2 of the PCIe-8398 in your computer.7. Connect the USB cable to the USB type B input on the NI-4134 front panel.8. Connect the opposite end of the USB cable to a USB type A input on your computer.9. Connect the NI-4134 power supply to the 2-contact MINI-COMBICON connector on the NI-4134 front panel.10. Fasten the NI-4134 power supply to the NI-4134 using the #2 Phillips screwdriver.11. Connect the NI-4134 power supply to facility power using the AC power cable.

If your VCSEL I-V Test Subsystem contains multiple PXIe-4135 SMUs and NI-4134 pulse generators, repeat this procedure for each SMU andpulse generator pair in the subsystem to set up each subsystem channel.


After you complete this procedure for each PXIe-4135 and NI-4134 pair in the subsystem, you must perform system compensation and pulsecompensation before you begin testing VCSEL DUTs.

Note The PXIe-8398 has a built-in feature that powers on/off the chassis it is controlling when the host system is powered on/off.NI recommends powering on/off your computer when you start/complete testing.

Related Information



Performing Compensation and I-V Measurements

Performing System CompensationSystem compensation is a required step in the VCSEL I-V Test Subsystem setup process. You must perform system compensation before youperform pulse compensation and I-V measurements. After the initial setup is complete, you must perform system compensation again if anyconnections within the VCSEL I-V Test Subsystem change, such as a cable replacement, or if the facility environment exceeds theenvironmental specifications for the subsystem.

Before you begin, complete the following pre-requisites:• Connect the PXI chassis to facility ground and a power source.• Install an LO/Sense LO connector assembly on each PXIe-4135 in the PXI chassis.• Connect each NI-4134 to the facility ground and a power source.• PXI Connect each NI-4134 to a PXIe-4135 and the PXIe-8880.• MXI Connect each NI-4134 to a PXIe-4135 and your computer.

NI recommends naming the BNC cables after the NI-4134 pulse generator outputs as follows and marking each BNC cable with an indicator soyou can differentiate between cables during compensation and general operation of the VCSEL I-V Test Subsystem.• SCOPE cable—BNC cable that connects the load board to a 30 dB attenuator installed on the PXIe-5162 front panel• PRIMARY cable—BNC cable that connects the load board to the HIGH SPEED PULSE PRIMARY output on the back panel of the

NI-4134 pulse generator• SECONDARY cable—BNC cable that connects the load board to the HIGH SPEED PULSE SECONDARY output on the back panel of

the NI-4134 pulse generator

Notice Consistently connect the above BNC cables to the corresponding NI-4134 outputs during the operation of theVCSEL I-V Test Subsystem. Otherwise, the compensation data and measurement results will be inaccurate.

Equipment

The following equipment is required to perform system compensation on one subsystem channel.• Male BNC short connector (x1)• Female BNC short connector (x1)• 30 dB attenuator (x1)• BNC (m)-to-BNC (m) cables (x2 for full impedance NI-4134 configuration, x3 for half impedance NI-4134 configuration)

– PRIMARY cable– SECONDARY cable (half impedance NI-4134 configuration only)– SCOPE cable

Complete the following steps to perform system compensation.1. Select Help »Find Examples from LabVIEW and navigate to Toolkits and Modules »VCSEL I-V Test to open VCSEL System and

Pulse Compensation.lvproj.2. Open the System Compensation VI.3. Follow the instructions on the VI front panel to complete system compensation.

After the system compensation is complete, the System Compensation VI automatically saves the system compensation data for pulsecompensation and I-V measurements.

Related Information

Measurement Compensation on page 8

Connecting the NI-4134 to the PXIe-4135, the PXIe-8880, and Facility Power on page 18

Connecting the NI-4134 to the PXIe-4135, Your Computer, and Facility Power on page 20


Performing Pulse CompensationPulse compensation is a required step in the VCSEL I-V Test Subsystem setup process. You must perform pulse compensation beforeperforming I-V measurements. After the initial setup is complete, you must perform pulse compensation again if you change the subsystemmode of operation or the settings for the pulse measurements that the VCSEL I-V Test Subsystem executes.

Before you begin, ensure you have completed system compensation.

Equipment

The following equipment is required to perform pulse compensation on one subsystem channel.• BNC (m)-to-BNC (m) cables (x2 for full impedance NI-4134 configuration, x3 for half impedance NI-4134 configuration)


• 30 dB attenuator (x1)

Complete the following steps to perform pulse compensation.1. Select Help »Find Examples from LabVIEW and navigate to Toolkits and Modules »VCSEL I-V Test to open VCSEL System and

Pulse Compensation.lvproj.2. Open the Pulse Compensation VI.3. Follow the instructions on the front panel to complete pulse compensation.

After the pulse compensation is complete, the Pulse Compensation VI automatically saves pulse compensation data for I-V measurements.

Related Information

Measurement Compensation on page 8

Connecting the NI-4134 to the PXIe-4135, the PXIe-8880, and Facility Power on page 18

Connecting the NI-4134 to the PXIe-4135, Your Computer, and Facility Power on page 20

Connecting the NI-4134 and PXIe-5162 to a Load BoardAfter you complete the compensation procedures for the VCSEL I-V Test Subsystem, configure the connections between the subsystem andyour load board to prepare to perform I-V measurements on packaged DUTs.

Before you begin this procedure, you must run system compensation and pulse compensation to characterize the performance of cables andcomponents used in the VCSEL I-V Test Subsystem. Additionally, verify the impedance configuration for each NI-4134 in the subsystembefore connecting cables to the NI-4134.

Equipment

The following equipment is required to set up one subsystem channel.• BNC (m)-to-BNC (m) cables (x2 for full impedance NI-4134 configuration, x3 for half impedance NI-4134 configuration)


• 30 dB attenuator (x1)

Notice You must run the system compensation procedure using the PRIMARY, SECONDARY, and SCOPE cables before youconnect the VCSEL I-V Test Subsystem to a load board.

Complete the following steps to connect a NI-4134 and PXIe-5162 to a load board.1. Connect the PRIMARY cable to the HIGH SPEED PULSE PRIMARY output on the NI-4134 back panel.2. Connect the opposite end of the PRIMARY cable to the primary receptacle on the load board.3. If you are using the half impedance NI-4134 configuration, connect the SECONDARY cable to the HIGH SPEED PULSE SECONDARY

output on the NI-4134 back panel.4. Connect the opposite end of the SECONDARY cable to the secondary receptacle on the load board.5. Attach the 30 dB attenuator to the first available analog input channel on the PXIe-5162 front panel.6. Connect the SCOPE cable to the attenuator attached to the PXIe-5162.7. Connect the opposite end of the SCOPE cable to the remote sense terminal on the load board.

If your VCSEL I-V Test Subsystem contains multiple NI-4134 pulse generators, repeat this procedure for each NI-4134 in the subsystem.


Performing I-V MeasurementsThe VCSEL I-V Test Software enables you to perform I-V measurements on one subsystem channel as well as multiple subsystem channels.For multiple subsystem channels, the VCSEL I-V Test Software supports serial and parallel operation mode.

Note After the initial setup of the VCSEL I-V Test Subsystem, you can perform an I-V measurement to validate theVCSEL I-V Test Subsystem setup and operation.

Before you begin, ensure that you have completed system compensation and pulse compensation.Complete the following steps to perform an I-V measurement.1. Select Help »Find Examples from LabVIEW and navigate to Toolkits and Modules »VCSEL I-V Test to open

VCSEL I-V Measurement.lvproj.2. Open one of the following I-V measurement example VIs according to your subsystem configuration:

• Single Channel VI• Multiple Channels (Serial) VI• Multiple Channels (Parallel) VI

3. Follow the instructions on the VI front panel to complete the I-V measurement.

After the I-V measurement is complete, I-V curves appear on the VI front panel.

You can use the VCSEL Test Result Viewer example VI, accessible from the NI Example Finder, to learn more information about your I-Vmeasurement results.

Load Board DesignThe VCSEL I-V Test Subsystem requires a connection to a load board to test packaged VCSEL DUTs. Use the following reference load boarddesign and guidelines as a starting point when you create the load board design for your VCSEL I-V test application.

Note You must design and supply the load board for your VCSEL I-V test application.

The reference load board design defines the essential components for the load board. You will need to modify and customize this design tosatisfy the requirements of your specific VCSEL DUT. Refer to the following images to view a summary of the reference load board design.

Figure 12. Reference Load Board Design, Top Layer

VCSELAnode

BOARD EDGE

Cathode

BOARD EDGE

BOARD EDGE

2

2 3

11

11

1

o

J3

U1

J1

J23

34

2

1

213

2 1 3

SENSETERMINAL

2 3

SECONDARYRCPT

PRIMARYRCPT

TOP

7 8 54

6

3

2

1

109

1. Sense ground plane2. Isolation barrier3. Pulse ground plane4. Primary BNC connector5. Secondary BNC connector

6. Remote sense BNC connector7. Primary signal trace8. Secondary signal trace9. Remote sense signal trace10. Via


Figure 13. Reference Load Board Design, Bottom Layer

1

2

3

4 5

76

1. Sense ground plane2. Isolation barrier3. Pulse input ground plane4. Primary BNC connector

5. Secondary BNC connector6. Remote sense BNC connector7. Via

If you use the full impedance NI-4134 configuration for your VCSEL test application, you must remove the SECONDARY BNC connectorfrom your load board design as well as the trace between the connector and the DUT. This path can cause signal distortion for the fullimpedance NI-4134 configuration.

Adhere to the following guidelines when designing a load board for the VCSEL I-V Test Subsystem:• Maintain 50 Ω impedance control for the PRIMARY trace, SECONDARY trace, and REMOTE SENSE trace.• Ensure an isolation barrier exists between the sense ground plane and the pulse ground plane to minimize AC current cross talk between

planes. Only connect ground planes at the DUT pins on the load board.• Match the trace length from the PRIMARY receptacle and SECONDARY receptacle to the DUT exactly to ensure optimal measurement

performance during DUT testing.• Place vias near signal traces to connect the top and bottom ground plane layers, and to maintain 50 Ω impedance.

Specifications

DefinitionsWarranted specifications describe the performance of a model under stated operating conditions and are covered by the model warranty.

Characteristics describe values that are relevant to the use of the model under stated operating conditions but are not covered by the modelwarranty.• Typical specifications describe the performance met by a majority of models.• Nominal specifications describe an attribute that is based on design, conformance testing, or supplemental testing.

Specifications are Typical unless otherwise noted.

ConditionsSpecifications are valid under the following conditions unless otherwise noted:• VCSEL I-V Test Subsystem temperature is within the ambient temperature range of 20 °C to 30 °C• VCSEL I-V Test Subsystem hardware configuration only includes components specified in the Hardware Overview section


Subsystem Pulse Generation Setting SpecificationsProgrammable width range 5 ns to 10 μs

Width resolution 333 ps

Burst period 5 ms, minimum

Note Burst period is the maximum amount of time allowed for one series of a continuous pulse train.

Burst time 1 ms, maximum

Break time

Burst time ≤ 0.25 ms 5 ms - Burst time

Burst time > 0.25 ms Burst time x 19

Figure 14. VCSEL I-V Test Subsystem Pulse Definition

Time

Cur

rent

3

4 5

1

2

1. Amplitude2. Pulse width (duration)3. Cycle (period)

4. Rising (leading) edge; positive slope5. Falling (trailing) edge; negative slope

Note Duty Cycle = Pulse Width / Cycle

Figure 15. Maximum Allowed Pulse Counts Over Duty Cycle Within One Pulse Burst

Max

Allo

wed

Pul

se C

ount

s

2000

1

10

100

1000

Duty Cycle

25%0.05% 0.1% 1% 10%

Pulse Width - 200 ns

Pulse Width - 1000 nsPulse Width - 2000 nsPulse Width - 5000 nsPulse Width - 10000 ns

Pulse Width - 5 nsPulse Width - 10 nsPulse Width - 50 ns

Positive pulse rise time 3 ns (0 A to 85% of Settled Current)

Negative pulse fall time 3 ns (0 A to 85% of Settled Current)


Table 8. Current Programming and Measurement Accuracy

VCSEL ForwardVoltage

MeasurementRange

Maximum Pulse Current Output1

MinimumCurrent

Setting Step2

Accuracy3Full Impedance

NI-4134 ConfigurationHalf Impedance

NI-4134 Configuration

< 10 ns ≥ 10 ns < 10 ns ≥ 10 nsCurrentSetting4

CurrentMeasurement

VoltageMeasurement

±3.1 V 2 A 2.1 A 4 A 4.2 A 2 mA 3% +

38.7 mA 2% + 38.7 mA 2.3% + 38 mV

±7.9 V 1.8 A 1.9 A 3.8 A 3.9 A 3 mA 3% +38.8 mA 2.3% + 38.8 mA 2.7% + 76 mV

±15.8 V 1.5 A 1.6 A 3.3 A 3.4 A 5 mA 3% +39.1 mA 2.1% + 39.1 mA 2.3% + 139 mV

±27.5 V 1.1 A 1.2 A 2.5 A 2.7 A 10 mA 3% +40.1 mA 2.7% + 40.1 mA 3% + 266 mV

NI-4134 SpecificationsAbsolute maximum voltage input from SMU ±125 V

Primary pulse output resistance 50 Ω

Secondary pulse output resistance 50 Ω

External 12 V power input

Current draw

Normal operation 140 mA (DC)

Inrush at power-on 1 A

Power draw 1.7 W

USB communication/control

Current draw 1 mA

Power draw 5 mW

BNC Cable SpecificationsFrequency Range

Minimum DC

Maximum 4 GHz

Impedance 50 Ω

MXI MXI-Express Interface SpecificationsCable type MXI-Express Gen 3 x8

Number of lanes 8

Raw bandwidth 64 Gb/s

Attenuator SpecificationsFrequency Range

Minimum DC

Maximum 3 GHz

Nominal attenuation 30 dB

Impedance 50 Ω

1 The values in the Current Programming and Measurement Accuracy table describe the maximum pulse current output when the VCSEL forward voltageis at the maximum of the specified measurement range.

2 Minimum current setting step is limited by VCSEL I-V Test Subsystem noise.3 The VCSEL I-V Test Subsystem must be within ±3 °C of the temperature taken during the most recent compensation procedure execution. Measurement

error caused by signal reflection is excluded from subsystem measurements.4 The Current Setting specification does not account for the characteristic difference between the known-good DUT used for subsystem compensation and

the actual DUT.


Subsystem Component SpecificationsRefer to the product documentation for the following subsystem components on ni.com/manuals to view detailed component specifications.• PXIe-4135 Specifications• PXIe-5162 Specifications• PXIe-1092 Specifications• PXI PXIe-8880 Specifications• MXI PCIe-8398 Specifications• MXI PXIe-8398 Specifications

Hardware Reference

NI-4134 Front PanelRefer to the following when making connections to the front panel of the NI-4134 and to understand the behavior of the front panel LEDindicators.

FORCE HI

POWER

INPUT 12V2.5 W MAX

POWERTXRX

ACTIVE#8-32

GUARD

SENSEHI

SENSE HI

150V MAX to

GUARD

HI

INPUTS FROM SMU

7132

10 11 12

1 3 54 6 8 9

Table 9. Front Panel Signal Descriptions and Destinations

Signal Connector Type Description Destination

1

FORCE HI Triaxial (female)

Pin: HI

PXIe-4135 Output HI triax2 Inner shield: Guard

3 Outer shield: Chassis ground

4

SENSE HI Triaxial (female)

Pin: Sense HI

PXIe-4135 Sense HI triax5 Inner shield: Guard

6 Outer shield: Chassis ground

7USB Type B (female) USB communication/control PC or controller USB port

8 POWER 2-contact MINI-COMBICON External 12 V power input External 12 V power supply

9Grounding screw Protective earth ground Grounding electrode system of the facility

Table 10. Front Panel LED Indicators

LED Status Indicator Description

10 POWER

(Off) Not powered

Green Powered

11 TX(Off) Not transmitting data

Green Transmitting data

12 RX(Off) Not receiving data

Green Receiving data





https://www.ni.com/r/8880-specs

https://www.ni.com/r/pcie-8398-specs

https://www.ni.com/r/pxie-8398-specs

Table 10. Front Panel LED Indicators (Continued)

LED Status Indicator Description

13 ACTIVE

(Off) Output disabled:• NI-4134 mode is set to disabled• NI-4134 mode is set to fast pulse mode or negative fast pulse mode but is not outputting a pulse or

awaiting a trigger

Green Output enabled:• NI-4134 mode is set to fast pulse mode or negative fast pulse mode and is either outputting a pulse or

awaiting a trigger

NI-4134 Back PanelRefer to the following when making connections to the back panel of the NI-4134 and to understand the behavior of the back panel LEDindicators.

HIGH SPEED PULSE


50 Ohm



1 2 3 4 5 6

Table 11. Back Panel Signal Descriptions and Destinations

Signal Connector Type Description Destination

1 TRIG OUT 0 SMA (female) Sends a trigger to external equipment External equipment trigger input; tighten tomaximum torque of 90 N⋅cm (8 lb⋅in)

2 TRIG OUT 1 SMA (female)

3 TRIG IN SMA (female) Receives a trigger from external equipment Trigger source; tighten to maximum torque of90 N⋅cm (8 lb⋅in)

4 HIGH SPEED PULSESECONDARY

BNC (female) High speed pulse signal output; also passesSMU Sense HI

• Full impedance configuration: noconnection

• Half impedance configuration: DUT loadboard

5 HIGH SPEED PULSEPRIMARY

BNC (female) High speed pulse signal output; also passesSMU Force HI

DUT load board

6 SCOPE OUT BNC (female) 100× attenuation output of signal fromHIGH SPEED PULSE PRIMARY to allowan oscilloscope to measure the pulse signal;50 Ω source termination

50 Ω oscilloscope input channel

PXIe-5162 Front PanelRefer to the following when making connections to the front panel of the PXIe-5162.


CH 0


CH 1

CH 2

CLKIN

PFI0

1OUT


CH 3

Table 12. Signal Descriptions

Signal Connector Type Description

CH 0, CH 1, CH 2, CH 3 BNC Analog input connection; digitizes data and triggers acquisitions

CLK IN

SMB

Imports an external Reference Clock or Sample Clock to the device

CLK OUT Exports the Reference Clock from the device

PFI 0 PFI line for digital trigger input/output

PFI 1 PFI line for digital trigger input/output and probe compensation; no subsample trigger accuracy

PXIe-4135 Front PanelRefer to the following when making connections to the front panel of the PXIe-4135.


ACCESS VOLTAGE

LO

HIGUARD

GUARD

INT.

PASS-THRU

SENSELO

SENSE HI


OUTPUT±200 V , 1 A,

3 A Pulse MAX

250 V MAX to


A

C

D

E

B

K

M

J

L

F

H

I G

Table 13. Front Panel Connectors

Description

A Access Status LED

B Voltage Status LED

C Chassis ground

D Output LO

E Sense LO

F Triaxial connector pin Output HI

G Triaxial connector inner shield, Guard

H Triaxial connector pin, Sense HI

I Triaxial connector outer shield, Chassis ground

J Safety Interlock Input

K Safety Interlock Pass Thru - Input


Table 13. Front Panel Connectors (Continued)

Description

L Safety Interlock Ground

M Safety Interlock Pass Thru - Ground

Related Information

Preparing the PXIe-4135 for Use with the NI-4134 on page 17

PXIe-1092 Front PanelRefer to the following when interacting with the front panel of the PXIe-1092.


PeripheralExpansion Slot



For Details

4 H 5 H3 H2 H

1 6 H 7H

8H

9 H

3

3 679 8 5 5

10

1 2

11

4

1. System controller expansion slot2. Backplane connectors3. Removable feet4. Peripheral expansion slot5. PXI express hybrid peripheral slots (x7)6. PXI express system timing slot

7. PXI express system controller slot8. Front panel LEDs9. Power inhibit switch10. Chassis carry handle11. DIP switch

Related Information

Installing a Channel Expansion Kit on page 16

PXIe-1092 Back PanelRefer to the following when interacting with the back panel of the PXIe-1092.


DIS

CO

NN

EC

T P

OW

ER

DIS

CO

NN

EC

T P

OW

ER

CO

RD

BE

FOR

E S

ER

VIC

ING

. C

OR

D B

EFO

RE

SE

RV

ICIN

G.

432

5

6

1

10

7

8

9

1. Timing and synchronization upgrade2. Rear panel power supply LED3. Power supply4. Universal AC input5. Chassis protective earth terminal

6. Fan module7. 10 MHz REF IN and OUT SMA connectors8. Remote inhibit and chassis monitoring port9. High-density trigger ports10. USB 3.0 port

PXI PXIe-8880 Front PanelRefer to the following when making connections to the front panel of the PXIe-8880.

Note This topic applies to only the VCSEL I-V Test PXI Subsystem.

2

3

1

4

5

6

7

7

8

1. Reset button2. Trigger3. Display port4. USB 2.0

5. GPIB connector6. LED indicators7. Ethernet connectors8. USB 3.0


The following table lists various peripherals and their corresponding PXIe-8880 external connectors, bus interfaces, and functions.

Peripheral External Connector Description

Video DisplayPort ATI Radeon E6460 Embedded GPU

Ethernet Port 1 LAN (RJ45, dual stacked) 10/100/1000 EthernetIntel I217

WOL capable

Ethernet Port 2 LAN (RJ45, dual stacked) 10/100/1000 EthernetIntel I210

Not WOL capable

USB 2.0 USB 4-pin Series A stacked receptacle (4 ports) USB 2.0 capable

USB 3.0 USB 9-pin Series A stacked receptacle (2 ports) USB 3.0 and USB 2.0 capable

PXI Express trigger Trigger (SMB) Routing PXI Express triggers to or from the backplane trigger bus

GPIB device GPIB (25-pin Micro D) General-Purpose Interface Bus, IEEE 488.2

MXI PCIe-8398 Front PanelRefer to the following when making connections to the front panel of the PCIe-8398.


PWR/LINK

4

1

1

2

1. MXI-Express Gen-3 x16 Ports (x4)2. PWR/LINK LED

MXI PXIe-8398 Front PanelRefer to the following when making connections to the front panel of the PXIe-8398.



PXIe-8398

PWR/LINK

4

3

2

1

MXI-Express

1

2

1. PWR/LINK LED2. MXI-Express Gen-3 x16 Ports (x4)

Where to Go NextAdditional Documentation

Visit ni.com/r/vcsel-docs to review additional documentation about the VCSEL I-V Test Subsystem, including the VCSEL I-V Test SoftwareReadme and API reference.

Contacting NI for Support

Contact the NI services personnel contracted on your project for technical support, including troubleshooting and service requests. To findinformation about local NI service branches, visit ni.com/contact-us.

Information is subject to change without notice. Refer to the NI Trademarks and Logo Guidelines at ni.com/trademarks for information on NI trademarks. Other product and company namesmentioned herein are trademarks or trade names of their respective companies. For patents covering NI products/technology, refer to the appropriate location: Help»Patents in your software, thepatents.txt file on your media, or the National Instruments Patent Notice at ni.com/patents. You can find information about end-user license agreements (EULAs) and third-party legal noticesin the readme file for your NI product. Refer to the Export Compliance Information at ni.com/legal/export-compliance for the NI global trade compliance policy and how to obtain relevantHTS codes, ECCNs, and other import/export data. NI MAKES NO EXPRESS OR IMPLIED WARRANTIES AS TO THE ACCURACY OF THE INFORMATION CONTAINED HEREIN AND SHALLNOT BE LIABLE FOR ANY ERRORS. U.S. Government Customers: The data contained in this manual was developed at private expense and is subject to the applicable limited rights andrestricted data rights as set forth in FAR 52.227-14, DFAR 252.227-7014, and DFAR 252.227-7015.

© 2020—2021 National Instruments Corporation. All rights reserved.

378401B-01 January 13, 2021

http://www.ni.com/r/vcsel-docs

http://ni.com/contact-us

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