V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 1

Readout for the minical and Tile-HCAL prototype, 15’

The VFE RO:•The light signals•Photo-detectors

1) APD’s (Hamamatsu, )2) Si-PM’s (MEPhI)3) MA-PMs(Hamamatsu)4) MRS-APD’s(Obninsk)

•Preamplifiers, shapercharge sensitive (ECAL-LAL, Minsk)voltage sensitive (Prague)

•the electrical signals0-3Volt range, dyn. range 1-75 (100) MIPs/cell20-40 ns rise150 ns (95%)

•buffering and multiplexing•digitising •calibration and monitoring

1. 2003 minical2. 2004-2005: pre-prototype Tile-HCAL

•The different photodetectors•front end electronics (VFE)•time schedule, needs•event format and DAQ (P.Daucey)

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 2

The light signals

produced number of photons by MIP:~ 150 ph/MIP/tile, loss in fibre-RO: ~20%,tile;= 1/3 cell 1 (absorber plate+tile) deposes ~24 MeV

>> in a cell ~ 72 MeVmaximal energy deposit/cell ~ 4.5 GeV (in rare tails)ratio maximum/MIP = 65

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 3

The photodetectors receive the light fromthe scintillator tiles of the sampling calorimeter.options studied are:-Si-APD's, with 3x3 to 4x4 mm2 photo-cathodes, in arrays of individuals or matrix assembly, as in study at Hamamatsu, Japan and-Si-PM's, with 1x1 to 2x2 mm2 photo-cathode, from MEPhI/PULSAR(Moscow), 576 >>> 1000 pix/mm2

All systems are in still in development, no dedicated choice can be made at present.

The photodetectors

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 4

Required gain for pre-amps, 2 options

A) for APD’s: 150 photons/tile = 450 photons/cell, ~80% transmission, 80% photo-conversion efficiency:• possible intrinsic gain ~200-400 (to be verified) >>> 15 000 - 30 000e-/ MIP= 7.2-14.4 fC/cell• conventional stable intrinsic gain ~50-100 >>> 4 000 - 8 000e-/ MIP= 1.8-3.6 fC/cell slope/width of photodetector signal:

~ 2-5ns/20-30 ns width required dynamic range: 65!

If MIP in cell channel 16 >>> 4.5 GeV: channel 3000, 12 bit ADC, ch 4096 = 3 V and >>>> ch 16 =12 mV

preamp gain required: 12 mV/7.2 fC = 1.7 mV/fC 12 mV/1.8 fC = 6.8 mV/fC

Resolution: 10 bit ADC: -4.5 MeV/bin 12 bit ADC, -optimal in range: ~ 1 MeV/bin

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 5

Required gain for preamps, 2 options

B) For the Si-PM's: much less preamp gain is needed SiPM intrinsic gain is ~106

a VFE RO-board development is under way at MEPhI and PULSAR (both Moscow), based on the H1-PM preamps.

They also look in an alternative pre-amp/shaper concept.

more on the photodetectors and pre-amps can be found in:http://www.desy.de/~korbel/see/HCAL_Main_60902.ppt and ....../DESY-Zeuthen_4.12.02.pdf.

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 6

more on preamplifiers for APD’s

CALICE-ECAL:prototype: ~10 mm2 preamp chip, modified OPERA type for APD modifications specified and simulated in chip, design readynext week submission of modified design for prototypes 25 x18 ch.delivery in June 2003. Use in minical Summer 2003

Minsk/Protvino:2 types tested with APD and MIP’s10 preamps available100 preamps in February 2003, design of 16 channel MPC prototype: (~ 8000 Euro needed??)

Prague (I.Polak):voltage amplifier, (probably not optimal for APD’s??), signals seen in DESY test, signal/noise???agreed to produce 16 channels PT end Febr. 2003development financed by Prague

DESYtrans-impedance type, tested with APD’s, mod. CMS-type, cheap !, P. Smirnov

Test of all oreamps from above in minical tests when available in time.Decision on what to use in preprototype: October 2003

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 7

Electrical signals from the minical

•Noise, randoms•cosmics•LED-pulses

CAMAC Read-Out, LC-2249AMA-PM as photodetector nowup to 144 channels needed in summer 81 Si-PMs 27 APDs 3 MA-PMs (up to 48 channels)

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 8

More on photodetectors

Hamamatsu,multianode PM,44mm2pixel

Hamamatsu,APD, 55 mm2Hamamatsu,APD-array,11 mm2 pixel

MEPHI, Si-PM, 11 mm2 pixel

Detailed investigation of available photodetectors with 55 cm2 scintillator tiles in test beamsMIP peaks clearly separated from pedestals.

• satisfactory performance

• none yet tested in high field

• all will be used in minical to establish performance and get operation experience

• than decision which to use!!

V sensitive pre-amp,Prague

pre-amp from MEPhIPM pre-amp,DESY-H1

Q sensitive pre-amp,Minsk

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 9

The VFE-ROB-scheme

Array ofPhoto

detectors

pulseshapers

Sample &

hold

Multiplexer

(analog)

Trigger/RO

clock

LED signals

PIN diode for LED

monitoring

HV forPhoto

detectors

sensitive preamps

pedestals

OnlineGain/HVmonitoring?

cosmic beam

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 10

The Read-Out Boards (VFE-ROB’s) for prototype

It is foreseen to place the photodetectors on the surface of a ROB (read-out board), as tight together as possible, on special sockets to be developed, about 108 (6 x 18) pieces on one board.For the Si-PMs probably 3-4 times more have to be placed on a ROB.About 10-12 ROB's are needed for the Tile_HCAL prototype end 2003. (1000-5000??? channels)

The signals from the pre-amps, which have to deliver signals of 8mV/fC input charge, have to be shaped (shaping time ~ 80-100 ns) and stored in sample and hold (S&H) pipelines for a time period of about 1-2 msec.Than a multiplexed read-out, clocked by the DAQ, will empty the pipelines.

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 11

Calibration on VFE-ROB’s

•Cosmic muon calibration: the FE boards should be permanently operational to allow, between test-beam pulses, continuos collection of the low rate cosmic muons penetrating the calorimeter, which are used for real time on-line calibration. They generate their own calibration triggers. Low rate process, for precise calibration of whole chain•Preamp calibration: by charge injection, >>

•dynamic range •linearity,

high rate process, tests electronic chain only

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 12

Electronic calibration

Polarisation (-200V)

Diode

DéclenchementCalibrage

Chip VFE

IcalibLR

Cinjection

6 circuits de calibrageopérant sur 18 diodes chacun

Le premier PCB du prototype physique

Studies with CALICE-ECAL chip

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 13

Photodetector monitoring on VFE-ROB’s

LED monitoring:The ROB should also integrate • a few light emitting diodes (LED's) with LED-light distribution by clear optical fibres. to all individual photodetectors for stability monitoring,• and also to a few stable Si-photodiodes (stable against temperature and bias voltage fluctuations) to monitor the LED light output.The analogue signals of the LED monitoring photodiodes and the Si-PD’s (some?) have also to be amplified, shaped and stored in the same S&H pipeline.LED monitoring has to be triggered in the gaps between the test-beam pulses and during the read-out!

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 14

More on VFE-ROB duties

The ROB has to integrate •the active elements (chips, to be developed) and in tight package •all the signal lines up to the S&H and multiplexer, •the power lines for the

•individual photodetectors (~400V for the APD's, or ~30V for the Si-PM's), where each photodetectors operation voltage will be adjusted individually for equal gain on the level of ~0.1V.

It is hoped, that we can profit considerably from the design of the ROB prototypes of the CALICE-ECAL at LAL/Orsay.

Group strongly interested in taking over VFE and DAQ duties:DUBNA: (I. Golutvin, I. Tyapkin)

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 15

On chip

Amp

Vdc = -200V

OPA

DC block

Detector Charge preamp shaper Track & hold

channel architecture, chip ECAL >> HCAL

LAL-Oray, F. Richard,dela Taille,offered to us to modify the ECAL-preamp/shaper chipfor the requirements of the Tile-HCAL APD’s >>>>>

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 16

FLC_HCAL pinout

Vbiasm

_pa

Out 0Out 1

Out 2Out 3

Out 4

Out 6

Out 5

Out 8

Out 10

Out 9

Out 7

Out 12

Out 13

Out 15

Out 14

Out 11

Vdda

In 0

Vbiasi_pa

Vb_casc

V_rf

Vf

Vbiaso_pa

Vbiasi_s

hVbiaso_sh

H R

Vss

Vbias_cell

In 16

Ck_R

In 1In 2

In 3

In 4

In 5In 6

In 7

In 8

VssIn 9In 10

In 11

In 12

In 15In 14

In 13

SW1

In 17

Vdd

SW2

Out_pa

Vss

Vdd

Q_R

Bias_b

uf

Out

Bias_o

ut Vss

Vdd

Out17

Out 16

1

2

3

4

5

67

8

10

9

11

1213

14

1516

17 18 19 20 21 2422 23 31302928272625

40

39

38

32

37

3635

3433

47

46

45

44

43

42

41

51 50 49

48

565758596061626364 55 54 53 52

FLC_HCAL

CQFP 64 package

Rst_R

Charge inputs

Voltage outputs MUX output

Package : CQFP64

64 pins

FLC_HCAL chip1

,7m

m

2,5mm

25/03/03, LAL

pre-amp layout

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 17

LAL/Orsay studies for Tile-HCAL pre-ampssimulation studies for linearity

Linearity preamp Linearity shaper/buffer

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 18

LAL/Orsay studies for Tile-HCAL pre-ampsoutput signal shapes

Output signal shaper

Output signal preamp

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 19

18 charge inputs/18 voltage outputs/1 MUX output

Gain= 6.7mV/fc 450 fC max input charge (70 MIP)

2.8V dynamic range below 1% non-linearity

25/03/03, LAL

FLC_HCAL characteristics, next steps

•DESY will order 25 of such prototype chipsat the 7.April 2003>>> 25 x 18 =450 preamp channels delivered in mid June 2003•DESY gets test-board from LALline driver prepared to run 30 channels for APD-minical studies(July-September 2003)If prototype chips are ok, we have enough channels to equip theAPD-cells (100-300, to be decided in May) of the prototypecalorimeter!

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 20

Draft of conclusions from the DUBNA meeting

We need: ~ 1000 RO-channels at beginning of 2004 for the 1m3 prototype test

--APD’s (Hamamatsu) and Si-PM’s (MEPhI) will be used--photodetectors and preamps have to be optimised soon!--The size of APD’s will be ~3x3 mm2

•the gain required was specified, •the combined gain of APD and preamp should result in 2-8 fC/MIP,•the electronic noise should be below 4-5 sigma of MIP,•the capacity of the APD’s will be ~ 25 pF,•the stability of the MIP signal should be in the range of 1%,•shaping time has to fit to the minimum bunch distance (180 ns),•dynamic range required between MIP(4 bit) and max. signal is >/~65

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 21

Draft of conclusions from the DUBNA meeting

Due to the short time available we probably have to proceed in 2 stages:

1. Use CALICE-ECAL VFE board with minimal modifications• keep 108 channels/board• keep ECAL preamps, noise,shaping,...• modify implementation/arrangement of photodetectors on board• modify photodetector power supply• add LED monitoring for all channels• .....2. Design a versatile VFE concept allowing use of different competing elements (preamps, HV distribution, monitoring..)3. When useful VFE boards available for first 1000 channel tests: and more experience gained, (probably 0.5-1 year later)• implement optimal preamps (capacity, noise, gain), shaping• optimise power supply and individual adjustment • optimise online LED stabilisation

V. Korbel, DESY ECFA-DESY Workshop, NIKHEF 22

The VFE-ROB-scheme, APDs

Array ofsingle APDsor matrices

pulseshapers

Sample &

hold

Multiplexer

(analog)

Trigger/RO

clock

LED signals

PIN diode for LED

monitoring

HV,380-420VdV/V~10-4

charge sensitive preamps

pedestals

Online/OfflineGain/HV

monitoring?

cosmic beam

Charge injection

DAC