Unit 5

78
UNIT V MEMORY MANAGEMENT Basics of memory management, Swapping, Virtual memory, Page replacement algorithm, FIFO,second chance PR, clock PR, Least recently used, working set PR, WS clock PR, Design issues for Paging systems, Design issues for Paging systems, OS involvement with paging, page fault handling, Segmentation

description

Memory Management

Transcript of Unit 5

Page 1: Unit 5

UNIT V

MEMORY MANAGEMENT

� Basics of memory management,

� Swapping, Virtual memory,

� Page replacement algorithm,

� FIFO,second chance PR, clock PR, Least recently used, working set PR,

WS clock PR,

� Design issues for Paging systems,� Design issues for Paging systems,

� OS involvement with paging,

� page fault handling,

� Segmentation

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MEMORY MANAGEMENT

� Objective of Chapter

� What is Memory.

� Students are able to understand Concept of Swapping .

� Concept of Paging ,Segmentation.� Concept of Paging ,Segmentation.

� Different type of Page replacement algorithms

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BASICS OF MEMORY MANAGEMENT

� Memory management is the function of a computer

operating system responsible for managing the computer's

primary memory.

� The memory management function keeps track of the status

of each memory location, either allocated or free.of each memory location, either allocated or free.

� Something is needed to manage the movement of programs

between O.S. and memory. The part of the operating system

that does this is known as the memory manager.

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MEMORY MANAGEMENT REQUIREMENTS

� Relocation

� Protection

� Sharing

� Logical Organization

� Physical Organization

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BASIC MEMORY MANAGEMENT

� Without swaping

� Monoprogramming

� Multiprogramming with fixed partitions

� With swaping and paging

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MONOPROGRAMMING

� Simplest scheme possible

� Only one program will be executed at a time

� The OS copies the program from disk to memory and

executes it. Once finished, the OS is ready to accept a new executes it. Once finished, the OS is ready to accept a new

command from the user

� New commands overwrite the old program in memory with

the new

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MONOPROGRAMMING

Three configurations

a) is rarely used anymore

b) is in use by MP3 players, Palm devices

c) was the model of early PCs, eg: DOS

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MULTIPROGRAMMING WITH FIXED PARTITIONS

� It support multiprogramming

� This scheme based on contiguous

allocation.

� memory is divided in to fixed

number of partitions

Operating

system

p1

number of partitions

� Each partition is of fixed size.

� each partition can accommodate

one program for execution.

p2

p3

p4

Fixed-size partitioning

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PLACEMENT ALGORITHM

� The most common strategies to allocate free partition to

program

� First-fit.

� Best-fit.

� Worst-fit.� Worst-fit.

� First-fit:- allocates the first free partition large enough to

accommodate the process.

� Best-fit:- allocates the smallest free partition free partition

� Worst-fit:-allocates the largest free partition free partition .

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MULTIPROGRAMMING WITH DYNAMIC PARTITION

� In dynamic partition, neither the size nor the number of

dynamically allocated partitions can be fixed.

� The memory manager continues creating partitions until

all physical memory exhausted.

� The main problem with fixed partition is wastage of � The main problem with fixed partition is wastage of

memory by programs are smaller than their partitions

,this is also known as internal fragmentation.

� With dynamic partitioning the number and size of

partition is vary. This improves utilization of memory

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SWAPPING

� Swapping a process consists of bringing the process into memory,

from disk, in its entirety. The process is executed for some time

and then placed back on the disk

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VIRTUAL MEMORY

� Techniques that automatically move program and data

blokes in to the physical main memory when they are

required for execution are called virtual memory

technique.technique.

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WHAT IS PAGING

� Paging is a memory management technique which basically makes use of part of your hard drive as it itwere RAM, thus creating "virtual memory.“

� It is useful if your PC doesn't have enough RAM to store everything on, so it can temporarily transfer some of it to the hard drive and store it until you need it again.to the hard drive and store it until you need it again.

� . When paging is used, the processor divides the linear address space into fixed-size pages (of 4KBytes, 2 MBytes, or 4 MBytes in length) that can be mapped into physical memory and/or disk storage.

� A special hardware unit,called the memory management unit (MMU) translates virtual address into physical address.

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ROLL OF MMU

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PAGING� Address generated by CPU divided into:

� Page number (p) - index to page table

� page table contains base address of each page in physical memory

(frame)

� Page offset (d) - offset into page/frame

CPU p d

page table

f

f d

physical

memory

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PAGING EXAMPLE

Page 0

� Page size 4 bytes

� Memory size 32 bytes (8 pages)

10

Page 0

Page 2

0

1

2

3

Page 1

Page 2

Page 3

4

3

7

1

2

3

Page TableLogical

Memory

Page 1

Page 3

Physical

Memory

4

5

6

7

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PAGING EXAMPLE

Pa

ge

0P

ag

e 1

0100

000

001

010

011

000

001

010

011

0 0 1 0 1 1

Page

Offset

Frame

Pa

ge

2P

ag

e 3

11

00

10

01

10

11

Page Table

Logical

Memory

100

101

110

111

Physical

Memory

100

101

110

111

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Physical Address

Offset

HOW TO IMPLEMENT PAGING?

� Page Table (One per process)

OffsetVirtualPage #Virtual Address:

Access

Error

>PageTableSize

PageTablePtr page #0

page #2

page #3

page #4

page #5

V,R

page #1 V,R

V,R,W

V,R,W

N

V,R,W

page #1 V,R

Check Perm

Access

Error

PhysicalPage #

� Page Table (One per process)� Resides in physical memory� Contains physical page and permission for each virtual page

� Permissions include: Valid bits, Read, Write, etc

� Virtual address mapping� Offset from Virtual address copied to Physical Address

� Example: 10 bit offset ⇒ 1024-byte pages

� Virtual page # is all remaining bits� Example for 32-bits: 32-10 = 22 bits, i.e. 4 million entries� Physical page # copied from table into physical address

� Check Page Table bounds and permissions

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PAGING HARDWARE

� address space 2m

� page offset 2n

� page number 2m-n

phsical

memory

2m bytes

page number

p

page offset

d

m-n n

•note: not losing any bytes!

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PAGING EXAMPLE

� Consider:

� Physical memory = 128 bytes

� Physical address space = 8 frames

� How many bits in an address?

� How many bits for page number?� How many bits for page number?

� How many bits for page offset?

� Can a logical address space have only 2 pages? How big would the page table be?

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ANOTHER PAGING EXAMPLE

� Consider:

� 8 bits in an address

� 3 bits for the frame/page number

� How many bytes (words) of physical memory?

How many frames are there?� How many frames are there?

� How many bytes is a page?

� How many bits for page offset?

� If a process’ page table is 12 bits, how many logical pages does it have?

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PAGE TABLE EXAMPLE

Page 0A

Page 0B

0

1

2

3

Page 0

Page 1

Process B

3

7

0

1

Page Table

page number page offset

b=7

1

4

0

1

Page Table

Page 0

Page 1

Process A

Page 1A

Page 1B

Physical

Memory

4

5

6

7

p

page offset

d

m-n=3 n=4

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PAGING TRADEOFFS

� Advantages

� no external fragmentation (no compaction)

� relocation (now pages, before were processes)

� Disadvantages

� internal fragmentation

� consider: 2048 byte pages, 72,766 byte proc

� 35 pages + 1086 bytes = 962 bytes� 35 pages + 1086 bytes = 962 bytes

� avg: 1/2 page per process

� small pages!

� overhead

� page table / process (context switch + space)

� lookup (especially if page to disk)

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IMPLEMENTATION OF PAGE TABLE

� Page table kept in main memory

� Page Table Base Register (PTBR)

Page 0

Page 1

1

4

0

1

Page 1

Page 0

0

1

2

1 4

PTBRPage 1 41

Page TableLogical

MemoryPhysical

Memory

Page 02

3

PTBR

• Page Table Length

• Two memory accesses per data/inst access.

– Solution? Associative Registers

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ASSOCIATIVE REGISTERS

CPU

p d

f dpage

number

frame

numberhit

logical

address10-20% mem time

page table

f

physical

memory

associative

registers

miss

physical

address

(Intel P3 has 32 entries)

(Intel P4 has 128 entries)

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PAGE REPLACEMENT ALGORITHM

� When the page fault occurs i.e. required page is not in

memory during execution , the o.s has to choose a page

to move from memory to make room for the incoming

page.

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PROCEDURE OF PAGE REPLACEMENT

�1]Page to be removed is selected.

�2]If the page to be removed is modified it must �2]If the page to be removed is modified it must

be written to the disk to bring the disk copy up to

date

�3]If the page to be removed has not been

modified , it can be overwritten .

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TYPES OF PAGE REPLACEMENT

ALGORITHM

1) FIFO( First in first out) page replacement algorithm.

2) Second chance page replacement.

3) Clock page replacement.

4) Least Recently Used page replacement

5) Working set page replacement

6) Working Set Clock page replacement.

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� Suppose we have 3 page frames, 4 virtual pages, and following reference stream: � A B C A B D A D B C B

� Consider FIFO Page replacement:

EXAMPLE: FIFO

CDA

BCBDADBACBA

1

Ref:

Page:

� FIFO: 7 faults.

� When referencing D, replacing A is bad choice, since need A again right away

C

B

A

D

C

B

A

3

2

1

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2.SECOND CHANCE PAGE REPLACEMENT

� 1] It is modified version of FIFO algo.

� 2] It avoids the problem of throwing out a heavily used page.

� 3] An additional bit R (read) is attached to each page in memory.memory.

� 4] Whenever a page is accessed R bit is set to 1.

� 5]If it is 0,page is old and unused and replaced immediately

� 6] If it is 1,it is cleared and inserted back in the FIFO queue.

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SECOND CHANCE ILLUSTRATION

�Max page table size 4

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

B u:0

first loaded page

A u:1 D u:0 C u:0

last loaded page

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SECOND CHANCE ILLUSTRATION

�Max page table size 4

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

B u:0

first loaded page

A u:1 D u:0 C u:0

last loaded page

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SECOND CHANCE ILLUSTRATION

�Max page table size 4

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

A u:1

first loaded page

D u:0 C u:0 F u:0

last loaded page

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SECOND CHANCE ILLUSTRATION

�Max page table size 4

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

� Access page D

� Page E arrives

A u:1

first loaded page

D u:1 C u:0 F u:0

last loaded page

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SECOND CHANCE ILLUSTRATION

�Max page table size 4

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

� Access page D

� Page E arrives

D u:1

first loaded page

C u:0 F u:0 A u:0

last loaded page

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SECOND CHANCE ILLUSTRATION

�Max page table size 4

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

� Access page D

� Page E arrives

C u:0

first loaded page

F u:0 A u:0 D u:0

last loaded page

E u:0

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DISADVANTAGE OF SECOND CHANCE PAGE

REPLACEMENT ALGORITHM

� It is unnecessarily inefficient because it is

constantly moving pages around on its listconstantly moving pages around on its list

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CLOCK REPLACEMENT ILLUSTRATION

�Max page table size 4

� Invariant: point at oldest page

� Page B arrivesB u:0

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CLOCK REPLACEMENT ILLUSTRATION

�Max page table size 4

� Invariant: point at oldest page

� Page B arrives

� Page A arrives

� Access page A

B u:0

A u:0

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CLOCK REPLACEMENT ILLUSTRATION

�Max page table size 4

� Invariant: point at oldest page

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

B u:0

A u:1

D u:0

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CLOCK REPLACEMENT ILLUSTRATION

�Max page table size 4

� Invariant: point at oldest page

� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

B u:0

A u:1

D u:0

C u:0

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CLOCK REPLACEMENT ILLUSTRATION

�Max page table size 4

� Invariant: point at oldest page

B u:0� Page B arrives

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

F u:0

A u:1

D u:0

C u:0

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�Max page table size 4

� Invariant: point at oldest page

� Page B arrives

� Page A arrives

CLOCK REPLACEMENT ILLUSTRATION

C u:0E u:0

� Page A arrives

� Access page A

� Page D arrives

� Page C arrives

� Page F arrives

� Access page D

� Page E arrives

A u:1A u:0

D u:1D u:0

F u:0

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NTH CHANCE VERSION OF CLOCK ALGORITHM� Nth chance algorithm: Give page N chances

� OS keeps counter per page: # sweeps

� On page fault, OS checks use bit:� 1⇒clear use and also clear counter (used in last sweep)

� 0⇒increment counter; if count=N, replace page

� Means that clock hand has to sweep by N times without page being used before page is replaced

� How do we pick N?� Why pick large N? Better approx to LRU� Why pick large N? Better approx to LRU

� If N ~ 1K, really good approximation

� Why pick small N? More efficient� Otherwise might have to look a long way to find free page

� What about dirty pages?� Takes extra overhead to replace a dirty page, so give dirty pages an extra chance before replacing?

� Common approach:� Clean pages, use N=1

� Dirty pages, use N=2 (and write back to disk when N=1)

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CLOCK ALGORITHMS: DETAILS

� Which bits of a PTE entry are useful to us?

� Use: Set when page is referenced; cleared by clock algorithm

� Modified: set when page is modified, cleared when page written to

disk

� Valid: ok for program to reference this page

� Read-only: ok for program to read page, but not modify

� For example for catching modifications to code pages!� For example for catching modifications to code pages!

� Do we really need hardware-supported “modified” bit?

� No. Can emulate it (BSD Unix) using read-only bit

� Initially, mark all pages as read-only, even data pages

� On write, trap to OS. OS sets software “modified” bit, and marks page as

read-write.

� Whenever page comes back in from disk, mark read-only

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CLOCK ALGORITHMS DETAILS (CONTINUED)

� Do we really need a hardware-supported “use” bit?

� No. Can emulate it using “invalid” bit:� Mark all pages as invalid, even if in memory

On read to invalid page, trap to OS� On read to invalid page, trap to OS

� OS sets use bit, and marks page read-only

� When clock hand passes by, reset use bit and mark page as invalid again

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LEAST RECENTLY USED PAGE REPLACEMENT ALGORITHM

� LRU replaces the page in memory that has not been used for the longest period of time.

� This algo. goes well with the principle of locality.

� A page that has not been used for a long time is least likely to be referenced in the near future.likely to be referenced in the near future.

� This algo. can be implemented by maintaining the backward distance of each page .

� When a page is referenced its backward distance is set to 0.

� Backward distance of other pages is incremented by 1.

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LEAST RECENTLY USED PAGE REPLACEMENT ALGORITHM

� LRU replaces the page in memory that has not been used for the longest period of time.

� This algo. goes well with the principle of locality.

� A page that has not been used for a long time is least likely to be referenced in the near future.likely to be referenced in the near future.

� This algo. can be implemented by maintaining the backward distance of each page .

� When a page is referenced its backward distance is set to 0.

� Backward distance of other pages is incremented by 1.

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� Consider the following: A B C D A B C D A B C D

� LRU Performs as follows (same as FIFO here):

D

WHEN WILL LRU PERFORM BADLY?

C

B

A

D

C

B

A

D

C

B

A

CBADCBADCBA D

3

2

1

Ref:

Page:

� Every reference is a page fault!

� MIN Does much better:

DABC3

B

C

DC

B

A

CBADCBADCBA D

3

2

1

Ref:

Page:

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� For example

� Consider the reference string

2 3 2 1 5 2 4 5 3 2 5 2

No. of page frames =3

These are the page frame::

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REFERENCE STRING

� Step 1:

2 3 2 1 5 2 4 5 3 2 5 22

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� Step 2:It causes page faults and brought into empty

frames.

� At this point backward dist. of page 2=1

� Backward dist of 3=0� Backward dist of 3=0

2 3 2 1 5 2 4 5 3 2 5 22 2

3

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step 3:

2 3 2 1 5 2 4 5 3 2 5 22 2

3

2

3

2

3

1

2

5

1

2

5

1

2

5

4

2

5

4

2

5

3

2

5

3

2

5

3

2

5

3

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WORKING SET PAGE REPLACEMENT

ALGORITHM

� Working set: The set of process that a process is currently using.

� The working set algorithm is based on determining a working set and evicting any page that is not present in the working set.

� Locality of reference : A process reference only a small fraction of its pages during any particular page of its execution.

� Thrashing : Result when a program causes page fault every few instruction, causing the page to pulled up from the memory. No instruction, causing the page to pulled up from the memory. No “real” useful work is being accomplished.

� Prepaging: Working set loaded into the memory before it begins execution.

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Information about one

page2084

2003

1

1Time of last use

Page table Reference bit

Page reference during

This tick

Page not reference during

This tick

2003

1980

1213

2014

2020

2032

1620

1

1

1

1

1

0

Time of last use

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� Scan all pages examining R bit:

� if (R==1) set

time of last use to current virtual

time

If (R==0and age>stc)� If (R==0and age>stc)

remove this page

� If (R==0and age>stc)

remember the smallest time

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WORKING SET CLOCK PAGE REPLACEMENT

ALGORITHM

� It is based on the clock algorithm but also uses the

working set information.

� Due to its simplicity of implementation and good

performance ,it is widely used.

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1620

20322084

R=0

2204

20322084

R=1

New page

2020

2014

1213

1980

20032020

2014

1213

1980

2003

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1620

20322084

1620

20322084

2020

2014

1213

1980

20032020

2014

1213

1980

2003

R=1

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ALGORITHM COMMENT

FIFO Might throw out important

pages

Second chance Big improvement over FIFO

Clock RealisticClock Realistic

LRU Excellent but difficult to

implement exactly

Working set Somewhat expensive to

implement

WS clock Good efficient algorithm

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DESIGN ISSUES FOR PAGING SYSTEMS

THE WORKING SET: � The reason that page faults decrease (and then stabilise) is

because processes normally exhibit a locality of reference

� At a particular execution phase of the process it only uses a

small fraction of the pages available to the entire processsmall fraction of the pages available to the entire process

� The set of pages that is currently being used is called its

working set

� If the entire working set is in memory then no page faults will

occur

� Only when the process moves onto its next phase will page

faults begin to occur again

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oIf the memory of the computer is not large enough to hold the

entire working set, then pages will constantly be copied out to disc

and subsequently retrieved

oThis drastically slows a process down and the process is said to be

thrashing

oThe paging system has to keep track of a processes’ working set sooThe paging system has to keep track of a processes’ working set sothat it can be loaded into memory before it is restarted.

oThe approach is called the working set model (or prepaging). Its aim,as we have stated, is to avoid page faults being raised.

oInformation about working set can be used by the operating systemto reduce page fault rate.

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LOCAL VERSUS GLOBAL ALLOCATION POLICIES

�A local alloction assigns a fixed number of frames to every running process.

�A global allocation dynamically allocates page frame among runnable processes.frame among runnable processes.

�Global policies tend to work better.�

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� If you use a local policy and the working set grows, you can get thrashing

� Similarly, if the working set shrinks, you waste

memory.memory.

� With a global policy, though, you need to decide

how much memory to allocate to each process.

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PAGE SIZE

� With large pages, we waste memory: on average, half of the last page isn’t used

� With small pages, we use a lot of memory for page tables� Call the average process size s and the page size p.� Assume that each page table entry (and associated data � Assume that each page table entry (and associated data

structures) takes e bytes� The overhead o is o = (s/p)e + p/2� To optimize for memory use, differentiate and set to 0:� do/dp = −se/p2 + 1/2 = 0� Best size: p = √2se

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OPERATING SYSTEM INVOLVEMENT WITH PAGING

Four times when OS involved with paging1. Process creation

− determine program size− create page table

2. Process execution2. Process execution− MMU reset for new process

3. Page fault time− determine virtual address causing fault− swap target page out, needed page in

4. Process termination time− release page table, pages

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PAGE FAULT HANDLING

1. Hardware traps to kernel

2. General registers saved

3. OS determines which virtual page needed

4. OS checks validity of address, seeks page frame

5. If selected frame is modified, write it to disk5. If selected frame is modified, write it to disk

6. OS schedules disk operation to bring new page in from disk

7. Page tables updated

8. Faulting process re scheduled for execution

9. Registers restored

10. Program continues

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SEGMENTATION

WHY USE SEGMENTS?

�Segmentation allows the programmer to view memory consisting of multiple address spaces or segments.or segments.

�A program can be divided into code segment,stack segment and data segment.

�As segments are logically independent, a program segment can be changed or recomplied at any time without affecting other segments.

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oSegmentation can be used to protect a

program from unauthorized access.program from unauthorized access.

It is easy to share segments by different

programs.

Each process has its own segment table.

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SEGMENTATION ALLOWS EACH TABLE TO

GROW OR SHRINK INDEPENDENTLY

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PROBLEMS WITH SEGMENTS?

�Maximum contiguous address space is limited by segment size.

�For example, on the Intel 286, segments were limited to 64K; that meant that no array could limited to 64K; that meant that no array could be larger than 64K bytes.

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COMPARISON OF PAGING AND SEGMENTATION