TSKS01&Digital&Communication - commsys.isy.liu.se · TSKS01&Digital&Communication ......

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TSKS01 Digital Communication Lecture 11 Software Defined Radio Emil Björnson Department of Electrical Engineering (ISY) Division of Communication Systems Outline of the Lecture ! Introduction to software defined radio ! Lab system overview ! First impressions ! Abstraction layers ! The hardware – USRP (Universal Software Radio Peripheral) ! The software – GNU radio ! Connecting stuff ! Running stuff ! Introduction to Python 2015R11R16 TSKS01 Digital Communication R Lecture 11 2 Introduction: Software Defined Radio (SDR) ! Idea: As much as possible in software – Provides flexibility ! WideRband sampling – Large bandwidths. ! Vision: Flexible radio equipment, easy updates. ! The industry is interested in SDR. 2015R11R16 TSKS01 Digital Communication R Lecture 11 3 Lab System Overview: USRP – Universal Software Radio Peripheral ! Made by Ettus Research ! Mostly openRsource design ! Suitable for prototyping ! Used for SDR research ! Normal PC used for signal processing ! USB interface to PC ! Programmable FPGA for baseRband manipulations ! Fixed replaceable RF frontends 2015R11R16 TSKS01 Digital Communication R Lecture 11 4

Transcript of TSKS01&Digital&Communication - commsys.isy.liu.se · TSKS01&Digital&Communication ......

TSKS01&Digital&CommunicationLecture&11Software&Defined Radio

Emil&Björnson

Department&of&Electrical&Engineering&(ISY)Division&of&Communication&Systems

Outline of the&Lecture

! Introduction&to&software&defined&radio! Lab&system&overview! First&impressions

! Abstraction&layers

! The&hardware&– USRP&(Universal&Software&Radio&Peripheral)! The&software&– GNU&radio

! Connecting&stuff! Running&stuff

! Introduction&to&Python

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Introduction:&Software&Defined&Radio&(SDR)

! Idea:&As&much as&possible in&software&– Provides flexibility! WideRband sampling&– Large bandwidths.! Vision:&Flexible&radio&equipment,&easy updates.! The&industry is&interested in&SDR.

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Lab&System&Overview:&USRP&– Universal&Software&Radio&Peripheral

! Made&by&Ettus Research! Mostly&openRsource&design! Suitable for&prototyping! Used&for&SDR&research! Normal&PC&used&for&signal&processing! USB&interface&to&PC! Programmable&FPGA&for&baseRband&manipulations! Fixed&replaceable&RF&frontends

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Lab&System&Overview:&GNU&Radio

! OpenRsource&software&framework&for&SDR! Runs&on&standard&Linux/Windows&computers! Flowgraphs define&signal&processing&chains! Primitive&blocks&written&in&C++! Flowgraph models&in&Python

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USRP&motherboard

Programmable&digital&hardware

GNURRadio&code

Software&on&host&computer

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Overview:&InteractionFlexibility:&Do&as&much of&the&signal&processing as&possible in&software.

Signal&generation

Settings

Signal&processing

D/A14&bit

Interpolating&filters

A/D12&bit

Decimating&filters MUX

A/D12&bit

MUX

D/A14&bit

128&MS/s

64&MS/s

USB

Daughter&boards

Manually&selectableanalog&hardware

Initial&signal&manipulation

Further signal&manipulation

Further&signal&manipulation

Initial&signal&manipulation

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First&Impressions

Yikes!!Documentation?

Tutorials?

VHDL

C++

SWIGPython

Hardware

USB

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Abstraction&Layers

USRP

Host computer

Python'code Connecting&blocks

SWIG Glue between Python and&C++

C++'modules Definition&of&blocks

VHDL'code'on'FPGA Programmable&filters

Hardware Electrical&signals

Some'of'this'is'sufficentat'the'lab'exercises

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The&USRP&– Front&Panel

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The&USRP&– Mother&BoardFPGA

Connector&to&Tx&daughterboard&A

A/D&and&D/A&converters

Connector&to&Rx&daughterboard&A

Connector&to&Tx&daughterboard&B

A/D&and&D/A&converters

Connector&to&Rx&daughterboard&B

USB&interface

Tx =&TransmitterRx&=&Receiver

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USRP&– Mother&Board&Functionality

DDC&=&Digital&downRconversionDUC&=&Digital&upRconversion

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USRP&– Mother&Board&Block&Diagram

The&USRP&– USB&Interface

! USB&capabilities! USB&2.0:&480&Mbit/s! FPGA&firmware:&32&MB/s&(=&256&Mbit/s)&useful&data&rate

! 32&bit&complex&samples&(16&bits&each&for&real/imaginary)! Limit:&8&MS/s&(combined&for&all&tx/rx streams&on&one&computer)

! USB&transmission&order:

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I0 Q0 I1 Q1 I0 Q0 I1 Q1

16&bits 16&bits 16&bits 16&bits 16&bits 16&bits 16&bits 16&bits

The&USRP&– Daughter&Boards&1(2)! BaseRband&boards:&BasicTX/BasicRX,&LFTX/LFRX

! Bandwidth:&250&MHz&(Basic),&30&MHz&(LF)! Can&not&connect&directly&to&antenna

! WBX&R WideRband&transceiver! 50&MHz&– 2.2&GHz! Relatively&poor&performance

! TVRX&R 50&– 860&MHz&receiver! Bandwidth:&6&MHz

! Suitable&for&receiving&TV&signals

! RFXRseries&R General&fullRduplex&transceivers! Bandwidth:&30&MHz! Bands:&400–500&MHz,&750–1050&MHz,&1150–1450&MHz,1.5–2.1&GHz,&2.3–2.9&GHz

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Used in&labexercises

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The&USRP&– Daughter&Boards&2(2)

LFTX

LFRX

RFXR2400

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GNU&Radio&– Software&Layers

PythonConfig &&UI

SWIG SWIGSWIGGlue

Data&flow

Signal&ProcessingPrimitives

Hardware USRP USRP

C++ C++C++

Buffers on&all&block&outputs

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GNU&Radio&– Flowgraphs

Complexsymbols

Data&source FramerError

control ModulatorBit&mapper USRP

Data&types must&match&in&each connection.

Bits

Filter

Complexsamples

Data&types may vary along a&flowgraph.

from gnuradio import grfrom gnuradio import audio

class my_top_block(gr.top_block):def __init__(self):

gr.top_block.__init__(self)

sample_rate = 48000ampl = 0.1

src0 = gr.sig_source_f(sample_rate, gr.GR_SIN_WAVE, 350, ampl)src1 = gr.sig_source_f(sample_rate, gr.GR_SIN_WAVE, 440, ampl)dst = audio.sink(sample_rate)

self.connect(src0, (dst, 0))self.connect(src1, (dst, 1))

tb = my_top_block()tb.run()

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GNU&Radio&– Hello&World!

gr.sig_source_f

gr.sig_source_faudio.sink

GNU&Radio&– Block&Naming&Convention

! Block&naming:&lib.blocktype_suffix! lib is&the&library:

gr for&most&primitive&signal&processing&blocksblks2 for&highRlevel&signal&processing&blocksusrp for&USRP&interfacing&blocksaudio for&audio&sources&and&sinksqtgui for&GUI&library&(relatively&bare)wxgui for&old&GUI&libraryProjects&usually&use&their&own&library

! suffix determines&port&typesb for&byte,&s for&16Rbit&int,&i for&32Rbit&int,&f for&32Rbit&float,&c for&64Rbit&complexx for&sources&and&sinksxx for& twoRport&blocksxxx for&parameterized&blocks&

(e.g.&ccf for&FIR&filter&with&complex&data&and&float&coefficients)vx,&vxx for&blocks&with&vector&ports

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GNU&Radio&– Some&Useful&Blocks! gr.noise_source_f :&

Generates&random&float&samples&with&specified&distribution.! gr.add_cc :&

Adds&two&streams&of&complex&samples.! gr.nlog10_ff :&

Computes&dB&of&a&stream&of&floats.! gr.fir_filter_ccc :&

FIR&filter&with&complex&input,&output&and&coefficients.! audio.source :&

Stream&of&floats&from&lineRin/mic.! usrp.sink_c :&

USRP&sink&for&transmitting&a&complex&stream.! qtgui.sink_c :&

GUI&element&with&oscilloscope,&FFT&and&constellation&diagram.

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GNU&Radio&– Connecting&Blocks

Block1

Block2

Block3

self.connect(Block1, Block2)self.connect(Block1, Block3)

Block1 Block2 Block3 self.connect(Block1, Block2, Block3)

Restriction:&Both Block2&and&Block3&must&consume the&data.If&Block2&does not,&then Block3&will stall.

Equivalent:self.connect(Block1, Block2)self.connect(Block2, Block3)

GNU&Radio&– RunRTime&Behaviour

! Heavily&threaded! Each&block&runs&in&a&separate&thread

! Most&blocks&have&threadRsafe&configuration&functions

! Starting&a&flow&graph:! gr.top_block.run():&Spawns&threads,&waits&for&completion

! gr.top_block.start():&Spawns&threads&and&returns

! Stopping&it:! gr.top_block.stop()

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from gnuradio import grfrom gnuradio import audioclass my_top_block(gr.top_block):

def __init__(self):gr.top_block.__init__(self)self.src = gr.sig_source_f(48000,

gr.GR_SIN_WAVE, 350, 0.1)self.dst = audio.sink(48000)self.connect(self.src, self.dst)

tb = my_top_block()tb.start()f = 440while f>0:

c = raw_input(”Enter frequency: ”)f = float(c)tb.src.set_frequency(f)

tb.stop()

Python

! Python&isA&fullRblown&highRlevel&programming&languageHalfRcompiled,&halfRinterpreted&

! Python&supportsObjectRoriented&programmingProcedural&programmingFunctional&programming&(to&some&extent)Interactive&testing&of&code

! Python&is&used&forScriptingWebRdevelopmentFullRblown&computer&applications&with&GUIs.

! Python&is&used&byGoogle,&YouTube,&NASA,&Disney,&Hubble,&CommSys,&…

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