Tips on IC layout - Johns Hopkins University Whiting...

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Tips on IC layout

Transcript of Tips on IC layout - Johns Hopkins University Whiting...

Page 1: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Tips on IC layout

Page 2: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

A Typical Digital Circuit layout

Page 3: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Design Flow

Page 4: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Drawing a single transistor

Make sure to put multiple contacts for large transistors

Page 5: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &
Page 6: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Compact Your Transistors

Page 7: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Compact Your Transistors

Page 8: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Use multiple fingers for your transistors

Page 9: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Transistor Parasitic Capacitance

Page 10: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Avoid Extra Parastic

Page 11: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Leave plenty of extra space

Page 12: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &
Page 13: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &
Page 14: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &
Page 15: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &
Page 16: Tips on IC layout - Johns Hopkins University Whiting ...etienne.ece.jhu.edu/etienne/teaching/ECE491/current/Cadence...Post-Layout Simulation [Schematic Entry snce CCystom Extract &

Reference • http://www.eda-utilities.com/CMOS_Transistor_Layout_KungFu.pdf