The VCSEL-based Array Optical Transmitter (ATx) Development

Towards a 120-Gbps Link for the HL-LHC Experiments

D. Guo,1,2 J. Chen,3 J. Chramowicz,4 D. Gong2, D. Huang5, S. Hou,6 G. Jin,1 C. Liu,2 H. Liang,1 T. Liu,2 X. Li,7,2 A. Prosser,4 P.K. Teng,6 A.C. Xiang,2 J. Ye,2 Y. You,5 and Y.Z. Zhou1

1 University of Science and Technology of China, Hefei, Anhui 230026, P. R. China 2 Dept. of Physics, Southern Methodist University S(MU), Dallas, TX 75275, USA 3 Arizona State University at Tempe, Tempe, Arizona 85281, USA 4 Electronic Systems Engineering Department, Fermi Lab, Batavia IL 60510, USA 5 Department of Electrical Engineering, SMU, Dallas, TX 75275, USA 6 Institute of Physics, Academia Sinica, Nangang 11529, Taipei, Taiwan 7 Central China Normal University, Wuhan, Hubei 430079, P.R. China

Outline

• ATx overview

– Optical interface

– Electrical Interface

• Assembly

– Active Alignment Method

• Test results

• VCSEL array driver ASIC: LOCld4

• Summary and future plan

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• ATx is a compact, radiation-tolerant, 12-channel, array optical

transmitter module towards the 120-Gbps optical link • ATx integrates

• a VCSEL array: ULM 850-10-TT-N0112U • a VCSEL array driver: COTS (Gigoptix HXT5112A) or ASIC LOCld4 • Substrate with electrical interface: FR4 PCB / Ceramic substrate • optical components (MOI and prism connector)

ATx Overview

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Overview - Optical Interface

• The output lights of VCSELs are collimated by micro-lenses (Mechanical Optical Interface, MOI) and deflected by 90 degree using a Prizm Connector.

• MOI are aligned with the VCSEL array and tacked down to the substrate with epoxy.

• Prizm Connector is clipped onto the MOI.

Prizm Connector

MOI

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Overview - Electrical Interface

Connector Version

Edge Wrap version

• A 2.0 cm x 2.2 cm x 0.1 cm substrate with different electrical interface

– Connector Version: Mezzanine connector

– Edge Wrap Version: “half-vias” around the substrate

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Outline

• ATx overview

– Optical interface

– Electrical Interface

• Assembly

– Active Alignment Method

• Test results

• VCSEL array driver ASIC: LOCld4

• Summary and future plan

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ATx Module Assembly • The ATx module assembly process consists of die attachment, wire bonding,

MOI assembly and reflow soldering.

• MOI alignment is the most critical and difficult step in the whole assembly: the 12 micro lenses of the MOI need to be aligned with the 12 apertures of the VCSEL array within a tolerance of 10 um.

ATx Assembly

Die attachment

Wire bonding

MOI Alignment and attachment

Reflow soldering 7

Active Alignment Method • “MOI Alignment Test Board” has been designed for the alignment

development. It can turn on/off each channel of the VCSEL Array.

• The VCSEL Array will be turned on when aligning the MOI with it. The optical output will guide the alignment process. (Active alignment)

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• The picture shows the movement method of the MOI and the substrate.

Active Alignment Method

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• A picture captured during the MOI alignment process.

Active Alignment Method

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P 2.0944 dBm λ 850.0 nm P 1.5396 dBm λ 850.0 nm

Current of two channels

Rotation stage

3D stage

Alignment Board

Outline

• ATx overview

– Optical interface

– Electrical Interface

• Assembly

– Active Alignment Method

• Test results

• VCSEL array driver ASIC: LOCld4

• Summary and future plan

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Results - Alignment Performance

• The figure below shows a successfully aligned and epoxied MOI module and its optical outputs. The VCSEL was DC driven. The DC current of each channel is 9 mA.

• Now each MOI alignment process can be finished within 15 min in the lab, and the coupling insertion loss can be controlled < 3 dB

• Channel-to-channel variation is < 1 dB

• The light crosstalk within the adjacent channel is < -50 dB

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-0.5

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1.5

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1 2 3 4 5 6 7 8 9 10 11 12

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Channel Number

Optical output of 12 Channels

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Results – Optical eye diagram

• Eye diagram: 10G optical eye diagrams captured from the one channel of the ATx with a commercial VCSEL array driver (Gigoptix HXT5112A).

• BER: The bit-error rate (BER) less than 10-12 transmission is achieved at 10 Gbps/ch.

Ch 11, 10Gbps, 2^7-1 PRBS

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Results – Irradiation test • Are MOI and prism radiation tolerant?

• VCSEL array, MOI & Prizm Connector were irradiated,

• X-rays with the maximum energy of 160 keV

• VCSEL biased at 9 mA and optical power monitored

• Dose rate of 6.7 Mrad (SiO2)/hr

• Total dose 96 Mrad.

• No radiation induced attenuation was found

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0 Total dose (krad)

10,000

Outline

• ATx overview

– Optical interface

– Electrical Interface

• Assembly

– Active Alignment Method

• Test results

• VCSEL array driver ASIC: LOCld4

• Future plan

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ASIC: LOCld4

• LOCld4 is a 4-channel, 8-Gbps-per-channel, radiation-tolerant VCSEL array driver ASIC with open-drain output structure, fabricated in a commercial 0.25-µm Silicon-on-Sapphire (SOS) CMOS technology.

• Six pre-driving stages with active shunt peaking technology to improve the bandwidth.

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ASIC: preliminary Test Results

• We replaced the commercial driver with the LOCld4 recently in the ATx module.

• An 8 Gbps optical eye diagram was captured from one channel of the LOCld4 after integrated with the ATx module.

8G PRBS

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Summary and future Plan

• An active alignment process has been successfully developed.

• MOI, prizm connector, and a VCSEL array has been verified to tolerate 96 Mrad.

• A radiation-tolerant VCSEL array driver ASIC is being developed.

• A VCSEL-based array optical transmitter module towards a 120-Gbps link has been proved in principle.

• Future plan: – LOCld12: 4 channels 12 channels, full I2C digital control.

– Towards higher speed: 65-nm CMOS technology, 10 Gbps/ch (120 Gbps per module) or even higher.

– More tests on the ATx module: whole module radiation tolerance (TID, NIEL, SEE), temperature cycling, lifetime accelerating, …

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