The Architectural Implications of Autonomous Driving · Design Constraint: Performance!8 Camera...
Transcript of The Architectural Implications of Autonomous Driving · Design Constraint: Performance!8 Camera...
Challenges
“Correct” Decisions
“Real-Time” Decisions
Power Budgets
!2
Challenges
“Correct” Decisions
“Real-Time” Decisions
Power Budgets
!3
Computational Pipeline
!4
Camera
LIDAR
Radar
GPS
Sensing
Object Detection
Lane Detection
Traffic Light Detection
Traffic Sign Detection
Localization
Perception
Route Planning
Motion Prediction
Behavior Planning
Trajectory Planning
Planning
Control
Computational Pipeline
!5
Camera
LIDAR
Radar
GPS
Sensing
Object Detection
Lane Detection
Traffic Light Detection
Traffic Sign Detection
Localization
Perception
Route Planning
Motion Prediction
Behavior Planning
Trajectory Planning
Planning
Control
Computational Pipeline
!6
Camera
LIDAR
Radar
GPS
Sensing
Object Detection
Lane Detection
Traffic Light Detection
Traffic Sign Detection
Localization
Perception
Route Planning
Motion Prediction
Behavior Planning
Trajectory Planning
Planning
Control
Computational Pipeline
!7
Camera
LIDAR
Radar
GPS
Sensing
Object Detection
Lane Detection
Traffic Light Detection
Traffic Sign Detection
Localization
Perception
Route Planning
Motion Prediction
Behavior Planning
Trajectory Planning
Planning
Control
Design Constraint: Performance
!8
Camera
LIDAR
Radar
GPS
Sensing
Sensors generate 1-2GB of data per second. Autonomous vehicle system should provide:
High Throughput Low Latency
!9
Camera
LIDAR
Radar
GPS
Sensing
Object Detection
Lane Detection
Traffic Light Detection
Traffic Sign Detection
Localization
Perception
Route Planning
Motion Prediction
Behavior Planning
Trajectory Planning
Planning
Control
Tail latency <= 100ms
Design Constraint: Predictability
!10
Localization
Design Constraint: Storage
41 TB!
4TB of logging data generated by a car each day.
!11
Design Constraint: Thermal and Power
“Datacenter on wheels.”
Power requirements of up to 3kW.
!12
Key Idea
FPGAsGPUs ASICs
Exploit different accelerator platforms to achieve predictability and performance while reducing the power requirements.
!13
Implementation
Detector Tracker
Localization
!14
Metrics of Success
!15
DiscussionAre DNNs the major computational part of the perception pipeline?
!16
DiscussionWhat is the reason for zero variability in both ASICs and FPGAs?
Mean Latency 99.99th Percentile Latency
What is the source of runtime variability for the GPU?
!17
DiscussionWhat about the cost of inter-component communication across the devices?