Teradyne J750 架構 1.AC Power vault / Manipulator 2.Tester 3. 測試機板介紹 4.K Docking...

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Teradyne J750 架架 1. AC Power vault / Manipulator 2. Tester 3. 架架架架架架 4. K Docking system 5. Calibrate TDR 6. 架架架架架架

Transcript of Teradyne J750 架構 1.AC Power vault / Manipulator 2.Tester 3. 測試機板介紹 4.K Docking...

Teradyne J750 架構

1. AC Power vault / Manipulator 2. Tester 3. 測試機板介紹4. K Docking system5. Calibrate TDR6. 操作注意事項

AC Power Vault

Main Circuit Breaker CB1

Power on switch

Power off switch

EMO

AC Power Module

AC Main Power Cable

Remote EMO Connector

Tester Control Power Circuit Breaker CB6

AC power Vault 開電方式 :

CB1→CB6 →CB5 → Power ON switch

CB3 CB4 CB5

測試頭左右翻轉

測試頭上下

Manipulator

K Docking Module

測試頭前後翻轉

左右以及 θ 角

K DockingModule

真空表 吸住 PIB 時真空值須在綠色範圍 (20 IN.HG) 以上

J750 Test head

EMO

Power ON switchPower Off

switch

K DockingPendant

Connector

Vacuum Pull down Assembly

Vacuum ActivationSwitch

Fan PlateAssembly

Power Cable

Air Source Connector

TCIO Cable

Circuit Breakers

Tester 開電 : 需按壓 Power On 三秒

Vacuum ActivationSwitch

LCD Channel Boards,

HSD Channel Boards,

APMU or Full SizeOptional

Instruments

LCD Channel Boards,

HSD Channel Boards,

APMU or Full SizeOptional

Instruments

DPS, HVDPS orHDVIS Boards

5, 10.5 and 24 Volt Power

Supply

Power SupplyBus Bars

-5 Volt Power Supply

3.3 and 24Volt Power Supply

Power SupplyBus Bars

-10, 15, 34 and -36 Volt Power Supply

CAL-CUBBoard

CTO BoardCTO Board

Calibration-Clock Utility Board (CALCUB)

performs a number of functions in the J750E/Ex tester :

• Distribution and control of J750E/Ex TCIO data buses• Sync signals for data transfer• Generates and distributes master clock• Provides switched power to the Device Interface Board (DIB)• Monitors system power supplies 3.3v, 5v, -5v, 10.5v and 24R (ground).• Monitors DIB power supplies 5v, 12v, 15v, -15v and 24v• Monitors the fans and opens the main contactor—Monitor Fan• Reads back DIB ID prom information• Contains calibration circuitry• Voltage and Current Source References• Metering Circuit• Master Clock Reference• SLI-TDR Pulse

The J750Ex channel board is a 200 MHz,64 MVector digital instrument, a complete Digital subsystem on a single board. Each board contains 64 digital channels. Some of the features of the channel board include:• 64 channels on each channel card• Up to 512 or 1024 channels in a test system• Up to 8 digital channel cards in a 512 channel test system• Up to 16 digital channel cards in a 1024 test system• Up to 200 MHz operation (in Quad mode)

HSD 200 ( Channel Board)

High Density Voltage/Current Source Option (HDVIS)

The High Density Voltage/Current Source option (HDVIS) is a J750 option which was developed as a multi-channel power supply for the J750 test platform. The HDVIS option can be used in the following J750 platforms: standard J750, enhanced J750 (J750E), J750Ex (200 MHz) and the D750Ex . Each HDVIS board has twenty four (24) channels and each channel is capable of providing four quadrant voltageand current (V/I) force and measurement functionality. Each channel on the HDVIScan measure and force up to a maximum of +/-10 volts and a maximum of +/- 200 mA of current.The HDVIS is a half-sized board similar in size to the present J750 Device Power Supply (DPS) board. The HDVIS option can either replace or work in conjunction with the Device Power Supply option. HDVIS Features:• Flexible configurations (1 Normal Mode and 3 Merged Modes)• Four quadrant operation for voltage and current• 6 current measurement ranges • Voltage measurement from -10 to +10 volts• Force and Ground Kelvin to DIB• Kelvin safety (Kelvin test voltage• Supplies can be used in parallel (Merged) configurations• Driven guard• Contain multiplexed Analog-to-Digital converter (ADC)

Mixed Signal Option (MSO)

The Mixed Signal Option (MSO) provides the J750E/Ex tester with the ability to source, capture and analyze analog signals as well as the digital representation of analog signals on mixed-signal microcontrollers with embedded analog functionality on up to 32 sites in parallel.The mixed signal option is comprised of the following two fully independent modules:• Low-to-Mid Frequency Analog Source I/O Module (ASIO)• Digital Source I/O Module (DSIO) The MSO requires that the following Teradyne software be installed on the test system computer:• IG-XL V3.40.00 or later and J750 Maintenance Software V7.10.00 or later

Device Power Supply (DPS)

The Device Power Supply (DPS) is a single quadrant power supply with 8 channels on each board. Its features include:• Up to 1 amp of current from 0 to 10 volts• Programmable current limit• 5 current measurement ranges• Voltage measurement from 0 to 6 volts• Force and Ground Kelvin to DIB• Kelvin safety (Kelvin test voltage)• Supplies can be used in parallel configurations• Driven guard• Contain multiplexed Analog-to-Digital converter (ADC)

K Docking System

Docking Module

Docking Module

Latch Pin Docking Groove

DOCKED LED

A,B,C LED READY/ error LED

Docking Control Pad

DOCK Button

UNDOCK Button

Docking 步驟

1. Test Head Lock PIB . [ 吸住 PIB 時真空值須在綠色範圍 20 IN.HG 以上 ]2. Test Head 升至最高點 , 鬆開左右以及 θ 角的卡榫 .[ 注意最底下 PIB 勿撞到 Prober]3. Latch Pin 對準 Groove, 緩慢降下 Test Head. [ Latch Pin 共有 3 Pin: A.B.C.]4. A.B.C 3 個燈亮起 , 按下 DOCK 鍵 . [ DOCK 約需要 20 秒 , 動作完 DOCK 燈會亮 ]5. 鎖住左右以及 θ 角的卡榫 .

UNDOCKING 步驟

1. 按下 UNDOCK 鍵 , [ UNDOCK 約需要 20 秒 ] 2. 升起 Test Head 至最高點 .3. 再鬆開左右以及 θ 角的卡榫 . 擺動 Test Head [ 注意 Test Head 的高度以及 PIB. ]4. UNLOCK PIB. [ UNLOCK 時請扶好 PIB, 以免掉落 .]

Calibrate TDR 步驟及注意事項

Calibrate TDR 可以驗證目前的整個 contact 狀況 , 可以用以下步驟來驗證 .1. Load Program 完成進入工程模式 , Prober 端 P/C 已裝好 ( 不要 contact wafer.)2. Alt +F11 開啟 VB 視窗 , 在命令列輸入 Plotrtd=True3. 執行 TDR, Run 完成會出現右方視窗

4. TDR pass, Path RTD 值會在 5nSec 以上 5. DrvRcv RTD 值平均在 20nSec 以上 6. 若 TDR fail, 則會顯示是哪些 channel 造成 , 可針對 Pin 去做排除或重新 Dock.

TDR 注意事項

1. 更換 P/C, 或有維修而卸下 P/C 等步驟 , 重新

上機後都需做 Run TDR. 2. TDR 必須要 pass 才能測貨 . 3. Unlock P/C 前 , 請先執行指令 : thehdw.DIB.poweron=False

操作注意事項

• Manipulator 為手動控制 , 為維護人員及設備的安全 . Mount Testhead 請以 2 個人操作以確保安全 .• Docking 時先確認 Docking Pin 的位置正確再進行 Dock 的動作 .• 轉動測試頭請扶住測試頭下緣 避免測試頭往下掉落 .• PIB 上有突出的 Guide Pin, Docking 以及擺放時請特別留意 ; 在操作 PIB Vacuum Lock / Unlock 時也要注意以免 PIB 掉落 . • Docking 完成先做 Calibrate TDR 確認 contact . • 吸住 PIB 時真空表若顯示真空異常 , 請勿上機 .• TCIO Cable 容易損壞 , 不可踩踏或用力折曲 .