Super Small, Sub 2µm Pixels for Novel CMOS Image Sensors Workshops/2007 Worksho… ·  ·...

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Super Small, Sub 2μm Pixels for Novel CMOS Image Sensors G.Agranov, R.Mauritzson; S.Barna, J.Jiang, A.Dokoutchaev, X.Fan; X.Li Micron Technology, Inc., 8000 S. Federal Way, Boise, Idaho 83707-0006 Tel: 208-368-4268, Fax: 208-368-4660, [email protected] Abstract Pixel shrink is a driving force for novel CMOS image sensor development used in mobile and DSC applications. This paper describes the latest results in super small, sub 2μm pixel development at Micron Technology, Inc. Presented are results of optical and electrical characterization of super small pixels and their respective pixel arrays. The paper consid- ers general light signal characteristics, spectral characteristics, quantum efficiency and crosstalk of super small pixels, and their effect on the final quality and signal-to-noise ratio of the color image post color processing. 1.75μm Pixel Development Micron demonstrated the first image from a 1.75μm pixel ar- ray in June 2005 [1]. In the two years since the first pixel ar- rays were demonstrated, significant progress has been made in 1.75μm pixel and process development. Several generations of 1.75μm pixels were created over this period of time, and a full line of image sensors with different array sizes (from 1.3Mp through 8Mp) are in production now. This paper will compare optical and electrical characteristics of 1.75μm pixels used in the first and current generations of pixel arrays and image sen- sors. To date, Micron’s development of the 1.75μm pixel has been focused on using our common element pixel architecture (CEPA) with 1.75- and 1.5-equivalent transistors, per pixel. Early 1.75μm pixel generations utilized asymmetrical pixel structures, enabling a high conversion gain of the floating dif- fusion (up to 115uV/e for the 4-way CEPA), large photodiode fill factor, and a large pixel capacity (up to 9200 electrons for the linear full well). Current pixel designs focus more on symmetrical pixel architectures where metal openings and photodiodes are equally spaced for pixels within different color planes. Symmetrical architectures simplify pixel shading and color distortion compensation at the system level; how- ever, keeping the same level of pixel performance in regards to fill factor and pixel capacity becomes a significant chal- lenge. This is partially resolved by using an advanced 95nm manufacturing processes for the pixel array. Figure 1 presents photodiode fill factors and pixel capacities for different revi- sions of Micron’s 1.75μm pixel. The square, triangle, and cir- cle data points represent versions of the pixel with an asym- metrical, quasi-symmetrical, and practically fully symmetrical design. Solid data points represent pixel capacity, and hollow data points - fill factor. Arrows at the bottom of the plot indi- cate manufacturing process nodes used for the respective pixel designs. As can be seen from the plot, the latest pixels with a symmetrical design achieve similar fill factor and pixel capac- ity to their asymmetrical predecessors - 43% fill factor and 9200 electrons for the linear full well. Quantum efficiency and crosstalk are two of the most impor- tant pixel characteristics that significantly affect sensitivity, general image quality, and signal-to-noise ratio after color processing. Optimization of the pixel was accomplished in several aspects: optimization of the optical path of the pixel, optimization of the pixel design/architecture, and optimization of the Si substrate. Optimization of the pixel optical path in- cludes an advanced aluminum process with a reduced stack height of dielectric layers, a gapless microlens process, opti- mized metal routing, and embedded anti-reflective coatings. The total stack height between microlens and Si surface for the optimized process was reduced to less than 3.2μm, which provides a large-pixel acceptance angle of light as well as the ability to work with low-profile lenses with chief ray angles up to 27 degrees. By utilizing an advanced aluminum metal process, Micron eliminated the need to remove any light in- hibiting diffusion barrier layers associated with copper proc- essing. Figure 2 presents the results of a wave propagation simulation for the 1.75μm pixel with an optimized optical path for green light (550nm). As can be seen from the picture, light is well confined by pixel optics into the photodiode area. The pixel exhibits a large acceptance angle of light - signal degra- dation is less than 20 percent for angles of incident light up to 25 degrees. Optimization of the Si substrate was conducted by using both traditional p-substrate and n-substrate approaches. N- substrates significantly reduce electrical crosstalk by collect- ing and sinking carriers that are created with deep absorbed photons. Use of n-substrates also reduces dark current from the substrate. However, reduced thickness of p- EPI above the n-substrate can degrade QE for green and red pixels, resulting in degradation of overall sensitivity. Thus, optimization of the thickness of the p- EPI layer needs to be done to assure opti- mal trade off between quantum efficiency and crosstalk from the SNR after color processing stand point. Resulting experi- mental spectral response data for the p-substrate and n- substrate versions of a 1.75μm pixel currently in production are presented in Figure 3a and Figure 3b, respectively. These figures present both spectral response and crosstalk data calcu- lated according to [2]. The p-substrate version of the pixel QE maximum is equal to 42%, 45%, and 38% for blue, green, and red pixels respectively. The n-substrate version of the pixel has QE maximum equal to 42%, 37%, and 29% for blue, green, and red pixels respectively. As will be shown later, in spite of the slight degradation of QE for the n-substrate ver- sion of the pixel, overall sensitivity of the sensor after color processing becomes higher due to a significant reduction of electrical crosstalk. Also, the n-substrate version of the pixel exhibits higher SNRmax when compared with the p-substrate pixel at the same full well capacity due to lower crosstalk. For comparison purposes, the earliest generations of 1.75μm pix- els on the p-substrate exhibited QE maximum of 28%, 36%, and 23% for blue, green, and red pixels respectively. The pro- gress in pixel development resulted in about a 50% improve- ment in QE and a 40% improvement in crosstalk. Note that n- substrates may not provide an advantage for all pixel sizes, and the benefit of n-substrates becomes more advantageous in 307

Transcript of Super Small, Sub 2µm Pixels for Novel CMOS Image Sensors Workshops/2007 Worksho… ·  ·...

Super Small, Sub 2µm Pixels for Novel CMOS Image Sensors G.Agranov, R.Mauritzson; S.Barna, J.Jiang, A.Dokoutchaev, X.Fan; X.Li Micron Technology, Inc., 8000 S. Federal Way, Boise, Idaho 83707-0006

Tel: 208-368-4268, Fax: 208-368-4660, [email protected]

Pixel shrink is a driving force for novel CMOS image sensor development used in mobile and DSC applications. This paper describes the latest results in super small, sub 2µm pixel development at Micron Technology, Inc. Presented are results of optical and electrical characterization of super small pixels and their respective pixel arrays. The paper consid-ers general light signal characteristics, spectral characteristics, quantum efficiency and crosstalk of super small pixels, and their effect on the final quality and signal-to-noise ratio of the color image post color processing.

1.75µm Pixel Development Micron demonstrated the first image from a 1.75µm pixel ar-ray in June 2005 [1]. In the two years since the first pixel ar-rays were demonstrated, significant progress has been made in 1.75µm pixel and process development. Several generations of 1.75µm pixels were created over this period of time, and a full line of image sensors with different array sizes (from 1.3Mp through 8Mp) are in production now. This paper will compare optical and electrical characteristics of 1.75µm pixels used in the first and current generations of pixel arrays and image sen-sors. To date, Micron’s development of the 1.75µm pixel has been focused on using our common element pixel architecture (CEPA) with 1.75- and 1.5-equivalent transistors, per pixel. Early 1.75µm pixel generations utilized asymmetrical pixel structures, enabling a high conversion gain of the floating dif-fusion (up to 115uV/e for the 4-way CEPA), large photodiode fill factor, and a large pixel capacity (up to 9200 electrons for the linear full well). Current pixel designs focus more on symmetrical pixel architectures where metal openings and photodiodes are equally spaced for pixels within different color planes. Symmetrical architectures simplify pixel shading and color distortion compensation at the system level; how-ever, keeping the same level of pixel performance in regards to fill factor and pixel capacity becomes a significant chal-lenge. This is partially resolved by using an advanced 95nm manufacturing processes for the pixel array. Figure 1 presents photodiode fill factors and pixel capacities for different revi-sions of Micron’s 1.75µm pixel. The square, triangle, and cir-cle data points represent versions of the pixel with an asym-metrical, quasi-symmetrical, and practically fully symmetrical design. Solid data points represent pixel capacity, and hollow data points - fill factor. Arrows at the bottom of the plot indi-cate manufacturing process nodes used for the respective pixel designs. As can be seen from the plot, the latest pixels with a symmetrical design achieve similar fill factor and pixel capac-ity to their asymmetrical predecessors - 43% fill factor and 9200 electrons for the linear full well. Quantum efficiency and crosstalk are two of the most impor-tant pixel characteristics that significantly affect sensitivity, general image quality, and signal-to-noise ratio after color processing. Optimization of the pixel was accomplished in several aspects: optimization of the optical path of the pixel, optimization of the pixel design/architecture, and optimization of the Si substrate. Optimization of the pixel optical path in-cludes an advanced aluminum process with a reduced stack height of dielectric layers, a gapless microlens process, opti-mized metal routing, and embedded anti-reflective coatings.

The total stack height between microlens and Si surface for the optimized process was reduced to less than 3.2µm, which provides a large-pixel acceptance angle of light as well as the ability to work with low-profile lenses with chief ray angles up to 27 degrees. By utilizing an advanced aluminum metal process, Micron eliminated the need to remove any light in-hibiting diffusion barrier layers associated with copper proc-essing. Figure 2 presents the results of a wave propagation simulation for the 1.75µm pixel with an optimized optical path for green light (550nm). As can be seen from the picture, light is well confined by pixel optics into the photodiode area. The pixel exhibits a large acceptance angle of light - signal degra-dation is less than 20 percent for angles of incident light up to 25 degrees. Optimization of the Si substrate was conducted by using both traditional p-substrate and n-substrate approaches. N-substrates significantly reduce electrical crosstalk by collect-ing and sinking carriers that are created with deep absorbed photons. Use of n-substrates also reduces dark current from the substrate. However, reduced thickness of p- EPI above the n-substrate can degrade QE for green and red pixels, resulting in degradation of overall sensitivity. Thus, optimization of the thickness of the p- EPI layer needs to be done to assure opti-mal trade off between quantum efficiency and crosstalk from the SNR after color processing stand point. Resulting experi-mental spectral response data for the p-substrate and n-substrate versions of a 1.75µm pixel currently in production are presented in Figure 3a and Figure 3b, respectively. These figures present both spectral response and crosstalk data calcu-lated according to [2]. The p-substrate version of the pixel QE maximum is equal to 42%, 45%, and 38% for blue, green, and red pixels respectively. The n-substrate version of the pixel has QE maximum equal to 42%, 37%, and 29% for blue, green, and red pixels respectively. As will be shown later, in spite of the slight degradation of QE for the n-substrate ver-sion of the pixel, overall sensitivity of the sensor after color processing becomes higher due to a significant reduction of electrical crosstalk. Also, the n-substrate version of the pixel exhibits higher SNRmax when compared with the p-substrate pixel at the same full well capacity due to lower crosstalk. For comparison purposes, the earliest generations of 1.75µm pix-els on the p-substrate exhibited QE maximum of 28%, 36%, and 23% for blue, green, and red pixels respectively. The pro-gress in pixel development resulted in about a 50% improve-ment in QE and a 40% improvement in crosstalk. Note that n-substrates may not provide an advantage for all pixel sizes, and the benefit of n-substrates becomes more advantageous in

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regards to pixel optimization/performance as pixel become smaller and electrical crosstalk increases. Table 1 summarizes the performances of 1.75µm pixels cur-rently in production and compares them with earlier genera-tions of the pixel. Figure 4 presents estimations of luminance SNR after color processing as a function of light intensity on the scene for the following conditions: integration time, 67ms; lens F-number, 2.8; lens transmittance, 0.9; reflectance of the scene, 18%; IR-cut filter, 650nm; and color saturation, 100%. As can be seen from the plot, current pixels in production pro-vide (2x – 3x) improvement of SNR when compared to the earliest pixel generations. For these same pixels, a n-substrate version of the pixel provides ~10% improvement in sensitivity over the p-substrate version using the conditions specified above, as well as higher SNRmax at the same full well capac-ity. The improvement of SNR from n-substrates is more pro-nounced for higher color saturation. 1.4µm and 1.2µm Pixel Development To address the market needs of the mobile and DSC imaging, Micron continues to advance pixel technology in support of new CMOS image sensor product lines, including 1.4µm and 1.2µm pixel sizes. Reduction of pixel size to these small val-ues requires advanced manufacturing processes and creative pixel designs, and has been a significant challenge for all as-pects of pixel development. Similar to the 1.75µm pixel, de-velopment of smaller pixels continues to focus on improve-ments in the pixel optical path, increasing QE and pixel capac-ity, and reducing crosstalk. Pixel designs are based on CEPA with 1.5 equivalent transistors per pixel. Micron successfully built a pixel array with its first generation of 1.4um pixel, and demonstrated a color image of reasonable quality and pixel performance. Figure 5 presents an example of a color image from a 1.4µm pixel array. The pixel achieves 6000 electrons linear full well capacity, quantum efficiency close to 30%, and readout noise less than 2e. Pixel design for the 1.2µm pixel is also based on CEPA with 1.5 equivalent transistors per pixel. Early indications show the ability to achieve 4000 electrons for the linear full well capac-ity, quantum efficiency of 30%, and readout noise of less than 2 electrons. Image Quality and Pixel Performance Trade Off – Pixel Arrays with Super Small Pixels In spite of the big challenges in shrinking pixel sizes below 2µm and 1.5µm, camera miniaturization continuously drives development of image sensors in this direction. The natural questions that are typically raised in regards to this are: What is the trade off between the pixel performance and image qual-ity of a sensor with super small pixels? What level of image quality can be expected from pixel arrays with such super small pixels? These questions have stimulated many interest-ing ideas, and are actively being discussed in relation to gen-erating good quality images using pixels with limited per-formances [3]. This paragraph presents the concept of equal optical format for equal image quality and considers the rea-soning for pixel scaling from the image quality stand point. In general, pixel arrays with the same optical format, but a different density of pixels (and pixel size), should provide the same sensitivity, if SNR of the pixel is scaled proportionally to

the pixel area. Moreover, a pixel array with smaller pixels will have an advantage of higher spatial resolution when the light intensity on the scene is high enough. If pixel SNR is scaled proportionally to the pixel area, integration of photons over the pixel area is substituted with spatial integration in the pixel array, resulting in similar or better sensitivity. To keep SNR scaled to the pixel area when shrinking pixel size, the corre-spondent trade-off between pixel performances needs to be established. For example, for photon shot limited sensitivity, an increase of crosstalk has to be compensated by an increase in quantum efficiency. The same logic can be applied to the scaling of readout noise and pixel capacity. Also, the reduction of pixel capacity when the pixel shrinks can be overcome with the high dynamic range approach. Based on this simplified consideration, the following conclusions can be made:

as the pixel shrinks, image sensors with equal optical format provide the same sensitivity as long as pixel SNR is scaled proportionally to pixel area;

pixel arrays with a smaller pixel size and higher density of pixels can potentially provide better image quality due to better spatial resolution;

when targeting the same image quality, a pixel can shrink until pixel SNR is proportional to the pixel area;

provided all of the scaling is observed, pixel size reduc-tion makes sense as long as increased spatial resolution can be achieved.

To illustrate above considerations, we have estimated normal-ized SNR for pixels with varying sizes developed at Micron over the past several years. Figure 6 presents the normalized per-pixel area scene light intensity, providing luminance SNR equal to 10 for Micron’s pixels with different sizes. (Condi-tions correspond to those used earlier for Figure 4.) As can be seen from the plot, the 1.75µm pixel has a normalized SNR equal to or very close to those pixels larger in size, and respec-tively will provide similar sensitivity as those larger pixels in the same optical format. Figure 7 presents an example of an image taken under bright light conditions (1000 lux) and under low light conditions (1 lux, 200ms integration time) using Mi-cron’s image sensors with identical optical formats: A ¼-inchVGA image sensor with 5.6µm pixel (on the left), a ¼-inch 2Mp image sensor with 2.2µm pixel (at the center), and a ¼-inch 3Mp image sensor with 1.75µm pixel (on the right). As can be seen from the zoomed fragments, sensors with smaller pixels, as expected, provide better spatial resolution at bright light. At the same time, in spite of a large difference in the pixel area, image quality and low light sensitivity of the sensors with these smaller pixels is comparable with a 5.6µm pixel-based imager. Conclusion In summary, Micron sensors have achieved "scaled" perform-ance, preserving sensitivity and SNR performance when com-pared to similar optical format sensors, but with the added benefit of higher spatial resolution as the pixels shrink. We have achieved this by using process and architecture-optimized, symmetrical, n-substrate pixels. Maintaining this "scaled" performance as we drive towards super small pixels, perhaps even 1 micron pixels, poses a challenge for the CMOS imaging industry.

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Acknowledgements The authors would like to thank many people in Micron Tech-nology for their support and contribution to this investigation.

References [1] G.Agranov et al, IEEE, CCD - AIS WS, 2005, pp. 206-209 [2] G.Agranov et al, Trans. ED, ED-50, 2003, pp.4-11 [3] E.R.Fossum, IEEE, CCD - AIS WS, 2005, pp. 214-217 Table 1

luminance SNR comparisonConditions: 15FPS, 3000K light, lens F# 2.8, lens transmission 90%, Micron standard IR cut,

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Figure 4. Luminance SNR after color processing for current 1.75µm pixels on p-substrate and n-substrate in comparison with 1st generation of 1.75µm pixel (series order corresponds to the legend).

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Figure 1. Fill factor and pixel capacity (linear full well) for different versions of 1.75µm pixel. Square, triangle, and circle data points represent asymmetrical, quasi-symmetrical, and symmetrical pixel. Solid and hollow data points correspond to pixel capacity and fill factor respectively.

Figure 5. Example of image from 1Megapixel array with 1.4µm pixel

Normalized Scene light level for luminance SNR=10 (for 18% patch)

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Figure 2. Wave optics simulations. Light intensity distribution of the 550nm light with normal incidence on cross-section of blue-green 1.75µm pixel.

Figure 6. Normalized per-pixel area light intensity level for luminance SNR = 10 after color processing.

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1.75um p-substrate. Relative Spectral Response

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1.75um p-substrate. Relative Spectral Response

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Blue 20.1 5.4Green 32.4 18.8 17.0Red 6.1 18.9

Figure 3. Relative response and crosstalk data for 1.75µm pixel on p-substrate (left) and n-substrate (right).

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Figure 7. Images from sensors with the same optical format (1/4-inch) but different pixel size at bright light and low light conditions.

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