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Stick Diagram
3
Digital Integrated Circuits © Prentice Hall 1995 Design Methodologies Symbolic Layout 1 3 In Out V DD GND Stick diagram of inverter • Dimensionless layout entities • Only topology is important • Final layout generated by “compaction” program
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stick diagram
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Digital Integrated Circuits © Prentice Hall 1995Design Methodologies
Symbolic Layout
1
3
In Out
VDD
GND
Stick diagram of inverter
• Dimensionless layout entities• Only topology is important• Final layout generated by “compaction” program
Digital Integrated Circuits © Prentice Hall 1995Combinational Combinational LogicLogic
Two Versions of (a+b).c
a c b a b c
xx
GND
VDDVDD
GND
(a) Input order {a c b} (b) Input order {a b c}
Kenneth R. Laker, University of Pennsylvania
31
Vout
VDD
VB
VA
S
GD
D
GSD
GS
VA
S
GD
VB
kp
kp
knkn
Gate OxideField Oxide
n-Well
p+
Metal 1
Contact/via
COLOR LEGEND
Metal 3
Metal 2
p-Welln+
Polysilicon
VDD
GND
Vout
VA
VB
STICK DIAGRAM
VDD
GND
Vout
VA
VB
