Software Variability from the Nomadic Devices...

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Software Variability from the Nomadic Devices Perspective Roel Wuyts ARES Group IMEC KULeuven SVPP’08, 8/8/8

Transcript of Software Variability from the Nomadic Devices...

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Software Variability from the Nomadic Devices Perspective

Roel WuytsARES GroupIMECKULeuven

SVPP’08, 8/8/8

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Wuyts Roel imec Public 2008

IMEC

• Micro-Electronics research organization located Leuven, Belgium– Mission “To perform R&D, ahead of industrial needs by 3 to 10 years, in

microelectronics, nanotechnology, design methods and technologies for ICT systems”

• Numbers– Budget: ± 200 M€

– Staff: ± 1700

– Cleanroom: ± 10,000 m2

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Nomadic Devices

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Nomadic Devices

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Nomadic Device Characteristics

• Power and energy constraints (battery)• Design time constraints (time to market)• Cost• Real-time constraints• Flexibility and performance

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Handheld Battery-powered Devices

514 March, 2008 DATE 2008 2

!"#$%&'(#)*$+,$-+./0#$1+-23%/4(

!"#$% &'()*+,-'..(./#,01*2'3,/3,'45'66'6,3738'43+,

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C;D'38,*>,E'=12;=/.,F/0'#3+,9::--?,

)*.(4',G?,0/D'3,H@IHJ?,K'5#(/#7,@AAB+L

33%

20%

15%

7%

5%

3%

2%

15%

Wireless Modems

Application Processor

Backlight

Camera

Bluetooth

Speaker

Display

Other

! M/N,G+OP,>*#,0#*='33;2D

! M/N,GP,>*#,:MF,=*#'3

[Kimmo Kuusilinna, Nokia, Date’08]

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Current Market

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Concrete Numbers for the Belgian market

• Motorola: 21 models, 66 models in support• Nokia: 94 models, 144 models in support• Samsung: 34 models, 174 models in support• LG: 18 models

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Multicore is here to stay

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Texas Instruments IBM CellARM

The key question: “How to efficiently program

them?”

L2D1 L2D2

ADRES1

ADRES2

ADRES3

CM

L1D

I$

ADRES4

ADRES5

ADRES6

L2I2L2I1 AR

M

IMEC

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Programming Nomadic Devices

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C CCC

CCC CC/C++

JavaC/C++

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Design variability: example

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DSP1

DSP2

DSP3 MEM3

MEM2

MEM1

DSP1

DSP2

DSP3 MEM3

MEM2

MEM1

DSP1

DSP2

DSP3 MEM3

MEM2

MEM1

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Design Variability: MPSoC Example

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Communicationassist blocks

ADRESx6

ARTERIS NoC L2 SRAM

ARM node

• 6 ADRES processors– 4x4 array, 3-issue VLIW– 32-bit datapath– 16 video CODEC specific instructions – 8 FUs with multipliers– Performance: 300MHz

• 13 Communication assist– Performance: 75/150MHz

• ARTERIS NoC– Separate instr. and data NoC– Bandwidth: 5Gbps@150MHz

• ARM926– System control– Performance: 75MHz

• L2 memory– L2I: 2 banks of 512kB

– L2D: 4 banks of 256kB

• Voltage islands– ADRES processors– L2I and L2D banks

• Multiple clock domains

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Dealing with variability: IMEC’s Approach

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Implementation optimized application

Execution time

Energy

Explorationinformation:

Pareto surface

Potential user & environment influence

Potential platform parameters

User & environmentconstraints

Platform monitoring Information

Pareto management

Resource Management

Designtime

Runtime

MPSoC Mapping Flow/Tools

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Solution for MPSoC: IMEC MPA Tool

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55

thread 1 thread 2 thread n

*.c

*.c *.c *.c

Parallelizationdirectives

Application code Parallelizes sequential Clean-C source

code Correct-by-construction multi-threaded code

Higher level than OpenMP

Directives in separate file

Supported types of parallelism Functional split (Coarse) Data-level split

Combinations

Dumps parallel code Sets up communication

Communication by means of FIFO’s DMA transfers

FIFO sizes determined by tool (initial version)

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Design Time Exploration

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> Energy consumption> …

> Number of used processors> Memory usage> Communication bandwidth>…

>Speed (Execution time)> …

Costs

Resou

rce

Constr

aints Resource

Usage

>MPSoC RTM component configuration 1

Per application

Set of operating points In a multi-dimension space

>MPSoC RTM component configuration 2

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Run-time management

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• For each thread frame, run-time scheduler changes management dynamically according to the run-time situations

Executiontime

Powerconsumption

Time

Workload (e.g., complexity of 3D object rendered)

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Run-time management

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• For each thread frame, run-time scheduler changes management dynamically according to the run-time situations

Executiontime

Powerconsumption

Time

Workload (e.g., complexity of 3D object rendered)Scheduler config1

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Run-time management

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• For each thread frame, run-time scheduler changes management dynamically according to the run-time situations

Executiontime

Powerconsumption

Time

Workload (e.g., complexity of 3D object rendered)Scheduler config2

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Run-time management

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• For each thread frame, run-time scheduler changes management dynamically according to the run-time situations

Executiontime

Powerconsumption

Time

Workload (e.g., complexity of 3D object rendered)

Scheduler config3

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Recapitulation

• Requirements: energy conservation, real-time constraints, time to market

• Issues tackled:– Map source code to hardware

– Optimized code for various scenarios

– Switch between scenarios at runtime

• Issues not tackled:– Huge design time effort

– Applications are becoming more and more dynamic

– Closed world assumption lifted: loading and unloading of new applications

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Food for thought: Upcoming Issues

• Not too distant future:– Manycore chips

– 3D chips

– Chip Variability

– Chip Unreliability

• Further away:– Biological Computing

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