sn

Nonstandard MaintenanceSwitching Network

NM:SN/MCH

A30828-X1150-N300-2-7620

2 A30828-X1150-N300-2-7620

NM:SN/MCH Nonstandard MaintenanceSwitching Network

f Important Notice on Product SafetyElevated voltages are inevitably present at specific points in this electrical equipment. Some of theparts may also have elevated operating temperatures.Non-observance of these conditions and the safety instructions can result in personal injury or in prop-erty damage.Therefore, only trained and qualified personnel may install and maintain the system.The system complies with the standard EN 60950 / IEC 60950. All equipment connected has to complywith the applicable safety standards.

The same text in German:Wichtiger Hinweis zur ProduktsicherheitIn elektrischen Anlagen stehen zwangslufig bestimmte Teile der Gerte unter Spannung. Einige Teileknnen auch eine hohe Betriebstemperatur aufweisen.Eine Nichtbeachtung dieser Situation und der Warnungshinweise kann zu Krperverletzungen undSachschden fhren.Deshalb wird vorausgesetzt, dass nur geschultes und qualifiziertes Personal die Anlagen installiert undwartet.

Das System entspricht den Anforderungen der EN 60950 / IEC 60950. Angeschlossene Gertemssen die zutreffenden Sicherheitsbestimmungen erfllen.

Trademarks:All designations used in this document can be trademarks, the use of which by third parties for theirown purposes could violate the rights of their owners.

Copyright (C) Siemens AG 2002.Issued by the Information and Communication Networks GroupHofmannstrae 51D-81359 Mnchen

Technical modifications possible.Technical specifications and features are binding only insofar asthey are specifically and expressly agreed upon in a written contract.

A30828-X1150-N300-2-7620 3


NM:SN/MCH

Reason for UpdateSummary: New F:SNMUX(B), Optolink to LTGP

Details:

Chapter/Section Reason for Update

7/1 - 128/1.4 and 2.3

Adaption of fault printout interpretation for new hard-ware

11/2 and 3 SNMUXB Fault Lists

12/7, 8, 9, 20 Replacement Instructions for new hardware

Issue HistoryIssueNumber

Date of issue Reason for Update

4 A30828-X1150-N300-2-7620


A30828-X1150-N300-2-7620 5


NM:SN/MCH

This document consists of a total of 314 pages. All pages are issue 2.

Contents1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91.1 Target Group of this Manual . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91.2 References to Additional Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2 IO Processor number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1 LTG processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.2 MBD processors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.3 TSG/SSG processors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112.4 SNMUX processors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122.5 SNMAT processors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3 SNA/SNB Configuration, Diagnosis and Test Messages . . . . . . . . . . . . . . 183.1 SN Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.1.1 Output Mask: FA:COC/CONF-ACT-STB . . . . . . . . . . . . . . . . . . . . . . . . . . 183.1.2 Output Mask FA:MB/CONF-ACT-STB . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.1.3 Output Mask: FA:MUX/CONF-ACT-STB . . . . . . . . . . . . . . . . . . . . . . . . . . 193.2 Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.3 SNA Speech Path Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.4 SNB Speech Path Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4 Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5 Interpretation of SNA Fault Printouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285.1 Fault Printout MMN:SN001-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285.1.1 Fault Printout: SGC/HWC FAILURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285.1.2 Fault Printout: SGC/SGC FAILURE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315.1.3 Fault Printout: SGC/PLLU FAILURE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335.1.4 Fault Printout: PATH SET/HWC FAILURE . . . . . . . . . . . . . . . . . . . . . . . . . 355.1.5 Fault Printout: PATH SET/TSM FAILURE . . . . . . . . . . . . . . . . . . . . . . . . . 375.1.6 Fault Printout: PATH SET/SSM8 FAILURE . . . . . . . . . . . . . . . . . . . . . . . . 395.1.7 Fault Printout: PATH SET/SSM16 FAILURE . . . . . . . . . . . . . . . . . . . . . . . 415.2 Fault Printout MMN:SN002-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435.2.1 Cross Office Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 445.2.2 ADDA Message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 465.3 Fault Printout MMN:SN004-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485.4 Fault Printout MMN:SN005-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 495.5 Fault Printout MMN:SN006-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 505.6 Fault Printout MMN:SN007-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 525.7 Fault Printout MMN:SN008-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545.8 Fault Printout MMN:SN009-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 565.9 Fault Printout MMN:SN010-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 585.10 Fault Printout MMN:SN011-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 615.10.1 Fault Printout: SGC CHANNEL ERROR. . . . . . . . . . . . . . . . . . . . . . . . . . . 615.10.2 Fault Printout: NO REACTION AFTER MBU RESET. . . . . . . . . . . . . . . . . 645.11 Fault Printout MMN:SN012-0000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 675.11.1 Fault Printout: CYCLE DEFECT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

6 A30828-X1150-N300-2-7620


5.11.2 Fault Printout: NO CYCLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 685.12 Fault Printout MMN:SN013-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 705.13 Fault Printout MMN:SN014-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 715.14 Fault Printout MMN:SN015-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 745.15 Fault Printout MMN:SN016-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 765.16 Fault Printout MMN:SN017-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 785.17 Fault Printout MMN:SN018-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 815.18 Fault Printout MMN:SN019-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 835.19 Fault Printout MMN:SN020-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 845.20 Fault Printout MMN:SN021-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 855.21 Fault Printout MMN:SN022-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 865.22 Fault Printout MMN:SN023-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 875.23 Fault Printout MMN:SN024-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 885.24 SN (126...504LTG): Output Mask MMN:SN050-0000 . . . . . . . . . . . . . . . . . 915.25 SN (63LTG): Output Mask MMN:SN050-0000. . . . . . . . . . . . . . . . . . . . . . . 945.26 Fault Printout MMN:SN060-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96

6 Interpretation of the SNB Fault Printouts . . . . . . . . . . . . . . . . . . . . . . . . . . . 986.1 Fault Printout MMN:SN101-1001. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 986.2 Fault Printout MMN:SN101-1002. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 996.3 Fault Printout MMN:SN101-1003. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1006.4 Fault Printout MMN:SN101-1004. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1026.5 Fault Printout MMN:SN101-1005. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1046.6 Fault Printout MMN:SN101-1006. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1066.7 Fault Printout MMN:SN101-1007. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1086.8 Fault Printout MMN:SN101-1010. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1096.9 Fault Printout MMN:SN101-1011. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1106.10 Fault Printout MMN:SN101-1012. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1126.11 Fault Printout MMN:SN101-1020. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1136.12 Cross Office Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1146.13 ADDA message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1166.14 Fault Printout MMN:SN101-1021. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1186.15 Fault Printout MMN:SN101-1022. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1196.16 Fault Printout MMN:SN101-1023. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1206.17 Fault Printout MMN:SN101-1024. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1226.18 Fault Printout MMN:SN101-1025. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1236.19 Fault Printout MMN:SN101-1026. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1246.20 Fault Printout MMN:SN102-1001. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1256.21 Fault Printout MMN:SN102-1002. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1276.22 Fault Printout MMN:SN102-1003. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1306.23 Fault Printout MMN:SN102-1005. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1326.24 Fault Printout MMN:SN102-1006. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1356.25 Fault Printout MMN:SN102-1007. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1376.26 Fault Printout MMN:SN102-1008. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1396.27 Fault Printout MMN:SN102-1009. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1416.28 Fault Printout MMN:SN109-1001. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1446.29 Fault Printout MMN:SN111-1001. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1466.30 Fault Printout MMN:SN111-1002. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

A30828-X1150-N300-2-7620 7


NM:SN/MCH

6.31 Fault Printout MMN:SN120-1000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1526.32 Fault Printout MMN:SN124-1000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1536.33 SNB (126...504LTG): Output Mask MMN:SN150-1000 . . . . . . . . . . . . . . 1576.34 SNB (31...63LTG) Output Mask MMN:SN150-1000 . . . . . . . . . . . . . . . . . 1596.35 Fault Printout MMN:SN160-1000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161

7 Interpretation of the SND Fault Printouts . . . . . . . . . . . . . . . . . . . . . . . . . 1627.1 Fault Printout MMN:SN201-2000 for SNMUXA . . . . . . . . . . . . . . . . . . . . 1627.2 Fault Printout MMN:SN201-2000 for SNMUXB . . . . . . . . . . . . . . . . . . . . 1667.3 Fault Printout MMN:SN202-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1717.4 Fault Printout MMN:SN203-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1747.5 Fault Printout MMN:SN204-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1787.6 Fault Printout MMN:SN204-2001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1807.7 Fault Printout MMN:SN206-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1867.8 Fault Printout MMN:SN206-2001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1907.9 Fault Printout MMN:SN208-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1937.10 Fault Printout MMN:SN210-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1967.11 SN ERROR MESSAGE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1997.11.1 Fault Printout MMN:SN211-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2007.11.2 Fault Printout MMN:SN220-2000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2017.12 Output Mask MMN:SN250-2000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201

8 Interpretation of the MCH Fault Printouts . . . . . . . . . . . . . . . . . . . . . . . . . 2038.1 Fault Printout MMN:MCH01-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2038.1.1 Monitoring and Fault Analysis. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2048.1.2 Suspect hardware SNA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2088.1.3 Suspect hardware SNB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2088.1.4 Suspect hardware SND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2098.2 Fault Printout MMN:MCH50-0000. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2108.2.1 Suspect hardware in SNA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2108.2.2 Suspect hardware in SNB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2108.2.3 Suspect hardware in SND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212

9 SNA Fault Lists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2139.1 Suspect Modules SNA(63LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2139.2 Suspect Modules SNA(126 LTG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2159.3 Suspect Modules SNA(252LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2199.4 Suspect Modules SNA(504LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22910 SNB Fault and Allocation Lists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25410.1 Fault Lists 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25410.1.1 Suspect Modules SNB(31...63LTG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25410.1.2 Suspect Modules SNB(126LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25610.1.3 Suspect Modules SNB(252LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26010.1.4 Suspect Modules SNB(504LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26710.2 Fault Lists 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28010.2.1 Suspect Modules SNB(126LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28010.2.2 Suspect Modules SNB(252LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28210.2.3 Suspect Modules SNB(504LTG). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 286

8 A30828-X1150-N300-2-7620


10.3 Allocation Lists AL:SSG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29310.3.1 Allocation List AL:SSG for SNB(252LTG) . . . . . . . . . . . . . . . . . . . . . . . . . 29310.3.2 Allocation List AL:SSG for SNB(504LTG) . . . . . . . . . . . . . . . . . . . . . . . . . 29310.4 Allocation List AL:TSG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29510.5 Allocation Lists AL:SSM16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29710.5.1 Allocation List AL:SSM16 for SNB(126LTG) . . . . . . . . . . . . . . . . . . . . . . . 29710.5.2 Allocation List AL:SSM16 for SNB(252LTG) . . . . . . . . . . . . . . . . . . . . . . . 29710.5.3 Allocation List AL:SSM16 for SNB(504LTG) . . . . . . . . . . . . . . . . . . . . . . . 29710.6 Allocation Lists AL:SSM8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29810.6.1 Allocation List AL:SSM8 for SNB(126LTG) . . . . . . . . . . . . . . . . . . . . . . . . 29810.6.2 Allocation List AL:SSM8 for SNB(252LTG) . . . . . . . . . . . . . . . . . . . . . . . . 29810.6.3 Allocation List AL:SSM8 for SNB(504LTG) . . . . . . . . . . . . . . . . . . . . . . . . 29910.7 Allocation List AL:TSM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30010.8 Allocation Lists AL:LIS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30010.8.1 Allocation List AL:LIS for SNB(126LTG) . . . . . . . . . . . . . . . . . . . . . . . . . . 30010.8.2 Allocation List AL:LIS for SNB(252LTG) . . . . . . . . . . . . . . . . . . . . . . . . . . 30110.8.3 Allocation List AL:LIS for SNB(504LTG) . . . . . . . . . . . . . . . . . . . . . . . . . . 30111 SND Fault Lists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30311.1 Suspect SNMUXA modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30311.2 Suspect SNMUXB Modules for SNMUX-even . . . . . . . . . . . . . . . . . . . . . . 30311.3 Suspect SNMUXB Modules for SNMUX-odd. . . . . . . . . . . . . . . . . . . . . . . 304

12 Replacement Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30612.1 SN(126...504LTG) Replacement of SNA/SNB Modules . . . . . . . . . . . . . . 30612.2 SN(31...63LTG) Replacement of SNA/SNB Modules . . . . . . . . . . . . . . . . 30712.3 Replacement of DCCCS/DCCMS and Associated Fuse . . . . . . . . . . . . . . 30712.4 Replacement of DCCXI and Associated Fuse . . . . . . . . . . . . . . . . . . . . . . 30712.5 Replacement of Modules LILD or MUXC in F:SNMUX(A) . . . . . . . . . . . . . 30812.6 Replacement of Modules LILE or MUXC in F:SNMUX(B) . . . . . . . . . . . . . 30812.7 Replacement of Module MATC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30812.8 Replacement of Modules MATM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30912.9 Replacement of Backplane Module OFC. . . . . . . . . . . . . . . . . . . . . . . . . . 30912.10 Replacement of Backplane Module OML. . . . . . . . . . . . . . . . . . . . . . . . . . 30912.11 Replacement of Backplane Module SNOPT . . . . . . . . . . . . . . . . . . . . . . . 30912.12 Replacement of F:SN/F:TSG in SN(63LTG) . . . . . . . . . . . . . . . . . . . . . . . 31012.13 Replacement of Module Frame F:SMSC(C) . . . . . . . . . . . . . . . . . . . . . . . 31012.14 Replacement of Module Frame F:TSG(A)/F:TSG(B) . . . . . . . . . . . . . . . . . 31112.15 Replacement of Module Frame F:SSG(A) . . . . . . . . . . . . . . . . . . . . . . . . . 31112.16 Replacement of Module Frame F:SSG(B) . . . . . . . . . . . . . . . . . . . . . . . . . 31212.17 Replacement of the Backplane in Frame F:DCC(B) . . . . . . . . . . . . . . . . . 31212.18 Replacement of Module Frame F:SNMUX(A) . . . . . . . . . . . . . . . . . . . . . . 31312.19 Replacement of Backplane in F:SNMUX(B) . . . . . . . . . . . . . . . . . . . . . . . 31312.20 Replacement of Module Frame F:SNMAT. . . . . . . . . . . . . . . . . . . . . . . . . 313

A30828-X1150-N300-2-7620 9


NM:SN/MCH

1 Introduction

1.1 Target Group of this ManualThis manual, NM:SN/MCH, contains information which is intended to support nonstand-ard maintenance in the event of SN/MCH faults.An SN hardware fault can normally be cleared with the aid of the procedures containedin maintenance manual MMN:SN/MCH. The Nonstandard Maintenance documents forSN/MCH are not needed in any of these cases.Only if the aforementioned procedures are unsuccessful is it necessary for a systemspecialist to carry out fault clearance. To assist the specialist, NM:SN contains addition-al information on each type of fault.The documents listed in the next sections are also of importance for Nonstandard Main-tenace.

1.2 References to Additional Documentation Of particular importance for Nonstandard Maintenance is the manual Construction:

Section Racks offers an overview of the equipment containing SN frames and thefuse assignments. Section Frames SN provides the layout of SN frames and cablingaccording to cable list. The interpretation of the LEDs on the module faceplates isgiven in section Modules SN.

The Documentation Overview contains detailed information on all general aspectsof fault clearance.

When replacing or handling modules please observe the Safety Instructions for per-sonal and products (EN60950/IEC60950).

10 A30828-X1150-N300-2-7620


2 IO Processor numberThe IO processor number of the device or unit concerned is always specified as a dou-ble byte in the fault printout.The CP uses the IO processor number to address the processor for the correspondingunit in the periphery.

2.1 LTG processorThe IO processor numbers of the LTG correspond to the LTG numbers, running from0001 to 07FF (hexadecimal) or from 001 to 2047 (decimal).

2.2 MBD processors

IO-processor numbers associated MB units

hexadecimal decimal

0B 880B 89

30003001

MBIC-0MBIC-1

0B C20B C30B C40B C50B C60B C70B C80B C90B CA0B CB0B CC0B CD0B CE0B CF0B D00B D1

3010301130123013301430153016301730183019302030213022302330243025

MBIH-0-0MBIH-1-0MBIH-0-1MBIH-1-1MBIH-0-2MBIH-1-2MBIH-0-3MBIH-1-3MBIH-0-4MBIH-1-4MBIH-0-5MBIH-1-5MBIH-0-6MBIH-1-6MBIH-0-7MBIH-1-7

0B D60B D70B D80B D90B DA0B DB0B DC0B DD0B DE0B DF

3030303130323033303430353036303730383039

MBIA-0-0MBIA-1-0MBIA-0-1MBIA-1-1MBIA-0-2MBIA-1-2MBIA-0-3MBIA-1-3MBIA-0-4MBIA-1-4

Tab. 2.1 MB processors for MBD

A30828-X1150-N300-2-7620 11


NM:SN/MCH

2.3 TSG/SSG processors

IO processor numbers associated switch group or switching network side

hexadecimal decimal

11 9411 9511 9611 9711 9811 9911 9A11 9B11 9C11 9D11 9E11 9F11 A011 A111 A211 A3

4500450145024503450445054506450745084509451045114512451345144515

TSG-0-0 or SN-0 for SN(31...63LTG)TSG-1-0 or SN-1 for SN(31...63LTG)TSG-0-1TSG-1-1TSG-0-2TSG-1-2TSG-0-3TSG-1-3TSG-0-4TSG-1-4TSG-0-5TSG-1-5TSG-0-6TSG-1-6TSG-0-7TSG-1-7

11 A411 A511 A611 A711 A811 A911 AA11 AB

46004601460246034604460546064607

SSG-0-0SSG-1-0SSG-0-1SSG-1-1SSG-0-2SSG-1-2SSG-0-3SSG-1-3

Tab. 2.2 SN processors

12 A30828-X1150-N300-2-7620


2.4 SNMUX processors

IO processor numbers associated unit

hexadecimal decimal

13 0413 0513 0613 0713 0813 0913 0A13 0B13 0C13 0D13 0E13 0F13 1013 1113 1213 1313 1413 1513 1613 1713 1813 1913 1A13 1B13 1C13 1D13 1E13 1F13 2013 2113 2213 23

48684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899

SNMUX-0-0SNMUX-1-0SNMUX-0-1SNMUX-1-1SNMUX-0-2SNMUX-1-2SNMUX-0-3SNMUX-1-3SNMUX-0-4SNMUX-1-4SNMUX-0-5SNMUX-1-5SNMUX-0-6SNMUX-1-6SNMUX-0-7SNMUX-1-7SNMUX-0-8SNMUX-1-8SNMUX-0-9SNMUX-1-9SNMUX-0-10SNMUX-1-10SNMUX-0-11SNMUX-1-11SNMUX-0-12SNMUX-1-12SNMUX-0-13SNMUX-1-13SNMUX-0-14SNMUX-1-14SNMUX-0-15SNMUX-1-15

Tab. 2.3 SNMUX processors

A30828-X1150-N300-2-7620 13


NM:SN/MCH

IO channel processor numbers associated units

hexadecimal decimal

12 C012 C112 C212 C312 C412 C512 C612 C712 C812 C912 CA12 CB12 CC12 CD12 CE12 CF

4800480148024803480448054806480748084809481048114812481348144815

SNMUX-0-0 via MBDH-0-0/MBU:SGC-0-0SNMUX-1-0 via MBDH-1-0/MBU:SGC-1-0SNMUX-0-0 via MBDH-0-0/MBU:SGC-0-0SNMUX-1-0 via MBDH-1-0/MBU:SGC-1-0SNMUX-0-1 via MBDH-0-0/MBU:SGC-0-1SNMUX-1-1 via MBDH-1-0/MBU:SGC-1-1SNMUX-0-1 via MBDH-0-0/MBU:SGC-0-1SNMUX-1-1 via MBDH-1-0/MBU:SGC-1-1SNMUX-0-2 via MBDH-0-1/MBU:SGC-0-2SNMUX-1-2 via MBDH-1-1/MBU:SGC-1-2SNMUX-0-2 via MBDH-0-1/MBU:SGC-0-2SNMUX-1-2 via MBDH-1-1/MBU:SGC-1-2SNMUX-0-3 via MBDH-0-1/MBU:SGC-0-3SNMUX-1-3 via MBDH-1-1/MBU:SGC-1-3SNMUX-0-3 via MBDH-0-1/MBU:SGC-0-3SNMUX-1-3 via MBDH-1-1/MBU:SGC-1-3

12 D012 D112 D212 D312 D412 D512 D612 D712 D812 D912 DA12 DB12 DC12 DD12 DE12 DF

4816481748184819482048214822482348244825482648274828482948304831


12 E012 E112 E212 E312 E412 E512 E612 E712 E812 E912 EA12 EB12 EC12 ED12 EE12 EF

4832483338344835483648374838383948404841484248434844484548464847


Tab. 2.4 SNMUX channel processors

14 A30828-X1150-N300-2-7620


12 F012 F112 F212 F312 F412 F512 F612 F712 F812 F912 FA12 FB12 FC12 FD12 FE12 FF

4848484948504851485248534854485548564857485848594860486148624863



hexadecimal decimal

Tab. 2.4 SNMUX channel processors

A30828-X1150-N300-2-7620 15


NM:SN/MCH


hexadecimal decimal in SNMUX

11 A411 A511 A611 A711 A811 A911 AA11 AB11 AC11 AD11 AE11 AF11 B011 B111 B211 B311 B411 B511 B611 B711 B811 B911 BA11 BB11 BC11 BD11 BE11 BF11 C011 C111 C211 C311 C411 C511 C611 C711 C811 C911 CA11 CB11 CC11 CD11 CE11 CF11 D011 D111 D211 D

451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563

SNMUX-0-4SNMUX-1-4SNMUX-0-4SNMUX-1-4SNMUX-0-5SNMUX-1-5SNMUX-0-5SNMUX-1-5SNMUX-0-6SNMUX-1-6SNMUX-0-6SNMUX-1-6SNMUX-0-7SNMUX-1-7SNMUX-0-7SNMUX-1-7SNMUX-0-8SNMUX-1-8SNMUX-0-8SNMUX-1-8SNMUX-0-9SNMUX-1-9SNMUX-0-9SNMUX-1-9SNMUX-0-10SNMUX-1-10SNMUX-0-10SNMUX-1-10SNMUX-0-11SNMUX-1-11SNMUX-0-11SNMUX-1-11SNMUX-0-12SNMUX-1-12SNMUX-0-12SNMUX-1-12SNMUX-0-13SNMUX-1-13SNMUX-0-13SNMUX-1-13SNMUX-0-14SNMUX-1-14SNMUX-0-14SNMUX-1-14SNMUX-0-15SNMUX-1-15SNMUX-0-15SNMUX-1-15

Tab. 2.5 LTGSET processors

16 A30828-X1150-N300-2-7620


2.5 SNMAT processors


hexadecimal decimal in SNMAT

13 8013 8113 6213 6313 6413 6513 6613 6713 6813 6913 6A13 6B13 6C13 6D13 6E13 6F13 7013 71

499249934962496349644965496649674968496949704971497249734974497549764977

MATC-0MATC-1MATM-0-0MATM-1-0MATM-0-1MATM-1-1MATM-0-2MATM-1-2MATM-0-3MATM-1-3MATM-0-4MATM-1-4MATM-0-5MATM-1-5MATM-0-6MATM-1-6-MATM-0-7-MATM-1-7-

Tab. 2.6 SNMAT processors


hexadecimal decimal

13 2413 2513 2613 2713 2813 2913 2A13 2B13 2C13 2D13 2E13 2F13 3013 3113 3213 33

4900490149024903490449054906490749084909491049114912491349144915

MATC-0 via MBDH-0-0/MBU:SGC-0-0MATC-1 via MBDH-1-0/MBU:SGC-1-0MATC-0 via MBDH-0-0/MBU:SGC-0-1MATC-1 via MBDH-1-0/MBU:SGC-1-1MATC-0 via MBDH-0-1/MBU:SGC-0-2MATC-1 via MBDH-1-1/MBU:SGC-1-2MATC-0 via MBDH-0-1/MBU:SGC-0-3MATC-1 via MBDH-1-1/MBU:SGC-1-3MATC-0 via MBDH-0-2/MBU:SGC-0-4MATC-1 via MBDH-1-2/MBU:SGC-1-4MATC-0 via MBDH-0-2/MBU:SGC-0-5MATC-1 via MBDH-1-2/MBU:SGC-1-5MATC-0 via MBDH-0-3/MBU:SGC-0-6MATC-1 via MBDH-1-3/MBU:SGC-1-6MATC-0 via MBDH-0-3/MBU:SGC-0-7MATC-1 via MBDH-1-3/MBU:SGC-1-7

Tab. 2.7 SNMAT channel processors

A30828-X1150-N300-2-7620 17


NM:SN/MCH

13 3413 3513 3613 3713 3813 3913 3A13 3B13 3C13 3E13 3F13 4013 4113 4213 4313 44

4916491749184919492049214922492349244925492649274928492949304931

MATC-0 via MBDH-0-4/MBU:SGC-0-8MATC-1 via MBDH-1-4/MBU:SGC-1-8MATC-0 via MBDH-0-4/MBU:SGC-0-9MATC-1 via MBDH-1-4/MBU:SGC-1-9MATC-0 via MBDH-0-5/MBU:SGC-0-10MATC-1 via MBDH-1-5/MBU:SGC-1-10MATC-0 via MBDH-0-5/MBU:SGC-0-11MATC-1 via MBDH-1-5/MBU:SGC-1-11MATC-0 via MBDH-0-6/MBU:SGC-0-12MATC-1 via MBDH-1-6/MBU:SGC-1-12MATC-0 via MBDH-0-6/MBU:SGC-0-13MATC-1 via MBDH-1-6/MBU:SGC-1-13MATC-0 via MBDH-0-7/MBU:SGC-0-14MATC-1 via MBDH-1-7/MBU:SGC-1-14MATC-0 via MBDH-0-7/MBU:SGC-0-15MATC-1 via MBDH-1-7/MBU:SGC-1-15


hexadecimal decimal

Tab. 2.7 SNMAT channel processors

18 A30828-X1150-N300-2-7620


3 SNA/SNB Configuration, Diagnosis and TestMessages

3.1 SN Configuration

3.1.1 Output Mask: FA:COC/CONF-ACT-STB

SN CONFIGURATION

FA:COC/CONF-ACT-STB

CONFIGURATION: SN-sn FROM: ACT TO: STB

System response The SN is switched over conditionally, i.e. the faulty SN-side is only configured from

ACT to STB if the partner SN-side is already STB. Switching traffic is not impaired. There is no display on the system panel. No entry is made in the alarm file (AM.ALARM). The information is stored in the history file and is output on the associated terminal.

Fault analysisWhen the first COC failure occurs, a 30-minute test cycle is started. If the threshold val-ue of 20 errors is reached during this cycle, the SN is reconfigured if the following con-ditions are met: all errors occurred in the active SN the redundant SN side is in state STBIf the number of errors reaches or exceeds 60, the affected switch groups are discon-nected if they are named as faulty unit in 95% of the error messages. If these conditionsdo not apply, the statistics counters and timers are reset, the disconnection threshold israised to 200 COC failures and a new cycle is started, in which the 95% criterion alsoapplies.General conditions for disconnection are: redundancy available error location found without doubtConfiguration and disconnection of SN subunits is carried out by FA:SN on the instruc-tions of FA:COC.

A30828-X1150-N300-2-7620 19


NM:SN/MCH

3.1.2 Output Mask FA:MB/CONF-ACT-STB

SN CONFIGURATION

FA:MB/CONF-ACT-STB




Fault analysisIf MB fault analysis (FA:MB) detects a clock fault on one side of the system, it sends anSN switch over command to the FA:SN. The active switching groups (SN, TSG) whichreceive their clock from the faulty system side are switched over so that the lower orderLTGs receive their clock from the fault-free system side.

3.1.3 Output Mask: FA:MUX/CONF-ACT-STB

SN CONFIGURATION

FA:MUX/CONF-ACT-STB




Fault analysisIf MUX fault analysis (FA:MUX) detects a fault on the associated MUX on the ACT SN-side of the system, it sends an SN switch over command to the FA:SN.

3.2 DiagnosisFor explanation of the SNA output mask see 5.24 "SN (126...504LTG): Output MaskMMN:SN050-0000" or 5.25 "SN (63LTG): Output Mask MMN:SN050-0000"For explanation of the SNB output mask see 6.33 "SNB (126...504LTG): Output MaskMMN:SN150-1000" or 6.34 "SNB (31...63LTG) Output Mask MMN:SN150-1000"The SN unit (SN, SSG or TSG) to be tested must be in the status MBL (maintenanceblocked). The diagnosis is started via inputs on the terminal and the results are outputon the terminal.

20 A30828-X1150-N300-2-7620


The following test programs, which detect the faults listed, can be started.The tests are carried out in the following order: HWC - HWC CHECK

Hardware controller testDetected fault SNB: SGCB FAILURE or SNA: HWC-FAULT

PLL - PLL CHECKPLL supervisory circuit testDetected fault SNB: SGCB FAILURE or SNA: PLLU-FAULT

TSM - TEST TSMControl memory test in the TSMBDetected fault SNB: SGCB FAILURE, TSMB FAULTor SNA: HWC-FAULT, TSM-A-FAULT

CSM - TEST SSM16Control memory test in the SSM16BDetected fault SNB: SGCB FAULT, SSM16B FAULTor SNA: HWC-FAULT, SSM-16-A-FAULT

SSM - TEST SSM8/15Control memory test in the SSM8BDetected fault SNB: SGCB FAULT, SSM8B FAULTor SNA: HWC-FAULT, SSM-8X15-A-FAULT

LIS - TEST LISTest of the interface module LISBDetected fault: LISB FAULT :

ALL - TEST ALLTest of control memories of all created TSMB, SSM16B and SSM8BDetected fault SNB: TSMB FAULT, SSM16B FAULT, SSM8B FAULTor SNA: HWC-FAULT, TSM-A-FAULT, SSM-16-A-FAULT, SSM-8X15-A-FAULT

CHALL - CHECK ALLAll central and decentral control units of the specified switching group are tested.Test of the CPU, test of the program and data memory in the SGCBTest of the PLL supervisory circuitTest of the hardware controllerTest of the control memory of all created TSMB, SSM16B and SSM8BTest of the interface module LISBThrough-connection of the message channels (MCH) running through the relevantswitching group and of test channel 0Detected faults SNB: SGCB FAULT, TSMB FAULT, LISB FAULT,SSM16B FAULT, SSM8B FAULTor SNA: SGC-FAULT, HWC-FAULT, PLLU-FAULT, TSM-A-FAULT,TSM-B-FAULT, SSM-16-A-FAULT, SSM-16-B-FAULT, SSM-8X15-A-FAULT,SSM-8X15-B-FAULT

Fault analysisIf a fault occurs during configuration of the switching group to be tested, the diagnosisis not started and a fault report is output. Faults which the test detects are reported bythe SGC/SGCB to fault detection FD in the CP. The SGC/SGCB handles the reportedfaults and fault detection according to the degree of gravity. If the SGC/SGCB detectsan SGC-FAULT/SGCB FAULT in the course of the test program CHALL, it terminatesthe diagnosis. The SGC-FAULT/SGCB FAULT is listed by the fault detection. If theSGC/SGCB detects one or more control memory errors during the test program ALL or

A30828-X1150-N300-2-7620 21


NM:SN/MCH

CHALL, it reports the defective modules once to fault detection. The fault detection liststhe control memory errors.If the SGC detects a PLLU-FAULT in the course of the test program CHALL, it continuesdiagnosis. Fault detection lists the PLLU-FAULT in addition to the control memory errorswhich have occurred.

3.3 SNA Speech Path TestOutput Mask for SNA(126...504LTG)

FAILURE DETECTEDCOMPONENT USED IN FAILING PATH

COMPONENT UNIT SUBUNT----------- -------- ----------

LTGA LTG-tsg-lTSMA TSG-sn-tsg TSM -xSSM8X15 SSG-sn-ssg SSM -xSSM16X16_AB SSG-sn-ssg CSM -xSSM16X16_BA SSG-sn-ssg CSM -xSSM15X8 SSG-sn-ssg SSM -xTSMB TSG-sn-tsg TSM -xLTGB LTG-tsg-l

Output Mask for SNA (63LTG)



LTGA LTG-0-lTSMA SN-sn TSM -xSSM16X16_AB SN-sn SSM -xSSM16X16_AB SN-sn SSM -xTSMB SN-sn TSM -xLTGB LTG-0-l

Explanation of the output masks tsg: 0...7 for TSG number ssg: 0...3 for SSG number sn: 0 or 1 (identifies the SN side) l: LTG number x: 0...15 for number of the subunit concerned

Description of the SN speech path testThe SN unit to be tested (SN, SSG or TSG) must be in the status MBL (maintenanceblocked). The SN speech path test is started by an input on an operator terminal, towhich the results are sent.If the SN speech path test is called for a complete SN side, a quick test is carried out. Ifthe SN speech path test is called for a TSG(B) or SSG(B) without a subunit being spec-ified, all subunits of this switching group are tested. All the subunits are tested compre-

22 A30828-X1150-N300-2-7620


hensively in succession. If a subunit is specified, only this subunit is testedcomprehensively.The SN speech path test cannot test speech paths via which nailed-up connections andmessage channels MCH run. Nor does it test a connection set up during the test. Quick test: The quick test is a more superficial test. It tests the through-connection

via each input and output of a subunit. Not all possible combinations are through-connected and only some of the time slots in the module are allocated. In otherwords the quick test can only detect serious faults.

Comprehensive test: All speech memories of the input and output time stage in themodule TSMB are tested, as far as possible, by the speech path test. In other wordsall inputs and outputs of a TSMB module and all time slots are allocated. Thethrough switching of each individual input is tested to each output in the SSM8Bmodule. The through switching of an input to an output in the SSM16B is with thesame link. Faulty multiplexers and connections can therefore be located.

After the operator has entered the test command, the switch group to be tested (SN,TSG or SSG) is configured from MBL to SEZ. If the configuration was completed suc-cessfully, the actual SN speech path test is started. The speech paths are through-con-nected and tested in succession. When the test has been completed, the testedswitching group is reconfigured to MBL and the end result of the SN speech path test isoutput.Speech path test duration for medium system load: approx. 40 min. for a TSG opprox. 80 min. for a SSG

Test of a speech path through-connectionEach individual speech path through-connection is tested by means of a COC test.When a COC test takes place, the LTG-A sends a test pattern via both SN sides. TheLTG-B echoes the test pattern and returns it via both SN sides to the LTG-A where it iscompared with the test pattern which was sent. If the LTG detects a discrepancy, itsends an error report to the CP.

Fault analysisIf a fault occurs during configuration to SEZ (seized) of the switching group to be tested,the SN speech path test is not started and a fault printout is made. The SN speech pathtest is terminated and a fault printout issued after the first COC fault has been detected.The fault printout contains the subunits via which the faulty through-connection wasmade. There are two possible causes of a COC error report which is relevant for the SNspeech path test: When a speech path is through-connected by the test, a COC fault isdetected, or a COC fault is detected during through-connection of a speech path by nor-mal switching operations. In the latter case, only the COC faults which affect the SN unitto be tested are evaluated.

A30828-X1150-N300-2-7620 23


NM:SN/MCH

3.4 SNB Speech Path TestOutput Mask for SNB (126...504LTG)



LTG LTG-tsg-lTSMB TSG-sn-tsg TSMB-xSSM8B SSG-sn-ssg SSM8B-xSSM16B SSG-sn-ssg SSM16B-ySSM16B SSG-sn-ssg SSM16B-ySSM8B SSG-sn-ssg SSM8B-xTSMB TSG-sn-tsg TSMB-xLTG LTG-tsg-l

Output Mask for SNA (31...63LTG)FAILURE DETECTEDCOMPONENT USED IN FAILING PATH


LTGA LTG-0-lTSMA SN-sn TSM -xSSM16X16_AB SN-sn SSM -xSSM16X16_AB SN-sn SSM -xTSMB SN-sn TSM -xLTGB LTG-0-l

Explanation of the output masks tsg: 0...7 for TSG number ssg: 0...3 for SSG number sn: 0 or 1 (identifies the SN side) l: LTG number y: 0 or 1 for SSM16B number x: 0...7 for number of the subunit concerned

Description of the SN speech path testThe SN unit to be tested (SN, SSG or TSG) must be in the status MBL (maintenanceblocked). The SN speech path test is started by an input on an operator terminal, towhich the results are sent.If the SN speech path test is called for a complete SN side, a quick test is carried out. Ifthe SN speech path test is called for a TSG(B) or SSG(B) without a subunit being spec-ified, all subunits of this switching group are tested. All the subunits are tested compre-hensively in succession. If a subunit is specified, only this subunit is testedcomprehensively.The SN speech path test cannot test speech paths via which nailed-up connections andmessage channels MCH run. Nor does it test a connection set up during the test. Quick test: The quick test is a more superficial test. It tests the through-connection

via each input and output of a subunit. Not all possible combinations are through-

24 A30828-X1150-N300-2-7620


connected and only some of the time slots in the module are allocated. In otherwords the quick test can only detect serious faults.

Comprehensive test: All speech memories of the input and output time stage in themodule TSMB are tested, as far as possible, by the speech path test. In other wordsall inputs and outputs of a TSMB module and all time slots are allocated. Thethrough switching of each individual input is tested to each output in the SSM8Bmodule. The through switching of an input to an output in the SSM16B is with thesame link. Faulty multiplexers and connections can therefore be located.

After the operator has entered the test command, the switch group to be tested (SN,TSG or SSG) is configured from MBL to SEZ. If the configuration was completed suc-cessfully, the actual SN speech path test is started. The speech paths are through-con-nected and tested in succession. When the test has been completed, the testedswitching group is reconfigured to MBL and the end result of the SN speech path test isoutput.Speech path test duration for medium system load: approx. 40 min for a TSG opprox. 80 min for a SSG

Test of a speech path through-connectionEach individual speech path through-connection is tested by means of a COC test.When a COC test takes place, the LTG-A sends a test pattern via both SN sides. TheLTG-B echoes the test pattern and returns it via both SN sides to the LTG-A where it iscompared with the test pattern which was sent. If the LTG detects a discrepancy, itsends an error report to the CP.

Fault analysisIf a fault occurs during configuration to SEZ (seized) of the switching group to be tested,the SN speech path test is not started and a fault printout is made. The SN speech pathtest is terminated and a fault printout issued after the first COC fault has been detected.The fault printout contains the subunits via which the faulty through-connection wasmade. There are two possible causes of a COC error report which is relevant for the SNspeech path test: When a speech path is through-connected by the test, a COC fault isdetected, or a COC fault is detected during through-connection of a speech path by nor-mal switching operations. In the latter case, only the COC faults which affect the SN unitto be tested are evaluated.

A30828-X1150-N300-2-7620 25


NM:SN/MCH

4 DiagnosisThe SND diagnosis is a complete function test (overall test) of an SND unit or of an en-tire SND side.Parallel running of the SND diagnosis with call processing is not possible as they bothinterfere with each other. For example, faults are deliberately produced in an SND unitduring diagnosis and their reactions are checked or, as a test condition, certain syntheticmessage sequences must be generated.The SND diagnosis can therefore only run in off-line operation, i.e. before the start of thediagnosis the appropriate unit (SN, SNMUX, SNMAT, MATC, MATM) or SN side mustbe MBL.The MB diagnosis is not automatically initiated by the system, but rather by the user bymeans of MML commands.

Fault analysisThe CP carries out a plausibility test and the number of the specified unit is tested. Afterthe diagnosis has been called up by the operator (MML command), unit is configured bythe diagnosis software in the CP to SEZ.If a fault occurs during configuration of the SN unit to be tested or the unit cannot be ac-cessed via the S1 or S3 interface, the diagnosis is not started and an ERROR MES-SAGE is output.If the configuration is executed and the diagnosis started the test steps are carried outby the SND firmware on modules MUXC an MATC. Faults, which the test detects arereported to fault detection FD in the CP.Once the diagnosis has been completed, the command is repeated once more but thistime with the additional PART. EXEC'D. Then follows the result of the diagnosis with themessage that a fault was detected (FAULTS DETECTED). The input command is re-peated and a PROGRESS MESSAGE is then displayed with all the diagnosis informa-tion (see 7.12 "Output Mask MMN:SN250-2000").If no fault behavior is detected only the begin and the end of the diagnosis are displayedat the terminal (command repetition with STARTED and EXEC'D) with the RESULT= NO FAULT DETECTED.

Interface to Timer ManagementThe execution of the diagnosis test steps in the SND is supervised via supervision timer.The specification of the timer values depends on the test duration of each test step.Hence, the test duration of a SNMUX is the sum of the duration of different test stepsthat are executed either in parallel or serial. Following table shows the correspondingtest steps involved by an MML DIAG command.

MML-Command test duration supervision timerDIAG SNMUX, TA=HWC 1,7 min. 2 min.DIAG SNMUX, TA=LOOP 5,3 ms. 1 min.DIAG SNMAT 5 min. 17 min.DIAG MATM 5 min. 17 min.DIAG MATC 0,5 sec. 1 min.DIAG SN 5 min. 17 min.

26 A30828-X1150-N300-2-7620


The test steps concerning LILD or OFC links are executed in serial. The test duration of1,7 min. is the sum of single steps. The supervision timer does not take the configurationof the SNMUX into account. For an SNMUX with one LILD or one OFC link is the samesupervision timer specified than for a SNMUX with the maximum of 8 LILD or 8 OFClinks.The test duration of the complete SNMAT is almost equal to a single test step of aMATM, since the SNMAT test steps consist of test steps concerning MATM which areexecuted parallel. The duration time of the MATC is not taken into account.The test duration of the complete SND is almost the same as the test duration of theSNMAT, since the test steps are executed in parallel on the different units.TA (test area) can only be specified for SNMUX, since for the other units only a hard-ware diagnosis is executed.The following test programs, which detect the faults listed, can be started.

Diagnosis SNMUXThe diagnosis of an SNMUXA area depends on the configuration, consisting of MUXCand installed LILDs and OMLs. The diagnosis of an SNMUXB area consists of MUXC,LILE and installed OFC, SNOPT and OMLs. Equipment numbers 0...15 are allowed.TA = HWC complete hardware test of SNMUX: Checksum test FEPROM (boot/current/backup-FW) and executable FW in RAM PLL test Test of all ASICs Test of module in- and outputs with LOOP via the OML (depending on the number

of installed modules) HDLC interface testTA = LOOP Complete LOOP via SNMUX, OML920 and SNMAT: A test pattern, determined by the equipment number, is sent through the test chan-

nels of the MUX16 of LILD. Each MUX must receive its own individual test pattern. Result is read in MUX16 of LILDFor the loop test a loop is set up via SNMUX - SNMAT - SNMUX. An SNMUX- specifictest pattern is fed into the test channels of the ASIC MUX16 on the LILD or OMUX onLILE / SNOPT in the direction of SNMAT and reported to the CP on the same channels.The test channels that are used are always looped in the SNMAT. In the case of a252LTG configuration (2 SNMUXs) the SNMUXA with multiplexer function (SNMUX1)loops the test pattern via the OML link to the SNMUX with switch function (SNMUX0)and back again, where the test pattern is checked. If both SNMUX are of type B in DE6.0both SNMUX are in one frame and the test pattern is looped via the backplane connec-tion.

Diagnosis SNMATThe diagnosis of an SNMAT area covers MATC, the specified MATM, and OML.Overall test of the SNMAT (MATC and all configured MATMs) Checksum test Flash FEPROM (Boot/Current/Backup FW) and executable FW in

the RAM PLL test MATC (detection of failure of the 8Mbit reference clock from the MBD) Test of all ASICs Test of the module inputs/outputs with a loop test via the electrical OML loop (de-

pending on the modules specified in the command): The inputs and outputs of each

A30828-X1150-N300-2-7620 27


NM:SN/MCH

MATM are short-circuited by OMLs. The test pattern is loaded into the output ASICsof all MATMs, sent to all outputs and looped via the short-circuited OMLs to all MAT-Ms. In the EMUs of each MATM the test patterns are read out and the result is sentto MATC, where superordinate error selection is then performed.

Interface test (HDLC)Diagnosis MATMDiagnosis of a single MATM. The equipment number specifies the MATM that is to bediagnosed.Overall test of the MATM Checksum test Flash FEPROM (Boot/Current/Backup FW) and executable FW in

the RAM PLL test Test of all ASICs Test of the module outputs and of 16 inputs of the MATM with loop test: The test pat-

terns are routed to all outputs of an MATM and looped through to the inputs by short-circuited OMLs. Since only 4 OMLs are assigned to each MATM on the output side,only 16 inputs can be tested in this way.

Interface test (HDLC)

28 A30828-X1150-N300-2-7620


5 Interpretation of SNA Fault Printouts

5.1 Fault Printout MMN:SN001-0000

5.1.1 Fault Printout: SGC/HWC FAILURE

SN FAILURE WITH CONFIGURATION MMN:SN001-0000

SGC/HWC FAILURE

FAULT LOCATION: www-sn-xsg SGC/LIM

CONFIGURATION: www-sn-xsg FROM: yyy TO: UNA

SUPPLEMENTARY INFORMATION:

Haabbcccc zzzzzzzz zzzzzzzz zzzzzzzz Hddzzzzzz zzzzzzzz zzzzzzzz zzzzzzzz

In SN (63LTG):FAULT LOCATION: SN-snCONFIGURATION: SN-xn FROM: yyy TO: UNA

Byte interpretation aa: message source

bb: jobcode 2

c..c: IO processor number (see 2) dd: fault byte

z..z: These bytes are not occupied. Entries not equal to 0 are also not relevant.

System response The fault is conditional, i.e. the defective switch group or the defective SN side is con-

figured to UNA if the partner switch group or the redundant SN side is ACT or STB.If there is no redundancy, the configuration is rejected and an ISTART1 is initiated.If the last ISTART was less than 45 minutes ago, the defective switch group is con-figured to UNA unconditionally in order to avoid rolling recoveries.

The fault is displayed on the system / alarm panel under object SN.

5.1.1 Fault Printout: SGC/HWC FAILURE5.1.2 Fault Printout: SGC/SGC FAILURE5.1.3 Fault Printout: SGC/PLLU FAILURE5.1.4 Fault Printout: PATH SET/HWC FAILURE5.1.5 Fault Printout: PATH SET/TSM FAILURE5.1.6 Fault Printout: PATH SET/SSM8 FAILURE5.1.7 Fault Printout: PATH SET/SSM16 FAILURE

06 IOCP

42 SN_SGCF

80 Fault in SGC-HWC interface

A30828-X1150-N300-2-7620 29


NM:SN/MCH

The fault information is stored in the history file and written into the alarm file(AM.ALARM).

Description of the hardware controller (HWC) for SN (126...504LTG)The hardware controller is the link between the SGC module and the control memoriesof modules TSM, SSM8/15 and SSM16/16.It also supplies the LIS switches on the LIS modules.The hardware controller contains the following registers:

The switch group control (SGC) supplies the HWC registers with information. This sup-ply is program-controlled. The relevant information is forwarded to the modules TSM,SSM8/15 and SSM16/16, the hardware being controlled by the sequence controller. Onthe modules TSM, SSM8/15 and SSM16/16, the control memories are supplied with in-formation for path setting. On the LIS module the LIS circuits are supplied with informa-tion. Information is transmitted to the control memories and the LIS circuits via signallines DA0...3 and SWA0... 15 The control information comes back to the HWC registersvia signal lines DA0...3 and SWB0...15.

Description of the hardware controller (HWC) for SN (63LTG)The hardware controller is the link between the SGC module and the control memoriesof modules TSM and SSM16/16.It also supplies the LIS switches on the LIS modules.The hardware controller contains the following registers:

The switch group control (SGC) supplies the HWC registers with information. This sup-ply is program-controlled. The relevant information is forwarded to the modules TSMand SSM16/16, the hardware being controlled by the sequence controller. On the mod-ules TSM and SSM16/16, the control memories are supplied with information for pathsetting.

time slot register byte 0,1instruction registerinformation register byte 0,1module address registerLIS switch register A, B

time slot register byte 0,1instruction registerinformation register byte 0,1module address register

30 A30828-X1150-N300-2-7620


Fig. 5.1 HWC controller

Testing the hardware controllerThe program HWCCH tests the hardware controller. This program cannot be interrupt-ed. There are two possibilities for calling up the HWCCH: The operator calls the relevant demand test (diagnosis). The result of the demand

test is either positive or negative indication. Internal routine test is always carried out if there is no CP command to process.The values '00' and 'FF' are written into the HWC registers during the hardware control-ler test. Each time a value is written to a register, it is read out and the value which isread out is compared with the value entered. The sequence controller is also tested. Forthis the control memory of the fictitious module SSM16/16-15 is read. If the control mem-ory is read within 125 s, the result of the test is positive.

Fault analysisIf the HWCCH program detects a fault, it is reported to the FA:SN with the message SN-SGCF. If the FA:SN receives two SGC/SGC fault messages within 27 seconds, it auto-matically switches off the faulty unit.

Suspect hardware SN

Cross referencesLayout of rack and associated fuses: Construction, Racks.Layout of module frame and cabling: Construction, Frames SN.

HWCregister

Comparator

HRS0..7

D0..7

IOW-L

IOR-L

ZL0..9

Z0..9

LIMSGC

Sequence con-troller

Q0..2

READ0..3

WRITE0..3

TSMLISSSMCSM

ADR0..4

CMS

DA0..3

SWA0..15DB0..3

SWB0..15

Modules: M:LIM, M:SGCModule frames: F:SSG, F:TSG or F:SN

A30828-X1150-N300-2-7620 31


NM:SN/MCH

5.1.2 Fault Printout: SGC/SGC FAILURE


SGC/SGC FAILURE







bb: jobcode 2





The fault is displayed on the system / alarm panel under object SN. The fault information is stored in the history file and written into the alarm file

(AM.ALARM).Description of the SGC memories Program memory:

The program memory contains 16 Kbytes.It consists of 2 EPROMS of 8 Kbytes each.The address area ranges from '0000' to 3FFF'.The EPROM components are inserted on the M:SGC.

Data memory:The data memory contains 1 Kbyte.It consists of one RAM chip.The data memory address area ranges from '8000' to '83FF'.The RAM chip is inserted on the M:SGC.

06 IOCP

42 SN_SGCF

01 fault in SGC program or data memory

32 A30828-X1150-N300-2-7620


Fig. 5.2 SGC memory

SGC memory testProgram and data memory testing is part of the internal routine test. It is always per-formed when there is no CP command to process. The program CPUCH carries out thetest.

The last three bytes of the program memory contain a comparison value (reference val-ue), the check differences formed from the difference between '1000000' and the sumof all program memory contents of address '0000' to '3FFC.

Program memory testThe actual value is determined in the program memory test and compared with thestored check difference.

Data memory testThe data memory test is carried out across the data memory area from address '8200'to '83FF'. The data memory area from '8000' to '81FF' is not tested. It contains the com-mand and message wait list. Each byte is first written with 'AA' and then with '55' for thetest. After each byte has been written, its contents are read out again and compared withthe reference value.

Fault analysisIf the program CPUCH detects a fault, it is reported to the FA:SN with the message SN-SGCF. If the FA:SN receives two SGC/SGC fault messages within 27 seconds, itswitches off the faulty unit unconditionally.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

.

Programmemory

Data mem-ory

.

.

.

.

.

.

.

.

.

Address

0000

3FFC

3FFD

3FFE

3FFF

8000

83FF

A30828-X1150-N300-2-7620 33


NM:SN/MCH

Suspect hardware


5.1.3 Fault Printout: SGC/PLLU FAILURE


SGC/PLLU FAILURE







bb: jobcode 2






(AM.ALARM).

Module: M:SGCModule frames: F:SSG, F:TSG or F:SN

06 IOCP

42 SN_SGCF

02 fault in the PLL supervisory circuit

34 A30828-X1150-N300-2-7620


Description of the PLL supervisory circuitThe reference frequency fr' and the comparison frequency fv' are applied to the super-visory circuit which detects a PLL fault if the rising edges of the frequencies fr' and fv'diverge by more than 244 ns.

Fig. 5.3 PLL supervisory circuit

Testing the PLL supervisory circuitThe program PLLCH tests the PLL supervisory circuit. There are two basic possibilitieswhich lead to the program PLLCH being called: The operator calls the relevant demand test (diagnosis). The result of the demand

test is a positive or negative indication. Internal routine test is always carried out if there is no CP command to process.The signal POB is set to high, which inverts the reference frequency fr', thus simulatinga PLL fault. The signal POA enables the PLL supervisory circuit (POA=0) or blocks it(POA=1). The PLL interrupt circuit line INT1 must transfer the value 1 when the PLL su-pervisory circuit is enabled and the value 0 when it is disabled. If it does not, the PLLsupervisory circuit is faulty.

Fault analysisIf the program PLLCH detects a fault, it is reported to the FA:SN with the message SN-SGCF. If the FA:SN receives two SGC/PLLU fault messages within 27 seconds, itswitches the faulty unit off conditionally.

Suspect hardware

Input meter

Clock generationPLL supervisory circuit

POA

POB

INT1

LIM

MB

SGC

CAM C0,C1

fr

fv

SN modules: M:LIM, M:SGCModule frames: F:SSG, F:TSG or F:SNMBD modules: M:MBDCGModule frames: F:MBDor MBB module: M:CG/MUXModule frames: F:MB/CCG(B)

A30828-X1150-N300-2-7620 35


NM:SN/MCH

Cross referencesLayout of rack and associated fuses: Construction, Racks.Layout of module frame and cabling: Construction, Frames SN and Construction,Frames MB/CCG.

5.1.4 Fault Printout: PATH SET/HWC FAILURE


PATH SET/HWC FAILURE

FAULT LOCATION: www-sn-xsg LIM



Haabbcccc dddddddd dddddddd dddddddd Heezzzzzz zzzzzzzz zzzzzzzz zzzzzzzz



bb: jobcode 2, specifies the relevant setting instruction c..c: IO processor number (see 2) d..d: setting data ee: fault byte, bit 7 = 1 -> HWC fault z..z: These bytes are not occupied. Entries not equal to 0 are also not relevant.


figured to UNA if the partner switch group or the redundant SN side is ACT or STB.Switching traffic is not impaired.


(AM.ALARM).Description of the sequence controllerThe sequence controller is a part of the hardware controller on modules LIM. The re-spective HWC command determines the performance of the sequence controller. It sup-plies signals (WRITE, READ) on time for control memory writing or reading on modulesTSM, SSM8/15 or SSM16/16. The sequence controller is started when the instructionregister (writing) has been loaded with an HWC command and the comparator signalsidentical time slots. The comparator compares the time slot numbers in the time slot reg-isters with the time slot numbers derived from the main counter.

06 IOCP

36 A30828-X1150-N300-2-7620


Fig. 5.4 HWC controllerThe hardware controller contains the following registers:

Checking the sequence controllerThe sequence controller is checked every time a read and write procedure is carried outin a control memory. For this purpose the instruction register (read) is read after thecommand has been executed. If its contents are not defined, a fault has occurred. If theexecution of the HWC command is found to have been unsuccessful, the HWC registersare reloaded. If the execution of the HWC command is again found to have been unsuc-cessful within 125 us, an HWC fault is reported to the FA:SN in the CP.

Fault analysisHWC setting errors can lead to sequence errors such as TSM, SSM8/15 or SSM16/16setting errors. The HWC setting error therefore has the highest priority - i.e. if other set-ting errors apart from the HWC setting error are reported to the FA:SN at the same time,the code word HWC setting error appears in the fault printout. The faulty unit is uncon-ditionally switched off.

Suspect hardware


time slot register byte 0,1instruction registerinformation register byte 0,1module address registerLIS switching register A, B SN (126...504TG)

HWC reg-ister

Comparator

HRS0..7

D0..7

IOW-L

IOR-L

ZL0..9

Z0..9

LIMSGC

sequence control-ler

Q0..2

READ0..3

WRITE0..3

TSMCSMLISSSM

ADR0..4

CMS

DA0..3

SWA0..15DB0..3

SWB0..15

Modules: M:LIM, M:SGCModule frames: F:SSG, F:TSG or F:SN

A30828-X1150-N300-2-7620 37


NM:SN/MCH

5.1.5 Fault Printout: PATH SET/TSM FAILURE


PATH SET/TSM FAILURE

FAULT LOCATION: TSG-sn-tsg TSM-x

CONFIGURATION: TSG-sn-tsg FROM: yyy TO: UNA





bb: jobcode 2, specifies the number of the relevant setting command c..c: IO processor number (see 2) d..d: setting data ee: fault byte





(AM.ALARM).Description of the setting procedureWriting to the control memory:The module in question is addressed by lines ADR0...4. The information is transferredserially from the HWC information register via the signal line DA into a read-write-controlregister. The sequence controller on the LIM activates the WRITE signal. The read-writecontroller writes the information in parallel to the control memory.Reading from the control memory:The module in question is addressed by the lines ADR0...4 for reading from the controlmemory, as for writing to the control memory. The HWC sequence controller activatesthe READ signal. The read-write controller takes over in parallel the information readfrom the control memory. From there the information is transferred via line DB to theHWC.

06 IOCP

bit 4 = 1 TSM fault (time slot B)bit 5 = 1 TSM fault (time slot A)

38 A30828-X1150-N300-2-7620


Fig. 5.5 TSM setting

Path setting checkDuring path setting the information read from the control memory of a TSM module iscompared with the information written to the control memory. If there are discrepancies,the path setting is faulty.

Fault analysisThe fault is reported to the FA:SN (in the CP), which then conditionally switches off thefaulty unit.

Suspect hardware


HWCregister

Sequencecontroller

Addressing

Read/writecontroller

DADB

WRITEREAD

ADR0..4

TSMLIM

Controlmemory

WE

CI0..10

CO0..10

SGC

SN (126...504LTG): M:LIM, M:SGC, M:TSM, M:LIL, M:LISSN (63LTG) M:LIM, M:SGC, M:TSM, M:LIL, M:SSM16/16Module frame: F:TSG or F:SNMBB module: M:IOPCModule frame: F:MB/CCG(B)or MBD module: M:MBDHModule frame: F:MBD

A30828-X1150-N300-2-7620 39


NM:SN/MCH

5.1.6 Fault Printout: PATH SET/SSM8 FAILURE


PATH SET/SSM8 FAILURE

FAULT LOCATION: SSG-sn-ssg SSM8-x

CONFIGURATION: SSG-sn-ssg FROM: yyy TO: UNA




bb: jobcode 2, specifies the number of the relevant setting command c..c: IO processor number (see 2) d..d: setting data ee: fault byte


System response The fault is conditional, i.e. the defective switch group is configured to UNA if the

partner switch group is ACT or STB. Switching traffic is not impaired. The fault is displayed on the system / alarm panel under object SN. The fault information is stored in the history file and written into the alarm file


06 IOCP

bit 4 = 1 SSM8/15 fault (time slot B)bit 5 = 1 SSM8/15 fault (time slot A)

40 A30828-X1150-N300-2-7620


Fig. 5.6 SSM8 setting

Path setting checkDuring path setting the information read from the control memory of an SSM8/15 moduleis compared with the information written to the control memory. If there are discrepan-cies, the path setting is faulty.

Fault analysisThe fault is reported to the FA:SN (in the CP), which then conditionally switches off thefaulty unit.

Suspect hardware


HWCregister

Sequencecontoller

Addressing


DADB

WRITEREAD

ADR0..4

SSMLIM

Controlmemory

WE

CI0..10

CO0..10

SN modules: M:LIM, M:SGC, M:TSM, M:LIL, M:LISModule frame: F:SSGMBB module: M:IOPCModule frame: F:MB/CCG(B)MBD module: M:MBDHModule frame: F:MBD

A30828-X1150-N300-2-7620 41


NM:SN/MCH

5.1.7 Fault Printout: PATH SET/SSM16 FAILURE


PATH SET/SSM16 FAILURE







bb: jobcode 2, specifies the relevant setting instruction c..c: IO processor number (see 2) d..d: setting data ee: fault byte






06 IOCP

bit 2 = 1 SSM16/16 fault (through-connection B -> A)bit 3 = 1 SSM16/16 fault (through-connection A -> B)

42 A30828-X1150-N300-2-7620


Fig. 5.7 CSM setting

Path setting checkDuring path setting the information read from the control memory of an SSM16/16 mod-ule is compared with the information written to the control memory. If there are discrep-ancies, the path setting is faulty.

Fault analysisThe fault is reported to the FA:SN (in the CP) which then switches off the faulty unit con-ditionally.

Suspect hardware


HWCregister

Sequencecontroller

Addressing


DADB

WRITEREAD

ADR0..4

CSMLIM

Controlmemory

WE

CI0..10

CO0..10

SN (126...504LTG) M:LIM, M:SGC, M:SSM8/15, M:LIS, M:SSM16/16SN (63LTG) M:LIM, M:SGC, M:TSM, M:LIL, M:SSM16/16Module frame: F:SSG or F:SNMBB module: M:IOPCModule frame: F:MB/CCG(B)MBD module: M:MBDHModule frame: F:MBD

A30828-X1150-N300-2-7620 43


NM:SN/MCH

5.2 Fault Printout MMN:SN002-0000 SN FAILURE WITH CONFIGURATION MMN:SN002-0000

FA:COC/TSM FAILURE

FAULT LOCATION: TSG-sn-tsg TSM/LIL-x

CONFIGURATION: TSG-sn-tsg FROM: yyy TO: UNA


Haabbcczz dddddddd zzzzzzzz eeeeffgg Hzzzzzzzz zzzzzzzz zzzzzzzz zzzzzzzz



bb: function

cc: process identification

d..d: IO processor number (see 2) e..e: TSM number ff: predicate, SG_SURE

gg: configuration information





(AM.ALARM).

0F SGMES

18 SG_TSM_DEF

15 SG_FA_COC

00 certain01 uncertain

01 SG_COND_CONF

44 A30828-X1150-N300-2-7620


Suspect hardware

In addition all functional units mentioned in the failure statistics (see 5.2.1).Cross referencesLayout of rack and associated fuses: Construction, Racks.Layout of module frames and cabling: Construction, Frames SN and Frames LTG

5.2.1 Cross Office Check

Failure statistics for SN (126...504LTG)

FAILURE STATISTICS:FD:COC

LTG t-l t-l t-l t-l t-l t-l t-l t-l t-l t-l t-l t-l t-lERRORS xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx

MODULE 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15------------------------------------------------------------------------

TSG-n-t xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx:

SSG-n-s xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xxSSM-n-s xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx:

Explanation l: LTG number t: 0...7 TSG number s: 0...3 SSG number n: 0 or 1 (indicates the switching network side) xxx: Meter reading for the relevant LTG xx: Meter reading for the functional unit of the SN

SN functional units: TSG-n-t: LIL/TSM SSG-n-t: LIS SSM8/15 SSM-n-t: SSM16/16

SN modules: M:LIL, M:TSMModule frames F:TSG, F:SSG or F:SNLTG modules: LIU, M:GSL, M:GSM, M:GPNx (LTGN)Module frame F:LTG

A30828-X1150-N300-2-7620 45


NM:SN/MCH

Failure statistic SN (63LTG)

FAILURE STATISTICS:FD:COC

LTG 0-l 0-l 0-l 0-l 0-l 0-l 0-l 0-l 0-l 0-l 0-l 0-l 0-lERRORS xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx xxx

MODULE 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15------------------------------------------------------------------------

TSG-0-0 xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xxTSG-1-0 xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xxSSM-0-0 xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xxSSM-1-0 xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx xx

Explanation l: LTG number xxx: Meter reading for the relevant LTG xx: Meter reading for the functional unit of the SN

SN functional units: TSG-sn-0: LIL/TSM SSM-sn-0: SSM16/16

The fault history meter readings indicate the COC errors in the respective functionalunits. Functional units with one or more COC errors are suspected of being faulty.

Description of cross office checkThe fault-free through connection of a call is ensured by checking the speech paths viathe FA/FD:COC (cross office check) before the start of the call itself. Controlled by theLTG of the A-subscriber, the path is tested via: active SN inactive SN internal A LTGTest bit samples from the LIU, GSL or GSM of the A subscriber LTG are transmitted viathe transmission path to the B subscriber LTG. They are diverted there into the GS (for testing the active SN) or the LIUs (for testing the inactive SN)and returned to A subscriber LTG. A test path is connected in the LIU by the A sidedGS/SPMX for an internal check of the A LTG.If the test bit pattern received does not match the one that was sent, this indicates aCOC failure. The calling partys LTG then formulates a FAILURE message, which issent via the IOCP communication interface to CP call processing CALLP. CALLP gen-erates an internal ADDA message from FAILURE and the CPs SN setting data. The in-ternal message contains full information on the location of the error. The safeguardingmonitor now writes the ADDA message in the SG.OPER.Fault analysis FA:COC is the receiving process for the ADDA message. FA:COC eval-uates the error message. In the case of SN errors that affect only one side of the SN,FA:COC is responsible for supervision and evaluates the fault byte in the error mes-sage. A statistics counter is updated for each LTG and for each TSM, SSM8/15 andSSM16/16 module. In addition, a further counter keeps an accumulated total of all COCfailures.A COC failure results in incrementation of COC counters for all units in the setting path.

46 A30828-X1150-N300-2-7620


Fault treatmentWhen the first COC failure occurs, a 30-minute test cycle is started. If the threshold val-ue of 20 errors is reached during this cycle, the SN is re configured if the following con-ditions are met: all errors occurred in the active SN the redundant SN side is in state STBIf the number of errors reaches or exceeds 60, the affected SN sides are disconnectedif they are named as faulty unit in 95% of the error messages.If these conditions do not apply, the statistics counters and timers are reset, the discon-nection threshold is raised to 200 COC failures and a new cycle is started, in which the95% criterion also applies.General conditions for disconnection are: redundancy available error location found without doubtConfiguration and disconnection of SN subunits is carried out by FA:SN on the instruc-tions of FA:COC.

5.2.2 ADDA MessageThe ADDA message is generated after a negative COC testing cycle.It contains: all setting data of the SN the fault location within the SN (SN0, SN1, A LTG)for the faulty connection.ADDA is stored in the SG.OPER file and has following set-up:Haabbccxx 0000xxxx dddddddd ddddddffHmmnnoopp qqrrsstt uuvvwwyy zzzzzzzz

Byte Interpretation aa: Message source,

bb: Function

cc: Process identification

xx: Format standard 00: Port number (not used) d..d: Fault location 1...7 (not used) ff: Fault location 8

1E CALLP

1C ADDA

15 SG_CALL_PROC

01 SN002 SN103 SN0 and SN104 A LTG

A30828-X1150-N300-2-7620 47


NM:SN/MCH

mm: Time slot A -> B

nn: Time slot B -> A

oo: Path

pp: SSM16 B -> A or SSM16 A -> B (not relevant for SN (63LTG))

qq: Channel A

rr: SDC A

ss: TSM A

tt: TSG A

uu: Channel B

vv: SDC B

ww: TSM B

yy: TSG B (not for SN (63LTG))


05 SN0 and A LTG06 SN1 and A LTG07 both SN sides and A LTG

Bit 6...0 Time slot: TSM - SSM8/15 or SSM16/16 for SN (63LTG)

Bit 6...0 Time slot: TSM - SSM8/15 or SSM16/16 for SN (63LTG)

Bit 1...0 Space stage = Link No. = SSG No. or SSM No.for SN (63LTG)

Bit 7...4 SSM16-No. B -> ABit 3...0 SSM16-No. A -> B

Bit 6...0 Time slot A LTG - TSG A

Bit 1...0 SDC Multiplex No. A = Input No. on TSM for A

Bit 3...0 Time stage A = TSM No. of TSG ADetermination of the A-LTG: A-LTG = 4 x TSM A + SDC A

Bit 2...0 Time stage group A (not relevant for SN (63LTG))

Bit 6...0 Time slot B LTG - TSG B

Bit 1...0 SDC Multiplex No. B = Input No. on TSM for B

Bit 3...0 Time stage B = TSM No. of TSG BDetermination of the B-LTG: B-LTG = 4 x TSM B + SDC B

Bit 2...0 Time stage group B

48 A30828-X1150-N300-2-7620



FA:COC/SSM16 FAILURE




Haabbcczz dddddddd zzzzzzzz zzeeffgg Hzzzzzzzz zzzzzzzz zzzzzzzz zzzzzzzz



bb: function

cc: process identification

d..d: IO processor number (see 2) ee: SSM16/16 number ff: predicate, SG_SURE

gg: configuration information





(AM.ALARM).Suspect hardware

0F SGMES

59 SG_SSM16_DEF

15 SG_FA_COC

00 certain01 uncertain

01 SG_COND_CONF

Module: M:SSM16/16Module Frames: F:SSG, F:TSG or F:SN

A30828-X1150-N300-2-7620 49


NM:SN/MCH

In addition all functional units mentioned in the failure statistics (see 5.2.1).Cross referencesDescription of cross office check see 5.2.1 and ADDA Message see 5.2.2Layout of rack and associated fuses: Construction, Racks.Layout of module frame and cabling: Construction, Frames SN.


FA:COC/SN FAILURE

FAULT LOCATION: SN-sn

CONFIGURATION: SN-sn FROM: yyy TO: UNA


Haabbcczz dddddddd zzzzzzzz zzzzeeff Hzzzzzzzz zzzzzzzz zzzzzzzz zzzzzzzz

Byte interpretation aa: Message source,

bb: Function

cc: Process identification,

d..d: IO processor number (see 2) ee: Predicate, SG_SURE

ff: Configuration information,

z..z: These bytes are not occupied. En

sn

Documents

Transcript of sn