Semiconductor Device Modeling and Characterization EE5342, Lecture 9 -Spring 2010
Semiconductor Device Modeling and Characterization EE5342, Lecture 25 -Sp 2002
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Transcript of Semiconductor Device Modeling and Characterization EE5342, Lecture 25 -Sp 2002
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Semiconductor Device Modeling and CharacterizationEE5342, Lecture 25 -Sp 2002
Professor Ronald L. [email protected]
http://www.uta.edu/ronc/
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MOSFET DeviceStructre Fig. 4-1, M&A*
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n-channel enh.circuit model G
D
B
SCgs
Cgd
Cgb
CbsCbd
RD
RG
RB
RB
RDS
Idrain
DSS DSD
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SPICE mosfet Model Instance CARM*, Ch. 4, p. 290M MOSFET
General Form
M<name> <drain node> <gate node> <source node>+ <bulk/substrate node> <model name>+ [L=<value>] [W=<value>]+ [AD=<value>] [AS=<value>]+ [PD=<value>] [PS=<value>]+ [NRD=<value>] [NRS=<value>]+ [NRG=<value>] [NRB=<value>]+ [M=<value>]
Examples
M1 14 2 13 0 PNOM L=25u W=12uM13 15 3 0 0 PSTRONGM16 17 3 0 0 PSTRONG M=2M28 0 2 100 100 NWEAK L=33u W=12u+ AD=288p AS=288p PD=60u PS=60u NRD=14 NRS=24 NRG=10
L = Ch. L. [m]W = Ch. W. [m]AD = Drain A [m2]AS = Source A[m2]NRD, NRS = D and S diff in squares
M = device multiplier
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SPICE mosfet model levels• Level 1 is the Schichman-Hodges
model• Level 2 is a geometry-based,
analytical model• Level 3 is a semi-empirical, short-
channel model• Level 4 is the BSIM1 model• Level 5 is the BSIM2 model, etc.
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SPICE ParametersLevel 1 - 3 (Static)Par am. Parameter Description Def . Typ. Units
VTO Zero-bias Vthresh 1 1 V
KP Transconductance 2.E-05 3.E-05 A/ V 2̂
GAMMA Body-eff ect par. 0.0 0.35 V 1̂/ 2
PHI Surf ace inversion pot. 0.6 0.65 V
LAMBDA Channel-length mod. 0.0 0.02 1/ V
TOX Thin oxide thickness 1.E-07 1.E-07 m
NSUB Substrate doping 0.0 1.E+15 cm̂ -3
NSS Surf ace state density 0.0 1.E+10 cm̂ -2
LD Lateral diff usion 0.0 8.E-05 m
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Par am. Parameter Description Def . Typ. Units
TPG Type of gate material* 1 1
UO Surf ace mobility 600 700 cm̂ 2/ V-s
I S Bulk j ctn. sat. curr. 1.E-14 1.E-15 A
J S Bulk j ctn. sat. curr. dens. A/ m̂ 2
PB Bulk junction potential 0.8 0.75 V
RD Drain ohmic resistance 0 10 Ohms
RS Source ohmic resistance 0 10 Ohms
RSH S/ D sheet ohmic res. 0 10 Ohms/ sq
SPICE ParametersLevel 1 - 3 (Static)
* 0 = aluminum gate, 1 = silicon gate opposite substrate type, 2 = silicon gate same as substrate.
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SPICE ParametersLevel 1 - 3 (Q & N)Par am. Parameter Description Def . Typ. Units
CJ Zero-bias bulk cap./ A 0 1.E-09 Fd/ m̂ 2
MJ Bulk j ctn. grading coeff . 0.5 0.5
CJ SW Zero-bias perimeter C/ l 0 1.E-09 Fd/ m
MJ SW Per. C grading coeff . 0.5 0.5
FC For.-bias cap. coeff . 0.5 0.5
CGBO Gate-bulk overlap C/ L 0 2.E-10 Fd/ m
CGDO Gate-drain overlap C/ L 0 4.E-11 Fd/ m
CGSO G-S overlap C/ L 0 4.E-11 Fd/ m
AF Flicker-noise exp. 1 1.2
KF Flicker-noise coeff . 0.0 1.E-26
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Level 1 Static Const.For Device EquationsVfb = -TPG*EG/2 -Vt*ln(NSUB/ni)
- q*NSS*TOX/eOxVTO = as given, or
= Vfb + PHI + GAMMA*sqrt(PHI)KP = as given, or = UO*eOx/TOXCAPS are spice pars., technological
constants are lower case
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Level 1 Static Const.For Device Equations = KP*[W/(L-2*LD)] = 2*K, K not spiceGAMMA = as given, or = TOX*sqrt(2*eSi*q*NSUB)/eOx2*phiP = PHI = as given, or = 2*Vt*ln(NSUB/ni)ISD = as given, or = JS*AD
ISS = as given, or = JS*AS
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Level 1 Static Device Equationsvgs < VTH, ids = 0VTH < vds + VTH < vgs, id = KP*[W/(L-2*LD)]*[vgs-VTH-vds/2] *vds*(1 + LAMBDA*vds)VTH < vgs < vds + VTH, id = KP*[W/(L-2*LD)]*(vgs - VTH)^2 *(1 + LAMBDA*vds)
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SPICE ParametersLevel 2Par am. Parameter Description Def . Typ. Units
NEFF Total channel chg coeff . 1 5
UCRI T Critical E-fi eld f or mob. 1.E+04 1.E+04 V/ cm
UEXP Expon. coeff . f or mob. 0 0.1
UTRA Transverse fi eld coeff . 0 0.5
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SPICE ParametersLevel 2 & 3Par am. Parameter Description Def . Typ. Units
NFS Surf ace-f ast state dens. 0.0 1.E+10 cm̂ -2
XJ Metallurgical j ctn. depth 0.0 1.E-06 m
VMAX Max. drif t v of carr. 0.0 5.E+04 m/ s
XQC Coeff . of ch. Q share 0.0 0.4
DELTA Width eff . on Vthresh 0.0 1.0
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Level 2 StaticDevice EquationsAccounts for variation of channel
potential for 0 < y < LFor vds < vds,sat = vgs - Vfb - PHI +
2*[1-sqrt(1+2(vgs-Vfb-vbs)/2]
id,ohmic = [/(1-LAMBDA*vds)] *[vgs - Vfb - PHI - vds/2]*vds -2[vds+PHI-vbs)1.5-(PHI-vbs)1.5]/3
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Level 2 StaticDevice Eqs. (cont.)For vds > vds,sat
id = id,sat/(1-LAMBDA*vds)
where id,sat = id,ohmic(vds,sat)
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Level 2 StaticDevice Eqs. (cont.)Mobility variationKP’ = KP*[(esi/eox)*UCRIT*TOX /(vgs-VTH-UTRA*vds)]UEXP
This replaces KP in all other formulae.
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SPICE ParametersLevel 3Par am. Parameter Description Def . Typ. Units
KAPPA Saturation fi eld f actor 0.2 1.0
ETA Stat. f eedbk on Vthresh 0.0 1.0
THETA Mobility modulation 0.0 0.05 1/ V
DELTA Width eff . on Vthresh 0.0 1.0
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Project 4Part 1Generate outputs
duplicating any 8 of the following 14 figures in A&M*
Figure 4-7a and b, Figure 4-8a and b, Figure 4-9a and b, Figure 4-10,
Figure 4-11a only,Figure 4-12a only, Figure 4-13, Figure 4-15, Figure 4-19, Figure 4-20, Figure 4-23
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4-7a (A&M)
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Figure 4-7b (A&M)
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Figure 4-8a (A&M)
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Figure 4-8b (A&M)
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Project 4Parts 2, 3, and 4
2. Generate outputs duplicating Fig 9.9 in M&K*
3. For each simula-tion, give the com-plete list of model parameters used.
4. Give a brief discussion of how Level 1, 2, and 3 are selected by Pspice depending on the parameter set used.
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Body effect dataFig 9.9**
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References
• CARM = Circuit Analysis Reference Manual, MicroSim Corporation, Irvine, CA, 1995.
• M&A = Semiconductor Device Modeling with SPICE, 2nd ed., by Paolo Antognetti and Giuseppe Massobrio, McGraw-Hill, New York, 1993.
• M&K = Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986.