Research Article Intermediate Frequency Digital Receiver Based...

Research ArticleIntermediate Frequency Digital Receiver Based onMulti-FPGA System

Chengchang Zhang12 and Lihong Zhang2

1Department of Electrical Engineering College of Electronic Engineering Chongqing University of Posts and TelecommunicationsChongqing China2Electrical and Computer Engineering Faculty of Engineering and Applied Science Memorial University St Johnrsquos NL Canada

Correspondence should be addressed to Chengchang Zhang zhangcccqupteducn

Received 21 May 2016 Revised 23 September 2016 Accepted 28 September 2016

Academic Editor Bin-Da Liu

Copyright copy 2016 C Zhang and L Zhang This is an open access article distributed under the Creative Commons AttributionLicense which permits unrestricted use distribution and reproduction in any medium provided the original work is properlycited

Aiming at high-cost large-size and inflexibility problems of traditional analog intermediate frequency receiver in the aerospacetelemetry tracking and command (TTC) system we have proposed a new intermediate frequency (IF) digital receiver based onMulti-FPGA system in this paper Digital beam forming (DBF) is realized by coordinated rotation digital computer (CORDIC)algorithm An experimental prototype has been developed on a compact Multi-FPGA system with three FPGAs to receive 16channels of IF digital signals Our experimental results show that our proposed scheme is able to provide a great conveniencefor the design of IF digital receiver which offers a valuable reference for real-time low power high density and small size receiverdesign

1 Introduction

In the field of aerospace TTC system a ground station ismostly used to capture and track aerial vehicles with the aid ofa large high gain narrow beam Such a searching and trackingprocess works when the angle error detector of an antennaservo system can detect the angle error (including azimutherror and pitch error) between laser gyroscope inertial axisand antenna axis After amplification and certain operationsthis angle error signal can drive a servo motor to make theelectric antenna axis aim at the laser gyroscope inertial axisso as to realize automatic tracking to the aircraft [1 2] Thistraditional method is mainly based on analog devices andtechnologies which lead to some major disadvantages forexample expensive laser gyroscope and large-size turntableantenna

With the advancement of digital devices and digitalsignal processing technology a new concept of digital arrayradar (DAR) which can perfectly combine digital technologyand antenna technology emerges to adopt DBF to replacethe traditional analog beam forming in both transmittingand receiving mode [3ndash5] The key techniques of DAR

mainly include digital transmitter and receiver (TR)modulemultichannel digital receiving high speed and large capacitydata transmission wide band DBF and high performancesoftware signal processing Multichannel digital receiver isthe core of DAR because of its high hardwaresoftwarecomplexity high integration and high performance index

Taking into account the strict requirements for DARregarding correct identification of amplitude and phasebetween multiple receivers DBF receiver adopts the thoughtof software defined radio (SDR) [6ndash8] The central idea ofSDR is to construct an open standardized and modularplatform which will use software to accomplish modulationand demodulation functions And the bandwidth of thehigh speed broadband analog to digital converter (AD) ishighly close to the receiver or even to the antenna Thebasic structures of SDR can be roughly divided into threetypes radio frequency (RF) low pass sampling RF band passsampling and IF band pass sampling

In order to improve the selectivity suppress out-bandinterferences and reduce the processing rate of the subse-quent signal processor radars usually adopt the IF band passsampling which is an IF digital receiver usually adopting

Hindawi Publishing CorporationJournal of Electrical and Computer EngineeringVolume 2016 Article ID 6123832 8 pageshttpdxdoiorg10115520166123832

2 Journal of Electrical and Computer Engineering

super heterodyne system [9] Since the sampling takes placedirectly in intermediate frequency the subsequent processingcan all be handled in the digital formThis will overcome theshortcomings of the traditional receivers that are based onanalog devices and analog signal processing technique suchas gain variation DC temperature drift and nonorthogonal-ity between 119868 and 119876 Therefore the stability and consistencycan be significantly improved

With the development and application of wideband highresolution radar the bandwidth of digital receivers getsincreasingly wider and the sampling rate is increasinglyhigher The design of wideband IF digital receivers is morecomplicated than that of the narrow band IF digital receivers[10ndash13] which are mainly reflected in the following aspects

(1) With the increase of sampling data rate the follow-up signal processing speed cannot be kept up withIn addition the high data rate also leads to theproblems of high speed data transmission and datasynchronization

(2) Combinational frequency interference within areceiver is greatly increased Therefore an optimizeddesign considering a variety of factors (eg theworking frequency low phase noise low spuriousfrequency source and electromagnetic compatibility)is highly essential

(3) RF front-end analog circuits of a receiver inevitablyhave amplitude and phase discordance especially forthe wideband receivers In addition there is inconsis-tency of the channel frequency responsewhichwouldaffect the side lobe level the output signal to noiseratio (SNR) or zero depth of adaptive beam formingTherefore the channel equalizer [14 15] must beadopted for correction

It can be seen that the multiple channel digital receiversbased on DBF are much more complex than the traditionalones As a matter of fact a DBF receiver may include manychannels even up to thousands of channels However thereexist some stringent requirements for the receiver size andweight of airborne radar space borne radar or other radars

To resolve the abovementioned problems in this paperwe propose a DAR receiver based on Multi-FPGA system[16] which can provide a large number of digital 119868119874 tomeet the need of digital receivers for digital interface Thehigh speed parallel processing capability based on Multi-FPGA hardware mature IP cores and digital processingtechnology can greatly facilitate the design of our digitalreceiver making it feasible for real-time application withthe features of low power consumption high density andphysical size miniaturization

Our contributions of thiswork lie in the following aspects

(1) We propose that themultichannel ADCoutput digitalsignal is directly connected to FPGA and the multi-channel digital down conversion (DDC) is also real-ized in FPGA This method is simpler cheaper andmore flexible compared to using the programmabledigital down converter ASIC chip such as GC4016 or

AD6654 This improvement is especially significantfor digital array receivers with hundreds of channels

(2) Based on the principle and analysis of digital beamforming we propose and implement CORDIC algo-rithm scheme for digital beam forming in FPGA

(3) We realize our digital receiver scheme of circulararray with 16 channels in a Multi-FPGA system ThisMulti-FPGA system comprises 3 pieces of FPGAtwo FPGAs are directly connected with the digitalsignal output from ADC while the third FPGA is toimplement DBF and terminal display driver

2 Analysis for Array Antenna

Array antenna is a synthetic antenna composed of a pluralityof radiating elements which generates a strong directionradiation Antenna array has two forms one is a line array[17] where all the elements of the array are arranged in astraight line the other is a planar array [18] where all the arrayelements are arranged on a plane An array element mightbe a simple weak directional antenna such as dipole halfwave dipole and waveguide slot or might be a more complexantenna such as parabolic antenna and Yaga antenna Thearray antenna forms narrow directivity beam whose perfor-mance is determined by position amplitude and phase of theradiating elements Figure 1 shows the geometric relationshipof array antenna elements

Let us assume an element is located at 1198751(1199091 1199101 1199111)and the phase reference point is 119874(0 0 0) The electric fieldstrength measured at the far field point 119875 is

119864 (120579 120601) = 1198680 119890minus11989511989611987711198771 119891 (120579 120601) (1)

where 1198680 is the complex amplitude 119896 is the wave number thatequals 2120587120582 and 119891(120579 120601) is the radiation pattern

Considering that the radiation source is composed of anumber of array elements the coordinate of any element 119875119894 is(119909119894 119910119894 119911119894) and the vector from point 119874 to 119875119894 is

119903119894 = 119909119909119894 + 119910119910119894 + 119911119911119894 (2)

where 119909 119910 and 119911 are unit vectors of axes 119909 119910 and 119911respectively

The far field component of the total electric field is

119864119894 (120579 120601) = 119868119894 119890minus119895119896119877119894119877119894 119891 (120579119894 120601119894) (3)

where 119868119894 is the complex amplitude and 119891(120579119894 120601119894) is theradiation pattern 119877119894 can be represented as follows

119877119894 = radic(119909 minus 119909119894)2 + (119910 minus 119910119894)2 + (119911 minus 119911119894)2

= 119903radic1 + (1199091198942 + 1199101198942 + 1199111198942)1199032 minus 2 (119909119909119894 + 119910119910119894 + 119911119911119894)1199032 (4)

Journal of Electrical and Computer Engineering 3

z

y

x

P

M

O

120579ri

r1

120601

R1

Ri = r minus rir

P1(x1 y1 z1)

Pi(xi yi zi)

Figure 1 Geometry of array antenna

where 119909 = 119903 sin 120579 cos120601 119910 = 119903 sin 120579 sin120601 119911 = 119903 cos 120579 and1199091198942 + 1199101198942 + 11991111989421199032 = 1003816100381610038161003816119903119894100381610038161003816100381621199032 ≪ 1 (5)

Based on binomial expansion a better estimate for (4) isobtained using

119877119894 = 119903 minus 119903 (119909119894 sin 120579 cos120601 + 119910119894 sin 120579 sin120601 + 119911119894 cos 120579) (6)

Relative to the reference point the phase contribution of119875119894 in the far field is

119890minus119895119896119877119894 = 119890minus119895119896119903119890119895119896(119909119894 sin 120579 cos120601+119910119894 sin 120579 sin120601+119911119894 cos 120579) (7)

The unit vector along the direction 119903 is 1199030 as shown in thefollowing equation

1199030 = 119909 sin 120579 cos120601 + 119910 sin 120579 sin120601 + 119911 cos 120579 (8)

Thus (7) can be rewritten as

119890minus119895119896119877119894 = 119890minus119895119896119903119890119895119896(119903119894 sdot1199030) = 119890minus119895119896119903119890119895120595119894(120579120601) (9)

For an equal amplitude excitation array the radiationpattern of each array element is isotropic Without loss ofgenerality we can assume 119891(120579 120601) = 1 Thus the total electricfield is

119864 (120579 120601) = 119873sum119894=1

119868119894119890119895120595119894(120579120601) (10)

This is called the matrix factor expression If 119891(120579 120601) isequal to another value only the coefficient of the expressionchanges and the amplitude of the composed beam is changedto another value However this will not affect the shape anddirection of the beam

3 CORDIC-Based DBF

31 Model of DBF Although each element pattern of antennaarray is omnidirectional the arrayrsquos direction gain can begathered in the direction of the desired signal by weightingthe sampled data of each channel which is equivalent toforming a high gain beam in the desired direction The

W

AD

AD

AD

yX1

X2

XM

Wlowast1

Wlowast2

WlowastM

sum

Figure 2 Structure of DBF

principle of selecting the weighting coefficients is tomake theoutput signal maximal

As shown in Figure 2 DBF for an array of 119872 elementsis achieved by adjusting the weighting coefficient of eachelement the output of the array is the weighted sum of eachcomponent from the received signal vector 119909(119899) Let theweighting vector be119882 = [1198821 119882119872]119879 the output can bewritten as

119910 (119899) = 119882119867119909 (119899) = 119872sum119898=1

119882lowast119872119883119872 (119899) (11)

where superscript lowast represents complex conjugateUnder narrowband model the signal amplitude of each

element at any instant is the same Equation (11) can berealized only by adjusting weighting coefficient of phaseshifter which is only for signal phase without a need forchanging signal amplitude If there is only one signal fromdirection 120579119896 and guidance vector is 119886(120579119896) then 119910(119899) =119886119867(120579119896)119886(120579119896) = 119872 when weighting vector 119908 is equal to 119886(120579119896)This is the largest which is used to achieve the role of orientedpositioning At this time theweights of the various signals arefor the same phase superposition which is also for the spatialmatching filter

32 DBF Module Based on CORDIC Algorithm [19] Let thesignal received by the 119894th array element be

119883119894 = 119909119868119894 + 119895119909119876119894 (12)

The complex weighting coefficient is

119908119894 = 119908119868119894 + 119895119908119876119894 = exp (119895120572119894) (13)

The output after complex weighted is

1198831015840119894 = 1199091015840119868119894 + 1198951199091015840119876119894 = (119909119868119894 + 119895119909119876119894) lowast exp (minus119895120572119894) (14)


CORDICcos module

CORDICcos module

+CORDIC rotation module

120579120601

xI119894jxQ119894 x998400

I119894

jx998400Q119894

Figure 3 Single complex weighting module

CORDICvector

summation

CORDICvector

modulus

x998400Isum

jx998400Qsum

10038161003816100381610038161003816X998400sum

10038161003816100381610038161003816

x998400I1

jx998400Q1

x998400In

jx998400Qn

Figure 4 DBF module

where

120572119894 = 2120587119903120582 sin 120579 cos (120601 minus 120593119894) = 12sdot 120587 [cos(1205872 minus 120579 + 120601 minus 120593119894)+ cos(1205872 minus 120579 minus 120601 + 120593119894)]

120593119894 = 2 (119894 minus 1) 120587119873 119894 = 1 2 119873

(15)

Through the conversion above it can be seen that thecomplex weighting operation for each channel can be imple-mented by using three CORDIC algorithm modules twocosine operations and one rotating module Figure 3 depictsa single channel complex weighting module schematic

In order to track target we need to do parallel additionoperation for 119868 and 119876 signals get total output 1198831015840Σ = 1199091015840119868Σ +1198951199091015840119876Σ and then use the vector mode of CORDIC algorithm toobtain |1198831015840Σ| as shown in Figure 4

The operations above can be implemented by configuringCORDIC IP core in FPGA

33 IF Digital Receiver in FPGA Based on the realizationscheme for DBF on top of CORDIC algorithm we canconstruct the IF digital array radar receiver by combiningit with AD conversion and digital down conversion (DDC)[20] A simplified block diagram of IF digital array radarreceiver is shown in Figure 5

4 Simulation for 16-Element CircularArray DBF

As shown in Figure 6 in the x-o-y plane119873 isotropic radiationelements are evenly distributed on the circle with radius of 119877119873 = 16

Here

120601119899 = 2120587119873 119899 119899 = 1 2 16 (16)

AD

CORDIC

DDC

Terminal

AD DDC

AD DDC

FPGA

IF1

IF2

IFn

I1

I2

In

Q1

Q2

Qn

Figure 5 Block diagram of IF digital receiver

12

x

y

z

bullbull

bull

bullbullbull

bull

bullN

P

M

RO

120579

120601

N minus 1

1206011

Figure 6 Illustration of circular array

The coordinates of 119899th elements are

119909119899 = 119877 cos120601119899119910119899 = 119877 sin120601119899119911119899 = 0

(17)

So

119896 (119903119899 sdot 1199030) = 120595119899= 119896 (119877 sin 120579 cos120601 cos120601119899 + 119877 sin 120579 sin120601 sin120601119899 + 0)= 119877119896 sin 120579 (cos120601 cos120601119899 + sin120601 sin120601119899)= 119877119896 sin 120579 cos (120601119899 minus 120601)

(18)

According to (10)

119864 (120579 120601) = 119873sum119899=1

119868119899 exp 1198952120587120582 119877 sin 120579 cos (120601119899 minus 120601) (19)


0

01

02

03

04

05

06

07

08

09

1

E

15010050 200 250 300 3500120601 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120601 (∘)

(b)

Figure 7 Pattern of 16-element circular array (a) Normalized Cartesian coordinates (b) Normalized polar diagram (120579 = 45∘ 1205790 = 60∘119877120582 = 1 1 and 1206010 = 30∘(mdash)45∘(- - -))

0

01

02

03

04

05

06

07

08

09

1

E

20 40 60 80 100 120 140 160 1800120579 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120579 (∘)

(b)

Figure 8 Pattern of 16-element circular array (a) Normalized Cartesian coordinates (b) Normalized polar diagram (120601 = 45∘ 1206010 = 30∘119877120582 = 1 1 and 1205790 = 30∘(- - -)45∘(mdash))

where 119868119899 is the complex current of 119899th element For equalamplitude excitation we have 119868119899 = 1 When the array mainbeam points at (1205790 1206010) (19) can be expressed as follows

119864 (120579 120601) = 119873sum119899=1

119868119899 exp 1198952120587120582sdot 119877 [sin 120579 cos (120601119899 minus 120601) minus sin 1205790 cos (120601119899 minus 1206010)]

(20)

According to (20) circular pattern can scan in both 120579and 120601 directions For convenient observation and analysiswe make 120579 and 120601 constant separately We first let 120579 be aconstant 120579 = 45∘ 1205790 = 60∘ and 119877120582 = 1 1 the simulationresults are shown in Figure 7 The solid lines represent the

pattern of1206010 = 30∘ and the dashed lines represent the patternof 1206010 = 45∘

Then we let 120601 be a constant 120601 = 45∘ 1206010 = 30∘ and 119877120582= 1 1 Figure 8 shows the array pattern from our simulation

The following can be observed from (20) and our simula-tion results

(1) The beam of circular array can point at the specifieddirection in two dimensions which can be usedto distinguish the direction of a target that is thecircular array has resolution with two dimensionswhich can also distinguish the elevation and azimuth

(2) Since 120579 is a constant in Figure 7 with the increase of120601the beam width remains unchanged That is to say in


FPGA2(XC3S2000) XC9572 +

XCF32P

FPGA3(XC3S2000)

FPGA1(XC3S2000)

ADC1

ADC10

ADC11

ADC20

24

50

50

8bits

8bits

8bits

8bits

Figure 9 The diagram of Multi-FPGA system

the range of 0∘ le 120601 le 360∘ the resolution capability ofthe circular array is the same Therefore the circulararray beam can be scanned in one direction and theamplitude of the signal is the same

(3) From Figure 8 where 120601 is a constant the larger thevalue of 120579 is the wider the width of the beam getsThis means that the ability for the circular array todistinguish a target will be reduced

5 Experimental Verification

51 Multi-FPGA System Structure The hardware design ofthe IF digital array radar receiver includes circuit boarddesign and multiple FPGAs configuration control programdesign OrCAD and PADS are used in printed circuit board(PCB) design while ISE is used in our control programdesign

Our developed Multi-FPGA system consists of threeSpartan 3 FPGAXC3S2000FGG456 one CPLD XC9572 andone Prom XCF32p XC3S2000 is a high density and low costFPGA with 2M logic gates up to 326MHz clock frequencyembedded by forty 18 times 18multipliers The system structureis shown in Figure 9

The interconnection between three FPGAs is 8-waytopology [16] where the interconnection pin numbers are24 between FPGA1 and FPGA2 50 between FPGA1 andFPGA3 and 50 between FPGA2 and FPGA3 There are 20receiving IF branches among which 16 are used to receive16 channels sampling signal and the remaining 4 channelsare spare FPGA1 receives the first to the eighth channelIF sampling digital signals while FPGA2 receives the ninthto the sixteenth channel IF sampling digital signals Theeight IF signalsrsquo DDC is realized in FPGA1 in parallel andthe digital baseband signal is sent to FPGA3 SimilarlyFPGA2 completes another 8 parallel IF signalsrsquo digital downconversion and the digital baseband signal is also sent toFPGA3The operation of DBF is completed in FPGA3 whichalso operates display driver program and handles DBF resultdisplay on screenThe XC9572 plus XCF32p architecture is tocomplete the three FPGAs configuration XCF32p is a 32Mflash memory which can be divided into four 8M segmentsfor configuring four FPGAs in order to reduce the numberof used flash memory chips The chip configuration controlprogram is stored in CPLD XC9572 All of the FPGA flashmemory and CPLD chips are products from XILINX which

Table 1 The layer assignment of PCB

Symbol Description(1) Top Element layer(2) GNDCLK Analog groundclock(3) S2 Signal layer(4) P1 Power layer(5) SGND Digital ground(6) S3 Signal layer(7) P2 Power layer(8) Bottom Element layer

Table 2 Test description

Description ValueArray form Circular arraySum of array elements 16Array element Monopole antennaRF frequency 1032MHzIF frequency 70MHzSinglecarrierSampling frequency 66MHzBeamforming direction 120601

can simplify our system design thanks to the use of the sameJTAG interface and software

52 Layer Division Scheme of PCB In order to minimize theadverse effects of circuit design on the performance of thesystem and to ensure the requirements of high frequency andhigh speed the electronic components in our PCB designwere manually placed and routed with a thorough consider-ation of electromagnetic compatibility Our developed PCBhas 8 layers whose arrangement is listed in Table 1 The PCBboard is illustrated in Figure 10

53 Field Experiments andResults Weconducted field exper-iments with our developed IF digital receiver The receivingantenna array was a circular array which included 16 arrayelementsThe beacon was amonopole antenna which spreadsignals The antenna array searched the target determinedthe targetrsquos range and formed a strong beam in the directionof the target One terminal screen displayed the beam tothereby complete the target searching and locating

Test conditions and parameters are listed in Table 2 As agood trade-off between experimental effects and prototypingcost the receiver antenna array was determined to be a 16-element circular array with the array element of monopoleantenna

The received radio frequency (RF) for antenna array was1032MHz which is in L band IF signal frequency after RF-analog conversion was 70MHz and the sampling frequencyof IF signal was 66MHz The size of the verification site inour field experiment was about 200 meters times 200 meters

Antenna array analog conversion channel and thereceiving circuit board were placed in the middle of theexperiment site which is shown in Figure 11(a) The beacon


Figure 10 The snapshot of our developed PCB

(a) (b)

(c)

Figure 11 Experiment results (a) Verification platform (b) The beacon (c) The formed beam

was placed at the edge of the site which is shown inFigure 11(b)Due to the high position of the antenna array andthe fixed beacon 120579 is a fixed valueThe radio frequency signalwas transmitted by the beacon and the receiver received thesignal formed the DBF beam and pointed to the directionof the beacon which is shown in Figure 11(c) When movingthe position of the beacon during our experiments which isequivalent to changing 120601 the direction of the DBF beam wasalso moving along with the beacon These field experimentshave confirmed a great success for our developed algorithmicscheme and the implemented prototype

In this work we are only focused on the circular arraydigital receiver scheme If the antenna is arranged as a lineararray the digital receiver DBF waveform shall point to the

target in a specific direction with a certain 120579 or 120601 value Butthe entire design would become much simpler

6 Conclusions

In the field of aerospace measurement and control theground station signal receiving equipment based on analogtechnology is usually expensive large in size and inflexibleIn this paper we proposed a scheme based on Multi-FPGAsystem to realize intermediate frequency digital receiversThe digital beam forming (DBF) was achieved by CORDICalgorithm and an experimental prototype was developedOur field experiments show that the developed prototypeworked perfectly The power consumption of the IF receiver


circuit was only 6 watts the consuming capacity of FPGAswas about 60 IF sampling and digital down conversion for16 channels are developed in parallel and process of programsin FPGA is hard wired circuit so our proposed schemecan provide a great convenience to the design of IF digitalreceivers which provide a valuable reference for real-timeapplication with strong features of low power consumptionhigh density and compact utilization of FPGA logic gates

Competing Interests

The authors declare that they have no competing interests

Acknowledgments

This work was supported in part by Scientific and Techno-logical Research Program of Chongqing Municipal Educa-tion Commission (KJ1500407) Youth Science Foundationof Chongqing University of Posts and Telecommunications(A2014-107) and Memorial University of Newfoundland

References

[1] H Sorg Advances in Inertial Navigation Systems and Compo-nents Advisory Group for Aerospace Research and Develop-ment Neuilly-sur-Seine France 1981

[2] R J Wright and J V Sponnick ldquoA ring laser gyro basednavigator for space launch vehicle guidancerdquo IEEE Aerospaceand Electronic Systems Magazine vol 4 no 3 pp 29ndash38 1989

[3] L Qian and X Wang ldquoA new Wideband Digital Array Radar(WB-DAR) experiment systemrdquo in Proceedings of the IEEERegion 10 Symposium (TENSYMP rsquo14) pp 440ndash445 April 2014

[4] J Del Castillo S Sanchez R De Porras A Pedreira and J RLarranaga ldquoL-band digital array radar demonstrator for nextgenerationmultichannel SAR systemsrdquo IEEE Journal of SelectedTopics in Applied Earth Observations and Remote Sensing vol 8no 11 pp 5007ndash5014 2015

[5] F Wang J Li J Liu X Chen andW Long ldquoSystem realizationof broadband digital beam forming for digital array radarrdquoJournal of Radars vol 2 no 3 pp 314ndash318 2013

[6] MWoh Y Lin S Seo S Mahlke and TMudge ldquoAnalyzing thenext generation software defined radio for future architecturesrdquoJournal of Signal Processing Systems vol 63 no 1 pp 83ndash942011

[7] A L G Reis A F Barros K G Lenzi L G P Meloni and S EBarbin ldquoIntroduction to the software-defined radio approachrdquoIEEE Latin America Transactions vol 10 no 1 pp 1156ndash11612012

[8] J Mar and Y-R Lin ldquoImplementation of SDR digital beam-former for microsatellite SARrdquo IEEE Geoscience and RemoteSensing Letters vol 6 no 1 pp 92ndash96 2009

[9] G Q Wang X Z Wei and H Z Lu ldquoDouble-IF quadraturedemodulation of super-heterodyne radar receiverrdquo in Proceed-ings of the 9th International Conference on Signal Processing(ICSP rsquo08) pp 2505ndash2508 Beijing China October 2008

[10] B M Albaker and N A Rahim ldquoSignal acquisition andparameter estimation of radio frequency pulse radar usingnovel methodrdquo IETE Journal of Research vol 55 no 3 pp 128ndash134 2009

[11] A Kale R Thirumuru and V S R Pasupureddi ldquoWidebandchannelized sub-sampling transceiver for digital RF memorybased electronic attack systemrdquo Aerospace Science and Technol-ogy vol 51 pp 34ndash41 2016

[12] K George and C-I H Chen ldquoA hybrid computing platformdigital wideband receiver design and performance measure-mentrdquo IEEE Transactions on Instrumentation andMeasurementvol 60 no 12 pp 3956ndash3958 2011

[13] HWang YDeng BDong andD Su ldquoAnalysis of the spectrumtransform for narrow-band signal passing through nonlinearsection of a digital radar receiverrdquo Eurasip Journal on WirelessCommunications and Networking vol 2015 article 265 2015

[14] R Martinek and J Zidek ldquoThe real implementation of ANFISchannel equalizer on the system of software-defined radiordquoIETE Journal of Research vol 60 no 2 pp 183ndash193 2014

[15] P P Vaidyanathan ldquoGeneralizations of the sampling theoremseven decades after Nyquistrdquo IEEE Transactions on Circuits andSystems I Fundamental Theory and Applications vol 48 no 9pp 1094ndash1109 2001

[16] S Hauck Multi-FPGA systems [Doctor of Philosophy] Univer-sity of Washington 1995

[17] K Kim W Seong K Lee S Kim and T Shim ldquoRange-dependent geoacoustic inversion of vertical line array data usingmatched beam processingrdquoThe Journal of the Acoustical Societyof America vol 125 no 2 pp 735ndash745 2009

[18] C Chen J Shao S Meng G Fang and H Yin ldquo4-element pla-nar array antenna for UWB applicationrdquo Journal of Electronicsvol 31 no 3 pp 175ndash179 2014

[19] P K Meher and S Y Park ldquoCORDIC designs for fixed angle ofrotationrdquo IEEE Transactions onVery Large Scale Integration vol21 no 2 pp 217ndash228 2013

[20] R S Aditya ldquoSoftware defined radio theoretical analysis anddesign approachrdquo International Journal of Engineering Trendsand Technology vol 4 no 5 pp 1788ndash1791 2013

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super heterodyne system [9] Since the sampling takes placedirectly in intermediate frequency the subsequent processingcan all be handled in the digital formThis will overcome theshortcomings of the traditional receivers that are based onanalog devices and analog signal processing technique suchas gain variation DC temperature drift and nonorthogonal-ity between 119868 and 119876 Therefore the stability and consistencycan be significantly improved

With the development and application of wideband highresolution radar the bandwidth of digital receivers getsincreasingly wider and the sampling rate is increasinglyhigher The design of wideband IF digital receivers is morecomplicated than that of the narrow band IF digital receivers[10ndash13] which are mainly reflected in the following aspects

(1) With the increase of sampling data rate the follow-up signal processing speed cannot be kept up withIn addition the high data rate also leads to theproblems of high speed data transmission and datasynchronization

(2) Combinational frequency interference within areceiver is greatly increased Therefore an optimizeddesign considering a variety of factors (eg theworking frequency low phase noise low spuriousfrequency source and electromagnetic compatibility)is highly essential

(3) RF front-end analog circuits of a receiver inevitablyhave amplitude and phase discordance especially forthe wideband receivers In addition there is inconsis-tency of the channel frequency responsewhichwouldaffect the side lobe level the output signal to noiseratio (SNR) or zero depth of adaptive beam formingTherefore the channel equalizer [14 15] must beadopted for correction

It can be seen that the multiple channel digital receiversbased on DBF are much more complex than the traditionalones As a matter of fact a DBF receiver may include manychannels even up to thousands of channels However thereexist some stringent requirements for the receiver size andweight of airborne radar space borne radar or other radars

To resolve the abovementioned problems in this paperwe propose a DAR receiver based on Multi-FPGA system[16] which can provide a large number of digital 119868119874 tomeet the need of digital receivers for digital interface Thehigh speed parallel processing capability based on Multi-FPGA hardware mature IP cores and digital processingtechnology can greatly facilitate the design of our digitalreceiver making it feasible for real-time application withthe features of low power consumption high density andphysical size miniaturization

Our contributions of thiswork lie in the following aspects

(1) We propose that themultichannel ADCoutput digitalsignal is directly connected to FPGA and the multi-channel digital down conversion (DDC) is also real-ized in FPGA This method is simpler cheaper andmore flexible compared to using the programmabledigital down converter ASIC chip such as GC4016 or

AD6654 This improvement is especially significantfor digital array receivers with hundreds of channels

(2) Based on the principle and analysis of digital beamforming we propose and implement CORDIC algo-rithm scheme for digital beam forming in FPGA

(3) We realize our digital receiver scheme of circulararray with 16 channels in a Multi-FPGA system ThisMulti-FPGA system comprises 3 pieces of FPGAtwo FPGAs are directly connected with the digitalsignal output from ADC while the third FPGA is toimplement DBF and terminal display driver

2 Analysis for Array Antenna

Array antenna is a synthetic antenna composed of a pluralityof radiating elements which generates a strong directionradiation Antenna array has two forms one is a line array[17] where all the elements of the array are arranged in astraight line the other is a planar array [18] where all the arrayelements are arranged on a plane An array element mightbe a simple weak directional antenna such as dipole halfwave dipole and waveguide slot or might be a more complexantenna such as parabolic antenna and Yaga antenna Thearray antenna forms narrow directivity beam whose perfor-mance is determined by position amplitude and phase of theradiating elements Figure 1 shows the geometric relationshipof array antenna elements

Let us assume an element is located at 1198751(1199091 1199101 1199111)and the phase reference point is 119874(0 0 0) The electric fieldstrength measured at the far field point 119875 is

119864 (120579 120601) = 1198680 119890minus11989511989611987711198771 119891 (120579 120601) (1)

where 1198680 is the complex amplitude 119896 is the wave number thatequals 2120587120582 and 119891(120579 120601) is the radiation pattern

Considering that the radiation source is composed of anumber of array elements the coordinate of any element 119875119894 is(119909119894 119910119894 119911119894) and the vector from point 119874 to 119875119894 is

119903119894 = 119909119909119894 + 119910119910119894 + 119911119911119894 (2)

where 119909 119910 and 119911 are unit vectors of axes 119909 119910 and 119911respectively

The far field component of the total electric field is

119864119894 (120579 120601) = 119868119894 119890minus119895119896119877119894119877119894 119891 (120579119894 120601119894) (3)

where 119868119894 is the complex amplitude and 119891(120579119894 120601119894) is theradiation pattern 119877119894 can be represented as follows

119877119894 = radic(119909 minus 119909119894)2 + (119910 minus 119910119894)2 + (119911 minus 119911119894)2

= 119903radic1 + (1199091198942 + 1199101198942 + 1199111198942)1199032 minus 2 (119909119909119894 + 119910119910119894 + 119911119911119894)1199032 (4)


z

y

x

P

M

O

120579ri

r1

120601

R1

Ri = r minus rir

P1(x1 y1 z1)

Pi(xi yi zi)












119864 (120579 120601) = 119873sum119894=1

119868119894119890119895120595119894(120579120601) (10)


3 CORDIC-Based DBF


W

AD

AD

AD

yX1

X2

XM

Wlowast1

Wlowast2

WlowastM

sum




119910 (119899) = 119882119867119909 (119899) = 119872sum119898=1

119882lowast119872119883119872 (119899) (11)




119883119894 = 119909119868119894 + 119895119909119876119894 (12)


119908119894 = 119908119868119894 + 119895119908119876119894 = exp (119895120572119894) (13)


1198831015840119894 = 1199091015840119868119894 + 1198951199091015840119876119894 = (119909119868119894 + 119895119909119876119894) lowast exp (minus119895120572119894) (14)


CORDICcos module

CORDICcos module


120579120601

xI119894jxQ119894 x998400

I119894

jx998400Q119894


CORDICvector

summation

CORDICvector

modulus

x998400Isum

jx998400Qsum

10038161003816100381610038161003816X998400sum

10038161003816100381610038161003816

x998400I1

jx998400Q1

x998400In

jx998400Qn

Figure 4 DBF module

where


120593119894 = 2 (119894 minus 1) 120587119873 119894 = 1 2 119873

(15)







Here

120601119899 = 2120587119873 119899 119899 = 1 2 16 (16)

AD

CORDIC

DDC

Terminal

AD DDC

AD DDC

FPGA

IF1

IF2

IFn

I1

I2

In

Q1

Q2

Qn


12

x

y

z

bullbull

bull

bullbullbull

bull

bullN

P

M

RO

120579

120601

N minus 1

1206011



119909119899 = 119877 cos120601119899119910119899 = 119877 sin120601119899119911119899 = 0

(17)

So


(18)

According to (10)

119864 (120579 120601) = 119873sum119899=1

119868119899 exp 1198952120587120582 119877 sin 120579 cos (120601119899 minus 120601) (19)


0

01

02

03

04

05

06

07

08

09

1

E

15010050 200 250 300 3500120601 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120601 (∘)

(b)


0

01

02

03

04

05

06

07

08

09

1

E

20 40 60 80 100 120 140 160 1800120579 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120579 (∘)

(b)



119864 (120579 120601) = 119873sum119899=1


(20)








FPGA2(XC3S2000) XC9572 +

XCF32P

FPGA3(XC3S2000)

FPGA1(XC3S2000)

ADC1

ADC10

ADC11

ADC20

24

50

50

8bits

8bits

8bits

8bits




















(a) (b)

(c)





6 Conclusions




Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










z

y

x

P

M

O

120579ri

r1

120601

R1

Ri = r minus rir

P1(x1 y1 z1)

Pi(xi yi zi)












119864 (120579 120601) = 119873sum119894=1

119868119894119890119895120595119894(120579120601) (10)


3 CORDIC-Based DBF


W

AD

AD

AD

yX1

X2

XM

Wlowast1

Wlowast2

WlowastM

sum




119910 (119899) = 119882119867119909 (119899) = 119872sum119898=1

119882lowast119872119883119872 (119899) (11)




119883119894 = 119909119868119894 + 119895119909119876119894 (12)


119908119894 = 119908119868119894 + 119895119908119876119894 = exp (119895120572119894) (13)


1198831015840119894 = 1199091015840119868119894 + 1198951199091015840119876119894 = (119909119868119894 + 119895119909119876119894) lowast exp (minus119895120572119894) (14)


CORDICcos module

CORDICcos module


120579120601

xI119894jxQ119894 x998400

I119894

jx998400Q119894


CORDICvector

summation

CORDICvector

modulus

x998400Isum

jx998400Qsum

10038161003816100381610038161003816X998400sum

10038161003816100381610038161003816

x998400I1

jx998400Q1

x998400In

jx998400Qn

Figure 4 DBF module

where


120593119894 = 2 (119894 minus 1) 120587119873 119894 = 1 2 119873

(15)







Here

120601119899 = 2120587119873 119899 119899 = 1 2 16 (16)

AD

CORDIC

DDC

Terminal

AD DDC

AD DDC

FPGA

IF1

IF2

IFn

I1

I2

In

Q1

Q2

Qn


12

x

y

z

bullbull

bull

bullbullbull

bull

bullN

P

M

RO

120579

120601

N minus 1

1206011



119909119899 = 119877 cos120601119899119910119899 = 119877 sin120601119899119911119899 = 0

(17)

So


(18)

According to (10)

119864 (120579 120601) = 119873sum119899=1

119868119899 exp 1198952120587120582 119877 sin 120579 cos (120601119899 minus 120601) (19)


0

01

02

03

04

05

06

07

08

09

1

E

15010050 200 250 300 3500120601 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120601 (∘)

(b)


0

01

02

03

04

05

06

07

08

09

1

E

20 40 60 80 100 120 140 160 1800120579 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120579 (∘)

(b)



119864 (120579 120601) = 119873sum119899=1


(20)








FPGA2(XC3S2000) XC9572 +

XCF32P

FPGA3(XC3S2000)

FPGA1(XC3S2000)

ADC1

ADC10

ADC11

ADC20

24

50

50

8bits

8bits

8bits

8bits




















(a) (b)

(c)





6 Conclusions




Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










CORDICcos module

CORDICcos module


120579120601

xI119894jxQ119894 x998400

I119894

jx998400Q119894


CORDICvector

summation

CORDICvector

modulus

x998400Isum

jx998400Qsum

10038161003816100381610038161003816X998400sum

10038161003816100381610038161003816

x998400I1

jx998400Q1

x998400In

jx998400Qn

Figure 4 DBF module

where


120593119894 = 2 (119894 minus 1) 120587119873 119894 = 1 2 119873

(15)







Here

120601119899 = 2120587119873 119899 119899 = 1 2 16 (16)

AD

CORDIC

DDC

Terminal

AD DDC

AD DDC

FPGA

IF1

IF2

IFn

I1

I2

In

Q1

Q2

Qn


12

x

y

z

bullbull

bull

bullbullbull

bull

bullN

P

M

RO

120579

120601

N minus 1

1206011



119909119899 = 119877 cos120601119899119910119899 = 119877 sin120601119899119911119899 = 0

(17)

So


(18)

According to (10)

119864 (120579 120601) = 119873sum119899=1

119868119899 exp 1198952120587120582 119877 sin 120579 cos (120601119899 minus 120601) (19)


0

01

02

03

04

05

06

07

08

09

1

E

15010050 200 250 300 3500120601 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120601 (∘)

(b)


0

01

02

03

04

05

06

07

08

09

1

E

20 40 60 80 100 120 140 160 1800120579 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120579 (∘)

(b)



119864 (120579 120601) = 119873sum119899=1


(20)








FPGA2(XC3S2000) XC9572 +

XCF32P

FPGA3(XC3S2000)

FPGA1(XC3S2000)

ADC1

ADC10

ADC11

ADC20

24

50

50

8bits

8bits

8bits

8bits




















(a) (b)

(c)





6 Conclusions




Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










0

01

02

03

04

05

06

07

08

09

1

E

15010050 200 250 300 3500120601 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120601 (∘)

(b)


0

01

02

03

04

05

06

07

08

09

1

E

20 40 60 80 100 120 140 160 1800120579 (∘)

(a)

02

04

06

08

1

30

210

60

240

90

270

120

300

150

330

180 0

120579 (∘)

(b)



119864 (120579 120601) = 119873sum119899=1


(20)








FPGA2(XC3S2000) XC9572 +

XCF32P

FPGA3(XC3S2000)

FPGA1(XC3S2000)

ADC1

ADC10

ADC11

ADC20

24

50

50

8bits

8bits

8bits

8bits




















(a) (b)

(c)





6 Conclusions




Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation










FPGA2(XC3S2000) XC9572 +

XCF32P

FPGA3(XC3S2000)

FPGA1(XC3S2000)

ADC1

ADC10

ADC11

ADC20

24

50

50

8bits

8bits

8bits

8bits




















(a) (b)

(c)





6 Conclusions




Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation











(a) (b)

(c)





6 Conclusions




Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation











Competing Interests


Acknowledgments


References























RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation











RoboticsJournal of





Journal of



RotatingMachinery





VLSI Design



Shock and Vibration







Journal of



Volume 2014


SensorsJournal of





Propagation









Research Article Intermediate Frequency Digital Receiver Based...

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