PREPARED BY: SANTOSH.B.MANKANI -...

PREPARED BY: SANTOSH.B.MANKANI M.Tech(TPE)

SELECTION GRADE LECTURER (MECHANICAL)

GPT RAICHUR

Govt Polytechnic, Raichur Mechatronics Lab Manual of 30

Introduction to Mechatronics

Mechatronics is defined as the interdisciplinary field of engineering and design methodoly. It deals

with the design of products whose function relies on the integration of mechanical, electrical and

electronics components connected by a control scheme. Mechatronics plays an important role in the

design manufacturing and maintenance of a wide range of engineering products and process.

Mechatronics provides solutions that are efficient and reliable systems.


MECHATRONICS LAB

PART-A

Design and simulate the following digital circuits using MultiSim/any digital

circuit

1. Basic Logic Gates

2. De Morgan’s Theorem

3. Combination Logic 4. Encoders and Decoders

5. Digital Oscillator

6. Flip-Flops

PART-B

1. Draw the ladder rungs to represent

i. Two switches Normally Open and both have to be closed for the motor to

operate.

ii. Either of the two Normally Open switches to be closed for the coil to be

energized

2. Devise a timing circuit that will switch on for 20s and then switch it off.

3. Device a timing circuit that will switch on 10s and off 20s and so on....

4. Device a circuit that can be used to start a motor and then to start a pump after

delay of 50s. Then the motor is switched off 10s before the pump is switched off when

the pump remains on for 50s.

5. Devise a circuit that can be used with the domestic washing machine to switch on a

pump to pump water for 100s into the machine. Then switch on a heater for 50s to

heat the water. The heater is switched off and another pump is switched on to empty

the water for 100s.

PART-C

Design and simulate the following systems using Automation Studio/Any

equivalent Simulator Software.

1. Design and simulate of fluid power circuits to control (i) Velocity

(ii) Direction of a single and double acting actuators

2. Design and Simulate a ladder diagram for car parking.

(Hint: car is to be detected and enter the parking space to a particular location

if space is available. If there is no space, a lamp should indicate that parking

is full. )


A B A+B=Q

0 0 0

0 1 1

1 0 1

1 1 1

Exercise No: 1

Aim:

OR GATE

Conduct an experiment to Design and simulate logic circuit of OR gate.

Components:

1. OR gate - 1 No.

2. Logic switch - 2 Nos 3. 3. Logic Display - 1 No.

4. Out Put Display -1No

Software Used:

Electronics work bench software, logic gates simulator

Procedure:

1. Open Circuit Maker and start a new file by clicking File New.

2. Select the required components by clicking Devices Browse and place them on the screen.

3. Connect the components to each other by using Wire Tool.

4. Run the Simulation by clicking on Run button.

5. Set the input values as in the truth table and note down the outputs.

6. Stop the Simulation by clicking on Stop button.

Result:

i All basic logics gates are designed and simulated using digital circuit simulator.

ii The outputs will be recorded in the truth table

Logic Symbol Boolean Equation

A+B=Q

Logic Circuit Truth Table


A B A.B=Q

0 0 0

0 1 0

1 0 0

1 1 1

Exercise No: 2

Aim:

AND GATE

Conduct an experiment to Design and simulate logic circuit of AND gate.

Components:

1. AND gate - 1 No.

2. Logic switch - 2 Nos

3. Logic Display - 1 No.

4. Out Put Display -1 No.

Software Used:


Theory:

The AND gate performs logical multiplication, more commonly known as the “AND” function. An

AND gate has two inputs and one output. An AND gate gives an output “1” when both of its inputs

are “1”. For all other combinations of inputs it gives an output “0”.

Procedure:







Result:

Logic circuit of AND gate is designed and simulated. Simulation of the circuit satisfies the truth table.


A.B=Q



A A=Q

0 1

1 0

Exercise No: 3

Aim:

NOT GATE

Conduct an experiment to Design and simulate logic circuit of NOT gate.

Components:

1. NOT gate - 1 No.

2. Logic switch - 1 No.


Software Used:


Theory:

A NOT gate produces an output that is a complement of the input. It has only one input signal and one

output signal. It gives an output “1” when its input is “0‟ and vice versa. Thus, a NOT gate is also

known as “INVERTER”.

Procedure:







Result:

Logic circuit of NOT gate is designed and simulated.


A=Q



A B A+B=Q

0 0 1

0 1 0

1 0 0

1 1 0

Exercise No: 5

Exercise No: 4

NOR GATE

Aim:

Conduct an experiment to Design and simulate logic circuit of NOR gate.

Components:

1. NOR gate - 1 No.



4. Out Put Display - 1 No.

Software Used:


Theory:

The term NOR is a contraction of NOT-OR and implies an OR function with an inverted output. A

NOR gate gives an output “1” when both of its inputs are “0”. For all other combinations of input it

gives an output “0”.

Procedure:







Result:

Logic circuit of NOR gate is designed and simulated.


A+B=Q



A B A.B=Q

0 0 1

0 1 1

1 0 1

1 1 0

Exercise No: 5

Aim:

NAND GATE

Conduct an experiment to Design and simulate logic circuit of NAND gate.

Components:

1. NAND gate - 1 No.




Software Used:


Theory:

The term NAND is a contraction of NOT-AND and implies an AND function with an inverted output.

A NAND gate gives an output “0‟ when both of its inputs are “1”. For all other combinations of input,

it gives an output “1”.

Procedure:







Result:

Logic circuit of NAND gate is designed and simulated. Simulation of the circuit satisfies the truth

table.


A.B=Q



INPUTS OUTPUT

A B A⊕B=Q

0 0 0

0 1 1

1 0 1

1 1 0

Exercise No: 6

Aim:

XOR GATE

Conduct an experiment to Design and simulate logic circuit of XOR gate.

Components:

1. XOR gate - 1 No.




Software Used:


Theory:

The XOR is an abbreviation for Exclusive-OR gate. A XOR gate gives an output “1” when its two

inputs are not equal. It gives an output “0” when its both inputs are same.

Procedure:







Result:

Logic circuit of XOR gate is designed and simulated. Simulation of the circuit satisfies the truth table.


A⊕B =Q


INPUTS OUTPUT

A B Q

0 0 0

0 1 0

1 0 0

1 1 1

Exercise No: 7

Aim:

COMBINATION OF GATES

BUILDING AND GATE USING THREE NOR GATES

Conduct an experiment to To build AND gate using three NOR gates and simulate the circuit.

Components:

1. NOR gate - 3 Nos


3. Logic Display - 1No

Software Used:


Theory:

The logic gates NOR and NAND are considered as universal gates. It appears that to make logic

circuits we require a range of gates. However we can make up all the gates from just one type of gate.

In this exercise we use three NOR gates to obtain the output same as that of an AND gate.

Procedure:







Result:

AND gate is built using three NOR gates and the circuit is simulated. Simulation of the circuit satisfies

the truth table.


Govt Polytechnic Raichur Mechatronics Lab Manual Page 10 of 30


INPUTS OUTPUT

A B Q

0 0 0

0 1 1

1 0 1

1 1 1

Exercise No: 8

Aim:

BUILDING OR GATE USING THREE NAND GATES

Conduct an experiment to To build OR gate using three NAND gates and simulate the circuit.

Components:

1. NAND gate - 3 Nos



4. Out put Display -1No.

Software Used:


Theory:

It appears that to make logic circuits we require a range of gates. However we can make up all the

gates from just one type of gate. In this exercise we use three NAND gates to obtain the output same

as that of an OR gate.

Procedure:







Result:

OR gate is built using three NAND gates and the circuit is simulated. Simulation of the circuit satisfies

the truth table.



INPUT OUTPUT

A Q

0 1

1 0

Exercise No: 9

Aim:

BUILDING NOT GATE USING NOR / NAND GATE

Conduct an experiment to To build NOT gate using two NOR/NAND gate and simulate the circuit.

Components:

1. NOR/NAND gate - 1 No.

2. Logic switch - 1 No.



Software Used:


Theory:

It appears that to make logic circuits we require a range of gates. However we can make up all the

gates from just one type of gate. In this exercise we use two NOR/NAND gate to obtain the output

same as that of a NOT gate.

Procedure:







Result:

NOT gate is built using NOR/NAND gate and the circuit is simulated. Simulation of the circuit satisfies

the truth table.



Exercise No: 10

Aim:

DE MORGAN’S FIRST THEOREM

Conduct an experiment to Design and simulate a logic circuit to verify De Morgan’s first theorem.

Software Used:


Theory:

De Morgan’s first theorem states that “The compliment of sum is equal to the product of individual

compliments”. That is A+B = A.B

Procedure:







Result:

Logic circuit for De Morgan’s first theorem is designed and simulated. Simulation of the circuit

satisfies the truth table. Hence De Morgan’s first theorem is verified.


A A+B

B

A.B

INPUTS OUTPUTS

A B A+B A.B

0 0 1 1

0 1 0 0

1 0 0 0

1 1 0 0

Components:

1. NOR gate - 1 No.

2. AND gate - 1 No.

3. NOT gate - 2 Nos


5. Logic Display

- 2 Nos


Exercise No: 11

Aim:

DE MORGAN’S SECOND THEOREM

Conduct an experiment to Design and simulate a logic circuit to verify De Morgan’s second theorem.

Software Used:


Theory:

De Morgan’s second theorem states that “The compliment of product is equal to the sum of individual

compliments”. That is A.B = A + B

Procedure:







Result:

Logic circuit for De Morgan’s second theorem is designed and simulated. Simulation of the circuit

satisfies the truth table. Hence De Morgan’s second theorem is verified.


A A.B

B

A+B

INPUTS OUTPUTS

A B ̅�̅̅. ̅

�̅

�̅ +

�̅

0 0 1 1

0 1 1 1

1 0 1 1

1 1 0 0

Components:

1. NAND gate - 1 No.

2. OR gate - 1 No.

3. NOT gate - 2 Nos


5. Logic Display

- 2 Nos


Exercise No: 12

FLIP FLOPS

S-R FLIP FLOP

Aim: Conduct an experiment to Design and simulate a logic circuit of S-R flip flop.

Components:

1. SR Flip flop - 1 No.


3. Logic Display - 2 Nos

Software Used:

Electronics work bench software, flip flop

Theory:

The flipflop is a basic memory element which is made up of an assembly of logic gates and is a

sequential logic device. The SR flip flop has a “SET” input (S) and a “RESET” input (R). The “S”

input causes the output Q=1 and Q=0. The “R” input causes the out put Q=0 and Q=1. Once the

outputs are established, the wiring of the circuit is maintained until S or R go high.

Procedure:

1. Open CircuitMaker and start a new file by clicking File New.






Result:

Logic circuit of S-R flip flop is designed and simulated. Simulation of the circuit satisfies the truth

table.

Logic Symbol

Logic Circuit

Truth Table

INPUTS OUTPUT

S R Q �̅

0 0 Previous state (Q)

0 1 0 1

1 0 1 0

1 1 Not allowed

Truth Table


INPUTS OUTPUT

J K Q �̅

0 0 Previous state (Q)

0 1 0 1

1 0 1 0

1 1 Toggle Q �̅

Logic Circuit

Exercise No: 13

J-K FLIP FLOP

Aim: Conduct an experiment to Design and simulate a logic circuit of J-K flip flop.

Components:

1. JK SR Flip flop - 1 No.


3. Logic Display - 2 Nos

Software Used:

Electronics work bench software, flip flop

Theory:

For many applications, the indeterminate state that occurs with SR flip flop when S=1 and R=1 is not

acceptable and in such condition JK flipflop is used. In this flipflop also “J” input causes the output

Q=1 and Q=0. The “K” input causes the out put Q=0 and Q=1. But when both J=1 and K=1 the

outputs are toggled.

Procedure:







Result:

Logic circuit of J-K flip flop is designed and simulated. Simulation of the circuit satisfies the truth

table.

Logic Symbol

Truth Table


PROGRAMMABLE LOGIC CONTROLLERS

1. Definition

A programmable logic controller, PLC, or programmable controller

is a digital computer used for automation of typically industrial

electromechanical processes, such as control of machinery on factory

assembly lines, amusement rides, or light fixtures. PLCs are used in

many machines, in many industries.

2. Advantage and Disadvantages of PLC

Flexibility: One single Programmable Logic Controller can easily run

many machines.

Correcting Errors: In old days, with wired relay-type panels, any program

alterations required time for rewiring of panels and devices. With PLC

control any change in circuit design or sequence is as simple as retyping

the logic. Correcting errors in PLC is extremely short and cost effective.

Space Efficient: Today's Programmable Logic Control memory is getting

bigger and bigger this means that we can generate more and more contacts,

coils, timers, sequencers, counters and so on. We can have thousands of contact

timers and counters in a single PLC. Imagine what it would be like to have

so many things in one panel.

Low Cost: Prices of Programmable Logic Controllers vary from few

hundreds to few thousands. This is nothing compared to the prices of the

contact and coils and timers that you would pay to match the same things.

Add to that the installation cost, the shipping cost and so on.

Testing: A Programmable Logic Control program can be tested and

evaluated in a lab. The program can be tested, validated and corrected saving

very valuable time.

Visual observation: When running a PLC program a visual operation can

be seen on the screen. Hence troubleshooting a circuit is really quick, easy and

simple.


3. PLC Applications

1. The batch processes in chemical, cement, food and paper industries which are

sequential in nature, requiring time of event based decisions is controlled by PLCs.

2. In large process plants PLCs are being increasingly used for automatic start up and

shut down of critical equipment. A PLC ensures that equipment cannot be started

unless all the permissive conditions for safe start have seen established. It also

monitors the conditions necessary for safe running of the equipment and trips the

equipment whenever any abnormality in the system is detected.

3. The PLC can be programmed to function as an energy management system for

boiler control for maximum efficiency and safety.

4. For blast furnace charging controls in steel plants

5. For chemical plants process control automation.

6. In automation of a rock phosphate drying and grinding system.

7. Modernization of boiler and turbo generator set.

8. Process visualization for mining application.

9. Criteria display system for power station.

10. As stored programmed automation unit for the operation of diesel generator sets.

11. In Dairy automation and food processing.

12. For a highly modernized pulp paper factory.

13. In automation system for the printing industry.

14. In automation of container transfer crane.

15. In automation of High-speed elevators.

16. In automation of machine tools and transfer lines.

17. In Mixing operations and automation of packaging plants.

18. In fuel oil processing plants and water classification plants.

19. To control the conveyor/classifying system.

4. PLC in Conveyor control System

The simple suitable application is a conveyor system. The

requirements of the conveyor systems are as follows:

1. A programmable logic controller is used to start and stop the motors of the

conveyor belt.


2. The conveyor system has three segmented conveyor belts. Each

segment is run by a motor.

3. To detect the position of a plate, a proximity switch is positioned at the

segment’s end.

4. The first conveyor segment is turned ON always.

5. The proximity switch in the first segment detects the plate to turn ON the

second conveyor segment.

6. The third conveyor segment is turned ON when the proximity switch detects

the plate at the second conveyor.

7. As the plate comes out of the detection range, the second conveyor is stopped

after 20 secs.

8. When the proximity switch fails to detect the plate, the third conveyor is

stopped after 20 secs.

5. PLC SYSTEM:

Figure shows in block form the four major units of a PLC system and how they

are interconnected. The four major parts of PLC are

1. CENTRAL PROCESSING UNIT(CPU):

The “Brain” of the system of the system, which has three subparts

a. Microprocessor: the computer center that carries out mathematics and logic

operations


b. Memory: the area of the CPU in which data and information is stored and

retrieved. Holds the system software and user program

c. Power Supply: the electrical supply that converts alternating current (AC)

line voltage to various operational DC values. In the process, the power

supply filters and regulates the voltages to ensure proper computer

operation.

2. PROGRAMMER/ MONITOR: The programmer/monitor is a device used to

communicate with the circuit of the PLC. Hand held terminals, industrial

terminals, and the personal computers exist as PM devices. In a hand held unit

input takes place through a membrane keypad and the display is usually a

Liquid crystal display (LCD). With the industrial terminal are the personal

computer, more complex typewriter type keyboards, and cathode ray tubes

(CRT) are employed.

3. I/O MODULES: The input modules has terminals in to which outside process

electrical signal, generated by sensors or transducers are entered the output

modules has terminal to which the output signals are sent to activate relay,

solenoid, various solid state switching devices, motors, and displays. An

electronic system for connecting I/O modules to remote locations can be added

if needed. The actual operating process under PLC controlled can be thousand

of feet from the CPU and its I/O modules.

4. RACKS AND CHASSIS: the racks on which the PLC parts are mounted and

the enclosure on which the CPU, PM and I/O modules are mounted.

5. PROGRAMMING DEVICES:

PLC programming equipment

exists to allow you to write, edit,

and monitor a program. As well as

perform various diagnostic

procedures. In most cases the

programming device, the Computer,

must be connected to the CPU


while programs are written. Other PMs, however, allow you to program offline

and then download the program to the PLC CPU.

Three types of programmer also referred as Program loaders are in

common use. At the low end are the hand held, palm-size units with dual-

function keyboards and a liquid crystal display (LCD) Or LED window. At

a user-friendlier level are the full-size keyboards, accompanied by a large

liquid crystal display (LCD) or Cathode Ray Tube (CRT) screen. A Third

programming option exists with software that allows programs to be

developed on IBM- compatible Personal Computers (PCs).

6. PROGRAMMING OF PLC

PROGRAMMING FORMATS:

PLC programming formats differ depending upon the manufacturers.

But experience has shown that when a person learns to program one type of

PLC, he, or she can easily master other PLC systems, even though the

formats differ somewhat.

Some of the factors that vary between formats are nomenclature,

numbering schemes, and screen appearance.

Most Commonly used PLC programming method is Ladder Diagram.

In addition to this several other high-level languages are used to program

PLC. Following are some of this kind, which have received global

recognition.

1. Instruction List

2. Structured Text

3. Function Block Diagram

4. Sequential Function

1. Instruction List (IL): IL is a programming system that consists of a series of

sequential statements, which define a program.

2. Structured Text (ST): ST is a programming system that uses a series of steps and

descriptions to define a program. Structured text uses lots of IF, Else, and

TRUE or FALSE descriptions in its program.

3. Function Block Diagram (FBD): FBD is a programming that uses large function

blocks for portions of programs.


4. Sequential Function Chart (SFC): SFC is a PLC programming system that uses

vertical and parallel connected blocks and “gates” for the program.

7. RELAY LADDER LOGIC:

The logic you enter into the micro controller makes up a ladder

program. A ladder program consists of a set of instructions used to control a

machine or a process. Ladder logic is a graphical programming language based

on electrical relay diagrams. Instead of having electrical rung continuity,

ladder logic is looking for logical rung continuity. A ladder diagram identifies

each of the elements in an electromechanical circuit and represents them

graphically. This allows you to see how your control circuit operates before

you actually start the physical operation of your system.

PLC programming based on the use of ladder diagrams involves

writing a program in a similar manner to drawing a switching circuit. The

ladder diagram consists of two vertical lines representing the power rails.

Circuits are connected as horizontal lines, i.e. the rungs of the ladder,

between these two vertical lines.

Below table show some of the basic elements used while writing a

ladder diagram,

Element Symbol Used Description

Open

Contact

When the associated Input signal state is “1”, the

contact is “closed”.

if input signal state is “0” the contact is “open”

Closed

Contact

When the associated Input signal state is “0”, the

contact is “closed”.

if input signal state is “1” the contact is “open”

Output

The signal state of this element is “1”, if the

associated input signal is “1”,

otherwise it is “0”

8. PROPER CONSTRUCTION OF PLC LADDER DIAGRAMS:

1. A contact must always be inserted at the beginning of a rung

2. A coil must be inserted at the end of a rung


3. All contacts must run horizontally, no vertically oriented contacts are allowed

4. The number of contact per matrix(in one rung) is limited – i.e., 11 across by 7

down

5. only one output may be connected to a group of contacts

6. Contacts must be “nested” (a branch circuit programmed within a branch

circuit) properly or, in some PLCs, not at all.

7. Flow must be from left to right

8. Contacts progression should be straight across

9. ILLUSTRATION:

In the following illustration, the electromechanical circuit shows

PB1 and PB2, two pushbuttons, wired in series with an alarm horn. PB1 is

a normally open pushbutton, and PB2 is normally closed. This same

circuit is shown in ladder logic by two contacts wired in series with an output.

Contact I/0 and I/1 are examine-if-closed instructions.

The table below shows how these circuits operate. The table shows

all possible conditions for the electromechanical circuit, the equivalent state

of the ladder logic instructions, and the resulting Output State.

If PB1 is: I/0 state is If PB2 is: I/1 state is Then the Alarm horn is:

Not pushed 0

Not pushed 1 Silent

Not pushed 0 Pushed 0 Silent

Pushed 1 Not

pushed 1 Alarm

Pushed 1 Pushed 0 Silent

Vbbcbbvccjn

Djbnjdsjb;


LATCHING:

There are often situations where it is necessary to hold a coil energized,

even when the input, which energized it, goes off. The term latch circuit is

used for the circuit used to carry out such an operation. It is self- maintaining

circuit in that, after being energized, it maintains that state

until another input is received. It remembers its last state.

TIMERS:

A timer circuit is specified by stating the interval to be timed and the

conditions or events that are to start and/or stop the timer. They are commonly

regarded as relays with coils which, when energized, result in the closing, or

opening of input contacts after some preset time. Fig shows part of a

program involving a delay-on timer. When there is input, the timer is

energized and starts timing. After some preset time the contacts associated

with the timer close and the output occurs.

10. TYPES OF TIMERS:

1. Timer-On Delay

2. Timer-Off Delay

3. Retentive Timer-On Delay

1. Timer-On Delay

TON Timer On Delay

Timer

Time Base

Preset

Accum

T4:1

1.0

10

00

DN


Exercise No: 14

Aim:

LADDER DIAGRAM TO REPRESENT LOGIC ‘AND’

Conduct an experiment to To draw the ladder rungs to represent two switches normally open and

both have to be closed for the motor to operate.

Description:

This circuit makes use of two input switches which are normally open. The input switches are

connected in series so that the output occurs only when both the switches are closed, which thus gives

AND logic.

Software Used:

PLC Ladder simulator

Procedure:

1. Construct the circuit diagram as per the requirement using ladder programming elements.

2. Compile the program and simulate the working of the circuit on the monitor.

3. Connect the PLC and switch on the power.

4. Transfer the ladder program to PLC.

5. Run the simulation in PLC.

Result:

The ladder logic program to operate a motor only when both the switches are closed is designed and

tested.

Mnemonic List:

Sl. No. Instruction Operand

1 LD 0000

2 LD 0001

3 OUT 501

4 END -

5 ENDH -

Ladder Diagram:


Exercise No: 15

Aim:

LADDER DIAGRAM TO REPRESENT LOGIC ‘OR’

Conduct an experiment to To draw the ladder rungs to represent either of the two normally open

switches to be closed for the coil to be energised.

Description:

This circuit makes use of two input switches which are normally open. The input switches are

connected in parallel so that the coil is energized when any one of the switches is closed, which thus

gives OR logic.

Procedure:






Result:

The ladder logic program to energize a coil when either of the two switches is closed is designed and

tested.

Mnemonic List:


1 LD 0000

2 LD 0001

3 OUT 501

4 END -

5 ENDH -

Ladder Diagram:



1 LD 0000

2 TMR 001#00020

3 LDB T001

4 OUT 501

5 END -

6 ENDH -

Exercise No: 16

TIMER CIRCUIT

Aim: Conduct an experiment to To devise a timing circuit that will switch on for 20s and then switch it off.

Description:

Sometimes it is necessary to switch on a output for a fixed duration of time and then switch it off. This

function is achieved by using a timing circuit. The timing circuit makes use of a timer and a timer

switch associated with it. A normally closed switch is connected in series with it, in order to switch

off the output after a specified time.

Software Used:


Procedure:






Result:

The ladder logic program to switch on a motor for 20s and then switch it off is designed and tested.

Mnemonic List: Ladder Diagram:



1 LD 0000

2 LDB T002

3 TMR 001#00020

4 LD T001

5 TMR 002#00010

6 OUT 501

7 END -

8 ENDH -

Exercise No: 17 ON AND OFF CIRCUIT

Aim: Conduct an experiment to To devise a timing circuit that will switch on 10s and off 20s and so on.

Description:

This circuit makes use of two timers with one normally open switch and one normally closed switch.

The output gets on and off for the set time.

Software Used:


Procedure:






Result:

The ladder logic program to switch on a motor for 10s and off 20s and so on is designed and tested.

Mnemonic List: Ladder Diagram:


Sl.

No. Instruction Operand

1 LD 0000

2 OUT 501

3 LD 501

4 TMR 001#00050

5 LD T001

6 OUT 502

7 LD 502

8 TMR 002#00040

9 LD T002

10 RES 501

11 TMR 003#00010

12 LD T003

13 RES 502

14 END -

15 ENDH -

Exercise No: 18

Aim:

MOTOR-PUMP SEQUENCING CIRCUIT

Conduct an experiment to To devise circuit that can be used to start a motor and then to start a pump

after delay of 50s. Then the motor is switched off 10s before the pump is switched off when the pump

remains on for 50s.

Software Used:


Description:

This circuit is an example of sequencing. It works in the following sequence.

1. Switch on the motor

2. After a delay of 50s, switch on a pump.

3. The motor is switched off 40s after the pump is switched on.

4. Then after 10s pump is also switched off.

Procedure:






Result:

The ladder logic program to operate motor and pump in a particular sequence is designed and test

PREPARED BY: SANTOSH.B.MANKANI -...

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