Practical Digital Design Considerations

Part 1

Last Mod: January 2008©Paul R. Godin

Introduction

◊ When prototyping a circuit in the lab, the circuit design may work as intended, but in the “real” world, the circuit may be exposed to various factors that can affect its operation, or that may damage the circuit.

◊ This section discusses various considerations that should be taken into account when designing digital circuits for real-world applications.

Design 1.2

Interface Devices

◊ Communications between devices is a fundamental function of digital components.

◊ Special care must be taken when interfacing these devices.

Can you name a few considerations that need to be taken into account when interfacing digital devices?

Design 1.3

Buses

◊ A communications bus (or buss) is a common connection point, usually in the form of a conductor, that is a means of transferring and sharing data, information or control signals between digital components.

Buses are frequently comprised of multiple parallel conductors. Most buses have multiple connection points for components.

Design 1.4

Signal Requirements

◊ Digital signals on a bus must adequately represent the intended digital state to all the components attached, at the proper time.

Design 1.5

Bus Problems

◊ Bus communications may encounter problems where the digital states are not adequately provided to all the components attached.

◊ Examples of problems encountered in bus communications include:◊ Bus Contention◊ Improper application of IC electrical design, including

noise margin and fanout difficulties◊ EMF, capacitance and voltage drops◊ Propagation delay and race conditions

Design 1.6

Bus Contention

◊ Bus Contention happens when 2 devices are attempting to apply signals on a common bus at the same time.

Design 1.7

Bus Contention

◊ In the previous example, the binary value at point A is unknown.

◊ This type of error creates unpredictable results, and is likely to damage the IC’s.

What are some options for connecting devices to a common bus while avoiding bus contention problems?

Design 1.8

Bus Contention Solution:Tri-State Outputs

◊ Tri-states can be electrically disconnected from the bus.

◊ The G input (often called OE) is a separate digital signal that controls whether the device is applying an output logic to the bus, or if it’s electrically disconnected.

◊ Only 1 gate will be permitted to provide a logic level to the bus through control of the GA and GB.

Design 1.9

Example of Tri-State use

Design 1.10

OE1 OE2

Tri

-sta

te d

evic

eTri

-sta

te d

evic

e

Only one of these Output Enables will be enabled at a time

Bus Contention Solution:Open Collector Outputs

◊ Open Collector output provides an open circuit when the transistor is “off” (the logic output of the device is the “high” state)

◊ Open collector outputs are used with external pull-up resistors for digital logic applications.

◊ The pull-up resistor is usually 10k.

Design 1.11

Open Collector Outputs

◊ Calculating the value of the output resistor is based on the IOL specifications of the output gates, and the IIH specifications of the input gates.

◊ It is more difficult to design open collector bus systems than tri-state systems.

◊ Tri-state devices also have the advantage of Totem Pole outputs for faster response.

Current path from the pull-up resistor, IOL specification.

Design 1.12

IC Electrical Design:Noise Margin and Fanout

◊ As discussed previously, noise margin and fanout calculations must be carried out to ensure the devices’ outputs and inputs can operate to acceptable values for both current and voltage.

Design 1.13

Drivers and Buffers

◊ Drivers are devices designed to sink and/or source larger current values.

Design 1.14

Load

◊ Buffers are devices that isolate circuits and are designed to handle voltage issues.

D

Q

Drivers and Buffers

◊ Buffers may also provide voltage conversion. For instance, 5-volt devices may interface with a 12 volt bus.

◊ Buffers and drivers may be stand-alone ICs, or integrated as part of a digital IC’s design.

Design 1.15

Buffers: Special Apps

◊ Some buffers have specialized applications, such as the directional bus switch or a transceiver (transmitter / receiver ) below:

Design 1.16

R/L

Buffers: Storing Buffers

◊ Other buffers may also offer memory capabilities. These devices temporarily store data until it’s ready to place on the bus, or retrieve information from the bus and hold it until the devices need it.

◊ Since they are devices designed for bus applications they frequently have tri-state outputs.

Design 1.17

Buffers and Drivers: Storing Buffers

The 74374 contains 8 D-Flip-Flops with buffered clock and OE inputs, and a tri-state buffered output.

Design 1.18

D

Q

D

Q

OE

Clock

D0

D1

Q1

Q0

Buffers and Drivers

◊ Other buffer/driver support circuits may include discreet components such as transistors and MOSFET’s.

◊ In all these cases, always verify the Voltage and Current requirements for these devices and consider the propagation delay they’re likely to add.

Design 1.19

Capacitance

◊ Buses inherently contain capacitance. Buses are parallel conductors separated by a dielectric, a similar construction to capacitors. C=(A•ε) / d

◊ Capacitance interferes with digital signals by distorting the signals and by adding propagation delay.

◊ Capacitance cannot be avoided, but can be reduced by designing with it in mind. Utilize proper materials, maintain short buses and increase the distance between the conductors.

Design 1.20

Resistance

◊ Conductors have resistance.

◊ Resistance in the conductor creates voltage drops that increase with higher current values.

◊ When designing a bus for Vcc, Ground or signal, ensure that the traces can adequately handle the current without adding resistance problems.

Design 1.21

Icc Required= 30 mA

R=30Ω Vcc= approx 4 VoltsVcc=5 Volts

Resistance

◊ There are some cases where a series resistor may be used:◊ To offer some protection in case of short circuits, assuming there are

no noise margin problems under normal operations. Most frequently used with CMOS due to low IIN currents.

◊ A series resistor is likely required if the output is connected to a transistor base or other analog device

◊ In specific design applications, including Schmitt device inputs

Design 1.22

END

Design 1.23

©Paul R. Godinprgodin @ gmail.com