On-chip ESD solutions for Silicon Photonics
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ON-CHIP ESD SOLUTIONS FOR SILICON PHOTONICS APPLICATIONS LOWEST PARASITIC CAPACITANCE PROTECTS SENSITIVE CIRCUITS REDUCES YOUR IC COST
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Transcript of On-chip ESD solutions for Silicon Photonics
ON-CHIP ESD SOLUTIONSFOR SILICON
PHOTONICS APPLICATIONS
LOWEST PARASITIC CAPACITANCEPROTECTS SENSITIVE CIRCUITS
REDUCES YOUR IC COST
DESIGN WITHOUT CONSTRAINTS
• Protect interfaces with most sensitive nodes like core devices
• Low parasitic capacitance for high speed circuits. 200fF, 100fF or even below 15fF
• Low leakage• No resistance added to the signal path
REDUCE TIME TO MARKET
• Low cap ESD concepts availableTSMC / UMC: 180nm – 28nm
• Customized EOS/ESD solutions available within days• Any voltage option
STRONGLY REDUCE IC COST
• Silicon and product proven to reduce development cost• Compatible with CMOS process flow• Optical interconnect projects with several key players
worldwide
Contact us for more information
https://soficsesd.wordpress.com/on-chip-esd-for-silicon-photonics-applications
