Offset Cancellation Overview

EECS 240 Lecture 18: Offset Cancellation V. Petkov 1

Offset Cancellation Overview• Techniques:

– Autozero (sampled)– Chopper stabilization (continuous-time)

• Objective:– Reject offset and 1/f noise

• Reference– Ch. Enz and G. C. Temes, “Circuit Techniques for Reducing the

Effects of Op-Amp Imperfections,” Proc. IEEE, Nov. 1996, pp. 1584-1614.


Outline• Autozero technique:

– Offset cancellation• Output• Input• Using auxiliary amplifier

– Flicker noise rejection– Design example: capacitive sensor interface

• Chopper stabilization– Principle of operation– Residual offset and nested chopper stabilization

• Comparison and summary


Output Offset Cancellation

• Output still corrupted by switch charge injection

bottom plate sampling

• Requires

( )in

Cosinout

osC

AVVVVAV

AVV

=−−=

−=

:2 Phase

:1 Phase DDos VAV <


Multistage Implementation

R. Poujois and J. Borel, "A low drift fully integrated MOSFET operational amplifier," IEEE Journal of Solid-State Circuits, vol. 13, pp. 499 - 503, August 1978.


Input Offset Cancellation

( )

( )

1AVV

1AVVAV

VVVAV:(b) Phase

1AAVVV

VVAV:(a)Phase

osres,os

osino

cosino

osoc

ooso

+−=

+−=

+−=

+=−=

+−=


Multistage Cancellation

• Open switches left to right• Residual offset from S1 … SN-1 cancelled by final stage• Capacitive coupling reduces gain• Application: comparators


Example: Offset Compensated SC Gain Stage

S1

S2

C1

S1

C2

S2 S1

S2ViVo

Vos

VC1

VC2


SC Gain Stage: Φ1

Assuming infinite open-loop gain.

S1C1

S1

C2

S1

S2ViVo

Vos

VC1

VC2

( ) osi

CCtot

osC

osiC

VCCVCVCVCQ

VVVVV

211

2211

2

1

1

+−=+=

−=−=

Φ


SC Gain Stage: Φ2

( )( )

io

tottot

ositot

osotot

osoC

osC

VCCV

QQ

VCCVCQ

VCCVCQ

VVVVV

2

1

211

212

2

1

12

1

2

=

→=

+−=

+−=

−=−=

ΦΦ

Φ

Φ

S2

C1

C2

S2

S2Vo

Vos

VC1

VC2

• Charge on C1, C2 is redistributed• Total charge stays same!• At end of phase 2:


SC Gain Stage Implementation

S1

S2

C1

S1

C2

S2 S1

S2ViVo

Vos

VC1

VC2

Cx

• Amplifier must be unity-gain stable

• Output pulled back to Vos in each cycle

• No feedback during clock non-overlapCx (deglitching capacitor)

• Charge injected at input node


Offset Cancellation Options

M. Degrauwe, E. Vittoz, and I. Verbauwhede, "A micropower CMOS-instrumentation amplifier," IEEE Journal of Solid-State Circuits, vol. 20, pp. 805 - 807, June 1985.

At input Charge injection degrades performance

At outputRequires low-gain amplifier or two stages

At input of auxiliary amplifier


Auxiliary Amplifier Offset Cancellation( ) ( )

( )

( )

++

+++

=

+−+=

++

+++

=

−−==

−−−−=

444444 3444444 21

44 344 2144 344 21

offset referredinput

2sw1

2

2

2OS

1

2

2

1sw1OS1

2OS2221sw11OS1out

2sw2OS2

21sw1OS

2

12

2OS221OS1o2

ampaux

2OS22

ampmain

1OS11out

VAA

A1V

AA

A1VVA

VAVAVAVAV

VVA1

AVVA1

AV

VVAVAVV

VVAVVAV

2 node b, phase :1 node a, phase :

:Injection Charge Switch

2

1

sw

sw

VV Offset, charge injection attenuated if A1 >> A2


Aux Amp Options

M. Degrauwe, E. Vittoz, and I. Verbauwhede, "A micropower CMOS-instrumentation amplifier," IEEE Journal of Solid-State Circuits, vol. 20, pp. 805 - 807, June 1985.


CDS and Flicker Noise

S1

S2A . S/H Σ

S2Vi Vo

V1 V2

V1/f

S1

S2

T = 1/fstime[kT]


Flicker Noise Analysis

( ) ( ) ( )

( ) ( )

( )43421

4444 34444 21321

sH

Ts

fnieq

st

V

ffio

n

d

nieq

esVsV

e

TkTVkTVkTVAkTV

−=

→

−−+=

−

−

2/1

d

error referredinput

/1/1

signal

1

by tDelay

Transform Laplace

2


Flicker Noise Frequency Response

( )

2sin

2cos1

1

1

2

2

TjTe

esHTj

Ts

n

ωω

ω

+−=

−=

−=

−

−

( )

( )s

jsn

jsn

ffTsH

T

T

TTT

TTsH

2sin2

4sin2

4sin4

2cos12

2sin

2cos

2cos21

2sin

2cos1

2

1

22

222

πω

ω

ω

ωωω

ωω

ω

ω

==

=

−=

++−=

+

−=

→

→

444 3444 21


Flicker Noise SpectrumK 1:= fs 1:=

Sf f( )Kf

:= Hf f( ) 2 sinπ f⋅2 fs⋅

⋅:=

0 1 2 3 4 50

1

2

3

4

5

Hf f( )2

Sf f( ) Hf f( )2⋅

f

• Flicker noise is differentiated

• Essentially removed at low frequency

• Choosing fs/2 sufficiently large effectively removes flicker noise

• Noise above fs/2 folds to baseband

• Thermal noise folded to 0 … fs/2


Design Example:Capacitive Sensor Interface

S+

S-

MM

S+

S-

CSo - ∆C

CSo + ∆Cxo- ∆x

xo+ ∆x

∆x

CS+

CS-

(a) (b)

Principle of capacitive sensing:


Capacitance-to-Voltage (C/V) Conversion

CS - ∆C

CS + ∆C

CI

CI

VMVO

S+

S-M

MechanicalElement

MI

O VC

C2V ∆=


Correlated Double-Sampling (CDS)

Phase 1 Phase 2

Reset

Phase 3

kT

∆C(kT-T/2) ∆C(kT)

(k-1)T kT-T/2

Noisecancelation

SensingPhase 1

Phase 2

Phase 3For DC signal: M

IO V

CC2V ∆

=

For AC (low-frequency) signal:

( )( )

ErrorC

2TkTCVkTCV

2kTVI

12

o +

−∆−∆

=

CI+

CI-

V1

(a)

CH+

CH-

CS+

CS-

CI+

CI-

V1

CS+

CS-

CH+

CH- Vo

CI+

CI-

V2

CS+

CS-

(b)

V1

(c)

M

M

M


CDS Front-End Schematic


Initial Design Decisions• Process: 0.5µm 5V CMOS

• Electrostatic force-feedback – allocate feedback phase in timing diagram

• Sampling frequency – chosen based on resolution and stability requirements- fs=500kHz for this example

• Input common-mode feedback (ICMFB) for the C/V converter

- Advantages: reduces DC offset and drift

- Disadvantages: additional amplifier; increases Cp; affects settling

- Can be omitted if common-mode voltage step at input is small(typically the case in two-chip solutions with large Cp)

• Amplifier topology


Amplifier Topology

• Small sensor output:

Small signal swing in the front-end

• Telescopic double-cascoded amplifier:

High DC gain

Few noise contributing devices

• Sensing on negative edge of VM:

PMOS input

• Choice of VICM :

Equal to V1 (minimize delay)

( )( )

I

12

o C2TkTCVkTCV

2kTV

−∆−∆

=


• Settling accuracy:

- Accelerometer with full-scale range of 5g and noise floor of 150µg

- Settling error: ε=3x10-5

• Phase A: tA=(3/16)Ts=375ns

- Only C/V converter operates

- Single-pole stage settling:

• Phase B: tB=(1/4)Ts=500ns

- Three stages in series

- Use C/V bandwidth from Phase A (maximally relaxed conditions)

- Second and third stages require 5.3MHz bandwidth

Amplifier Design - Settling

T S=2µs

φM

φR ST

φ1

∆C 2

FeedbackPhase A

∆C 1

Phase B

( )MHz5.4

1lnt2

12

1fA

CVCV_BW =

επ

=πτ

=


Amplifier Design – Noise Analysis

++=

∆ P_Leff

CV_LeffePrPP

SCV

CV_Leff

B

CV

2xn

CC

NRN1f1n

CTk

F1

316

fv

RP

CI

VOutCPACPSCS

2nav2

nRpv2

pre_nvVXPreamp

MechanicalElement

CL

2preCV

P

P

CVePr

CV_BW

2

T

PSS

CV

CV_LeffCVP

A1

nn

FF

21N

fC

CCnCF

3N

=

π

+=

Noise factors:


Amplifier Design – Noise Analysis

++=

∆ P_Leff

CV_LeffePrPP

SCV

CV_Leff

B

CV

2xn

CC

NRN1f1n

CTk

F1

316

fv

• Choosing CI – tradeoff between SNR and speed

• CL is scaled according to noise requirements (tradeoff with power)

• Parasitics (Rp and Cp) should always be minimized

• This example:

Noise contributions:

- Amplifier (C/V): 60%

- Rp: 35%

- Preamp: 5%

Capacitance resolution:

HznV330f

v2xn =

∆

HzaF08.0


Chopper Stabilization


Chopper Amp Bandwidth & DelayExample 1:

Amplifier is ideal LPF• Gain Ao• BW 2 fs

DC gain ~ 0.8 Ao

Example 2: Amplifier introduces 90o phase shift

DC gain is 0

( ) ( )[ ]( ) ( )[ ]yxyxyx

yxyxyx++−=

++−=

sinsincossincoscoscoscos

2121


Chopper Results

K. Hsieh, P. R. Gray, D. Senderowicz, and D. G. Messerschmitt, "A low-noise chopper-stabilized differential switched-capacitor filtering technique," IEEE Journal of Solid-State Circuits, vol. 16, pp. 708 - 715, December 1981.


Chopper Residual Offset

A. Bakker, K. Thiele, and J. H. Huijsing, "A CMOS nested-chopper instrumentation amplifier with 100-nV offset," IEEE Journal of Solid-State Circuits, vol. 35, pp. 1877 - 1883, December 2000.

Spikes from input chopper due to charge injection mismatch.


Nested Chopper Amplifier

• Inner chopper runs at high frequency to remove 1/f noise• Outer chopper runs at low frequency to minimize “spiking” and remove

residual offset from inner chopper. 1/f-noise is no issue since it has been reduced by inner chopper.


Results


ComparisonAutozero

• Samples Signal– No continuous time

operation

• Flicker noise removed– No need for LPF

• Increased baseband noise due to thermal noise folding

Chopper Stabilization

• Modulates Signal– Compatible with continuous

time operation

• Flicker noise to high frequency– Requires LPF to remove noise

• Virtually no thermal noise folding if fclk >> B

• Finite BW amp reduces gain

Offset Cancellation Overview

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