Nios II Processor-Based Self-Adaptive QRS Detection System

Nios II Processor-Based Self-Adaptive QRS Detection System

Institution: Indian Institute of Technology, KharagpurParticipants: Sai Prashanth, Prashant Agrawal

Instructor: Professor Agit Pal

December 9, 2011 RPR 1

Outline• Background• Project Outline• FPGA Design Signification• Functional Description• Plot Architecture• QRS Detection Results• ECG Hardware Block Diagram• Software QRS Detection Algorithm Flow Chart• Design’s Implementation steps• Conclusion


Background

• QRS detection provides the fundamental for almost all ECG analysis algorithm

• Software QRS detection- Based on signal processing techniques- An asymptotic detection performance

• Choosing the QRS detection algorithm best suited to the current context is an essential step in the development of a real-time ECG analysis system


Project Outline• Algorithm-bank-based solutions

- Periodic sampling of the input ECG signal- Dynamic decision to find the most appropriate algorithm


Reduction of the number of errors

SAMPLERAltera Nios II Processor

(CPU0)

ANALYZERAltera Nios II Processor

(CPU1)

ADCECG

Patient Context

Arrhythmia

Fig.2: The design overview of ECG monitoring system

Sub-units within the scope of this project

Project Outline


SAMPLERAltera Nios II Processor

(CPU0)

ANALYZERAltera Nios II Processor

(CPU1)

ECG

Patient Context

Arrhythmia

Acquisition, context analysis, andpiloting of the analyzer

The actual QRS complex detection and medical diagnosis

Fig.2: The design overview of ECG monitoring system

ADC

•Implemented using the Altera Nios®II processor

FPGA Design Significance• The trend in embedded system design

- Implementing entire functional system on a single chip

• The advent of high-density FPGA have enabled designers to implement a complete system on a chip

• Benefits- Portable, cost effective, and low power consumption (compared to PCs)- Complex ICs with millions of gates are now available- Performing control and decision making operation efficiently- Performing DSP operations and other computationally intensive tasks- SOPC Builder integrates complex system components such as IP blocks,

memories, and interfaces to off-chip devices- The Altera Nios II processor supports HW/SW co-design and multi-core

processingDecember 9, 2011 RPR 6

Functional Description


ANALYZER (Nios II Processor, CPU1)

SAMPLER(Nios II Processor, CPU0)

ADC Line ContextAnalyzer

PatientContext

PILOT

ArrhythmiaContext Analyzer

Chronicle Recognition

Rule Base

Chronicle BaseAlgorithm Bank

Temporal AbstractionFiltering QRS Classification

QRS Detection P-wave Detection

ECG

Arrhythmia

Fig.3: ECG Medical Monitoring System






PatientContext

PILOT



Rule Base




ECG

Arrhythmia


Temporal abstraction is composed of four linked tasks






PatientContext

PILOT



Rule Base




ECG

Arrhythmia


Four tasks are performed by shortest path (SP) algorithm

Pilot Architecture


Current Context

Line Context

Patient Context

Arrhythmia Context

ContextManager

Chronicle Model Choice Rules

Task Choice Rules

SP Piloting Rules

Arrhythmia Recognition Level Interface Engine

Temporal Abstraction Tasks

Level Interface Engine

SP Algorithm Level Interface Engine

ChronicleModels to Use

Task to Activate and Deactivate

SP Algorithm to Tune

Manager Rules

QRS Detection ResultsECG

ScoreNe 1 Ne 2 Ne 3 Ne 4 Ne 5 Total

Ne Er (%)

Pan *20 *91 *240 *312 *367 1,030 14.3

Gritzali 20 *160 388 360 *295 1,223 17

df2 307 278 *174 *160 *302 1,221 17

Pilot 20 88 185 167 304 764 10.6


Five ECGs were generated from the MIT-BIH databaseNe: The number of errorsEr : The error rate (Er = Ne/NQRS, where NQRS is the total number of actual QRSs)

•The pilot chooses the best algorithm with the aid of the piloting rules•In this study, the algorithm thresholds are optimal in the sense that Ne is minimum

ECG Hardware Block Diagram


KeyboardANALYZER

(Nios II Processor Augmented with

Custom Instructions)

SAMPLER(Nios Coprocesspr)

RAM LCD Display

ADCECG Data

LCD Data Buffer

Interrupt

Software QRS Detection Algorithm Flow Chart


Selection of Characteristic Scales

Determination of Modulus Maxima Lines of R Waves

Calculation of Singular Degree

Elimination of Isolated Modules Maxima Lines

Detection of R Peak

QRS Onset & Offset Detection

T & P Wave Detection

Elimination of Redundant Modulus Maxima Lines

Design’s Implementation Steps

1. Research and determine a set of complementary QRS detection algorithms and develop software algorithms to support them

2. Create a Quartus II projectCompile and debug the project and review the compilation report and test the project

3. Create an algorithm bank consisting of four different QRS detection algorithms and test the performance


Design’s Implementation Steps

4. Update the SOPC Builder processor configuration and optimize the processor until the desired performance requirement is met

5. Create interrupt-based interfaces using Nios II IDE and test these I/O interface

6. Test the ECG medical monitoring system performance and determine the error rates of the QRS complex detection


Applying SOPC ConceptsCompared to ASIC SOC, SOPC has many unique features

The design uses SOPC concepts in the following ways

• Modular system design- The system is divided and simplified, which makes it easer to implement

• System integration- It is very difficult to implement highly integrated design without lowering

the design target or using a different FPGA

• Various modes- Using SOPC concepts and excellent design tools enabled authors to use

various mode

• Final system can be updated- The design can be flexible configured and updated during the design

processDecember 9, 2011 RPR 16

Conclusion• Using Nios II processor, it is possible to design their system easily,

including dual-core embedded processors, on-chip and off-chip memory, and high-speed I/O ports

• Using SOPC Builder, it is possible to modify the CPU hardware at any time for multi-purpose development

• Altera’s ability to develop and update the Nios II processor and function was extremely important

• Using SOPC concepts allowed us to create a more flexible, dynamically reconfigurable, and computationally intensive implementation







PatientContext

PILOT



Rule Base




ECG

Arrhythmia


Separating the actual ECG signal from the noisy part of the signal






PatientContext

PILOT



Rule Base




ECG

Arrhythmia


Identifying QRS occurrence dates






PatientContext

PILOT



Rule Base




ECG

Arrhythmia


Labeling QRS morphologies






PatientContext

PILOT



Rule Base




ECG

Arrhythmia


Identifying P wave occurrence dates

Nios II Processor-Based Self-Adaptive QRS Detection System

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